From: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
To: Andy Gross <agross@kernel.org>,
Bjorn Andersson <andersson@kernel.org>,
Konrad Dybcio <konrad.dybcio@linaro.org>,
Rob Clark <robdclark@gmail.com>, Sean Paul <sean@poorly.run>,
Abhinav Kumar <quic_abhinavk@quicinc.com>,
Marijn Suijten <marijn.suijten@somainline.org>,
Rob Herring <robh+dt@kernel.org>,
Krzysztof Kozlowski <krzysztof.kozlowski+dt@linaro.org>
Cc: Stephen Boyd <swboyd@chromium.org>,
David Airlie <airlied@gmail.com>, Daniel Vetter <daniel@ffwll.ch>,
linux-arm-msm@vger.kernel.org, devicetree@vger.kernel.org,
dri-devel@lists.freedesktop.org, freedreno@lists.freedesktop.org
Subject: [PATCH v2 1/8] dt-bindings: display/msm: Add reg bus and rotator interconnects
Date: Wed, 12 Jul 2023 15:11:38 +0300 [thread overview]
Message-ID: <20230712121145.1994830-2-dmitry.baryshkov@linaro.org> (raw)
In-Reply-To: <20230712121145.1994830-1-dmitry.baryshkov@linaro.org>
From: Konrad Dybcio <konrad.dybcio@linaro.org>
Apart from the already handled data bus (MAS_MDP_Pn<->DDR), there are
other connection paths:
- a path that connects rotator block to the DDR.
- a path that needs to be handled to ensure MDSS register access
functions properly, namely the "reg bus", a.k.a the CPU-MDSS CFG
interconnect.
Describe these paths bindings to allow using them in device trees and in
the driver
Signed-off-by: Konrad Dybcio <konrad.dybcio@linaro.org>
Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
---
Documentation/devicetree/bindings/display/msm/mdss-common.yaml | 2 ++
1 file changed, 2 insertions(+)
diff --git a/Documentation/devicetree/bindings/display/msm/mdss-common.yaml b/Documentation/devicetree/bindings/display/msm/mdss-common.yaml
index ccd7d6417523..30a8aed4289a 100644
--- a/Documentation/devicetree/bindings/display/msm/mdss-common.yaml
+++ b/Documentation/devicetree/bindings/display/msm/mdss-common.yaml
@@ -66,12 +66,14 @@ properties:
items:
- description: Interconnect path from mdp0 (or a single mdp) port to the data bus
- description: Interconnect path from mdp1 port to the data bus
+ - description: Interconnect path from CPU to the reg bus
interconnect-names:
minItems: 1
items:
- const: mdp0-mem
- const: mdp1-mem
+ - const: cpu-cfg
resets:
items:
--
2.40.1
next prev parent reply other threads:[~2023-07-12 12:11 UTC|newest]
Thread overview: 17+ messages / expand[flat|nested] mbox.gz Atom feed top
2023-07-12 12:11 [PATCH v2 0/8] MDSS reg bus interconnect Dmitry Baryshkov
2023-07-12 12:11 ` Dmitry Baryshkov [this message]
2023-07-12 19:24 ` [PATCH v2 1/8] dt-bindings: display/msm: Add reg bus and rotator interconnects Krzysztof Kozlowski
2023-07-12 12:11 ` [PATCH v2 2/8] drm/msm/mdss: correct UBWC programming for SM8550 Dmitry Baryshkov
2023-07-12 22:02 ` Abhinav Kumar
2023-07-12 22:05 ` Dmitry Baryshkov
2023-07-12 12:11 ` [PATCH v2 3/8] drm/msm/mdss: switch mdss to use devm_of_icc_get() Dmitry Baryshkov
2023-07-12 12:11 ` [PATCH v2 4/8] drm/msm/mdss: Rename path references to mdp_path Dmitry Baryshkov
2023-07-12 12:11 ` [PATCH v2 5/8] drm/msm/mdss: inline msm_mdss_icc_request_bw() Dmitry Baryshkov
2023-07-12 12:11 ` [PATCH v2 6/8] drm/msm/mdss: populate missing data Dmitry Baryshkov
2023-07-12 12:11 ` [PATCH v2 7/8] drm/msm/mdss: Handle the reg bus ICC path Dmitry Baryshkov
2023-07-15 13:19 ` Konrad Dybcio
2023-07-12 12:11 ` [PATCH v2 8/8] arm64: dts: qcom: sm8450: provide MDSS cfg interconnect Dmitry Baryshkov
2023-07-13 8:41 ` Konrad Dybcio
2023-07-13 9:04 ` Dmitry Baryshkov
2023-07-14 5:33 ` (subset) [PATCH v2 0/8] MDSS reg bus interconnect Bjorn Andersson
2023-07-18 0:04 ` Abhinav Kumar
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