From: Praveenkumar I <quic_ipkumar@quicinc.com>
To: <amitk@kernel.org>, <thara.gopinath@gmail.com>,
<agross@kernel.org>, <andersson@kernel.org>,
<konrad.dybcio@linaro.org>, <rafael@kernel.org>,
<daniel.lezcano@linaro.org>, <rui.zhang@intel.com>,
<robh+dt@kernel.org>, <krzysztof.kozlowski+dt@linaro.org>,
<conor+dt@kernel.org>, <linux-pm@vger.kernel.org>,
<linux-arm-msm@vger.kernel.org>, <devicetree@vger.kernel.org>,
<linux-kernel@vger.kernel.org>
Cc: <quic_varada@quicinc.com>
Subject: [PATCH v3 3/5] arm64: dts: qcom: ipq5332: Add tsens node
Date: Thu, 13 Jul 2023 10:57:30 +0530 [thread overview]
Message-ID: <20230713052732.787853-4-quic_ipkumar@quicinc.com> (raw)
In-Reply-To: <20230713052732.787853-1-quic_ipkumar@quicinc.com>
IPQ5332 has tsens v2.3.3 peripheral. This patch adds the tsense
node with nvmem cells for calibration data.
Signed-off-by: Praveenkumar I <quic_ipkumar@quicinc.com>
---
[v3]:
Reordered device nodes according to the address.
[v2]:
Included qfprom nodes only for available sensors and removed
the offset suffix.
arch/arm64/boot/dts/qcom/ipq5332.dtsi | 66 +++++++++++++++++++++++++++
1 file changed, 66 insertions(+)
diff --git a/arch/arm64/boot/dts/qcom/ipq5332.dtsi b/arch/arm64/boot/dts/qcom/ipq5332.dtsi
index 8bfc2db44624..026f99fda00c 100644
--- a/arch/arm64/boot/dts/qcom/ipq5332.dtsi
+++ b/arch/arm64/boot/dts/qcom/ipq5332.dtsi
@@ -150,6 +150,46 @@ qfprom: efuse@a4000 {
reg = <0x000a4000 0x721>;
#address-cells = <1>;
#size-cells = <1>;
+
+ s11: s11@3a5 {
+ reg = <0x3a5 0x1>;
+ bits = <4 4>;
+ };
+
+ s12: s12@3a6 {
+ reg = <0x3a6 0x1>;
+ bits = <0 4>;
+ };
+
+ s13: s13@3a6 {
+ reg = <0x3a6 0x1>;
+ bits = <4 4>;
+ };
+
+ s14: s14@3ad {
+ reg = <0x3ad 0x2>;
+ bits = <7 4>;
+ };
+
+ s15: s15@3ae {
+ reg = <0x3ae 0x1>;
+ bits = <3 4>;
+ };
+
+ tsens_mode: mode@3e1 {
+ reg = <0x3e1 0x1>;
+ bits = <0 3>;
+ };
+
+ tsens_base0: base0@3e1 {
+ reg = <0x3e1 0x2>;
+ bits = <3 10>;
+ };
+
+ tsens_base1: base1@3e2 {
+ reg = <0x3e2 0x2>;
+ bits = <5 10>;
+ };
};
rng: rng@e3000 {
@@ -159,6 +199,32 @@ rng: rng@e3000 {
clock-names = "core";
};
+ tsens: thermal-sensor@4a9000 {
+ compatible = "qcom,ipq5332-tsens";
+ reg = <0x4a9000 0x1000>,
+ <0x4a8000 0x1000>;
+ nvmem-cells = <&tsens_mode>,
+ <&tsens_base0>,
+ <&tsens_base1>,
+ <&s11>,
+ <&s12>,
+ <&s13>,
+ <&s14>,
+ <&s15>;
+ nvmem-cell-names = "mode",
+ "base0",
+ "base1",
+ "s11",
+ "s12",
+ "s13",
+ "s14",
+ "s15";
+ interrupts = <GIC_SPI 320 IRQ_TYPE_LEVEL_HIGH>;
+ interrupt-names = "combined";
+ #qcom,sensors = <5>;
+ #thermal-sensor-cells = <1>;
+ };
+
tlmm: pinctrl@1000000 {
compatible = "qcom,ipq5332-tlmm";
reg = <0x01000000 0x300000>;
--
The Qualcomm Innovation Center, Inc. is a member of the Code Aurora Forum,
a Linux Foundation Collaborative Project
next prev parent reply other threads:[~2023-07-13 5:28 UTC|newest]
Thread overview: 11+ messages / expand[flat|nested] mbox.gz Atom feed top
2023-07-13 5:27 [PATCH v3 0/5] Add IPQ5332 TSENS support Praveenkumar I
2023-07-13 5:27 ` [PATCH v3 1/5] thermal/drivers/tsens: Add TSENS enable and calibration support for V2 Praveenkumar I
2023-07-15 14:05 ` Konrad Dybcio
2023-07-17 5:17 ` Praveenkumar I
2023-07-13 5:27 ` [PATCH v3 2/5] dt-bindings: thermal: tsens: Add ipq5332 compatible Praveenkumar I
2023-07-13 6:32 ` Krzysztof Kozlowski
2023-07-13 5:27 ` Praveenkumar I [this message]
2023-07-13 5:27 ` [PATCH v3 4/5] arm64: dts: qcom: ipq5332: Add thermal zone nodes Praveenkumar I
2023-07-13 5:27 ` [PATCH v3 5/5] thermal/drivers/tsens: Add IPQ5332 support Praveenkumar I
2023-07-15 14:06 ` Konrad Dybcio
2023-07-17 4:48 ` Praveenkumar I
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