* [PATCH v3 1/5] thermal/drivers/tsens: Add TSENS enable and calibration support for V2
2023-07-13 5:27 [PATCH v3 0/5] Add IPQ5332 TSENS support Praveenkumar I
@ 2023-07-13 5:27 ` Praveenkumar I
2023-07-15 14:05 ` Konrad Dybcio
2023-07-13 5:27 ` [PATCH v3 2/5] dt-bindings: thermal: tsens: Add ipq5332 compatible Praveenkumar I
` (3 subsequent siblings)
4 siblings, 1 reply; 11+ messages in thread
From: Praveenkumar I @ 2023-07-13 5:27 UTC (permalink / raw)
To: amitk, thara.gopinath, agross, andersson, konrad.dybcio, rafael,
daniel.lezcano, rui.zhang, robh+dt, krzysztof.kozlowski+dt,
conor+dt, linux-pm, linux-arm-msm, devicetree, linux-kernel
Cc: quic_varada
SoCs without RPM have to enable sensors and calibrate from the kernel.
Though TSENS IP supports 16 sensors, not all are used. So used hw_id
to enable the relevant sensors.
Added new calibration function for V2 as the tsens.c calib function
only supports V1.
Signed-off-by: Praveenkumar I <quic_ipkumar@quicinc.com>
---
[v3]:
Renamed the init function and removed version check in it.
Corrected the if check in init_common() at tsens.c
[v2]:
Added separate init function for tsens v2 which calls init_common
and initialize the remaining fields. Reformatted calibrate function
and used hw_ids for sensors to enable.
drivers/thermal/qcom/tsens-v2.c | 141 ++++++++++++++++++++++++++++++++
drivers/thermal/qcom/tsens.c | 2 +-
drivers/thermal/qcom/tsens.h | 3 +
3 files changed, 145 insertions(+), 1 deletion(-)
diff --git a/drivers/thermal/qcom/tsens-v2.c b/drivers/thermal/qcom/tsens-v2.c
index 29a61d2d6ca3..781595a9a622 100644
--- a/drivers/thermal/qcom/tsens-v2.c
+++ b/drivers/thermal/qcom/tsens-v2.c
@@ -6,11 +6,23 @@
#include <linux/bitops.h>
#include <linux/regmap.h>
+#include <linux/nvmem-consumer.h>
#include "tsens.h"
/* ----- SROT ------ */
#define SROT_HW_VER_OFF 0x0000
#define SROT_CTRL_OFF 0x0004
+#define SROT_MEASURE_PERIOD 0x0008
+#define SROT_Sn_CONVERSION 0x0060
+#define V2_SHIFT_DEFAULT 0x0003
+#define V2_SLOPE_DEFAULT 0x0cd0
+#define V2_CZERO_DEFAULT 0x016a
+#define ONE_PT_SLOPE 0x0cd0
+#define TWO_PT_SHIFTED_GAIN 921600
+#define ONE_PT_CZERO_CONST 94
+#define SENSOR_CONVERSION(n) (((n) * 4) + SROT_Sn_CONVERSION)
+#define CONVERSION_SLOPE_SHIFT 10
+#define CONVERSION_SHIFT_SHIFT 23
/* ----- TM ------ */
#define TM_INT_EN_OFF 0x0004
@@ -59,6 +71,11 @@ static const struct reg_field tsens_v2_regfields[MAX_REGFIELDS] = {
/* CTRL_OFF */
[TSENS_EN] = REG_FIELD(SROT_CTRL_OFF, 0, 0),
[TSENS_SW_RST] = REG_FIELD(SROT_CTRL_OFF, 1, 1),
+ [SENSOR_EN] = REG_FIELD(SROT_CTRL_OFF, 3, 18),
+ [CODE_OR_TEMP] = REG_FIELD(SROT_CTRL_OFF, 21, 21),
+
+ /* MAIN_MEASURE_PERIOD */
+ [MAIN_MEASURE_PERIOD] = REG_FIELD(SROT_MEASURE_PERIOD, 0, 7),
/* ----- TM ------ */
/* INTERRUPT ENABLE */
@@ -104,6 +121,130 @@ static const struct reg_field tsens_v2_regfields[MAX_REGFIELDS] = {
[TRDY] = REG_FIELD(TM_TRDY_OFF, 0, 0),
};
+static int tsens_v2_calibrate_sensor(struct device *dev, struct tsens_sensor *sensor,
+ struct regmap *map, u32 mode, u32 base0, u32 base1)
+{
+ u32 slope, czero, val;
+ char name[15];
+ int ret;
+
+ /* Read offset value */
+ ret = snprintf(name, sizeof(name), "s%d", sensor->hw_id);
+ if (ret < 0)
+ return ret;
+
+ ret = nvmem_cell_read_variable_le_u32(dev, name, &sensor->offset);
+ if (ret)
+ return ret;
+
+ /* Based on calib mode, program SHIFT, SLOPE and CZERO */
+ switch (mode) {
+ case TWO_PT_CALIB:
+ slope = (TWO_PT_SHIFTED_GAIN / (base1 - base0));
+
+ czero = (base0 + sensor->offset - ((base1 - base0) / 3));
+
+ val = (V2_SHIFT_DEFAULT << CONVERSION_SHIFT_SHIFT) |
+ (slope << CONVERSION_SLOPE_SHIFT) | czero;
+
+ fallthrough;
+ case ONE_PT_CALIB2:
+ czero = base0 + sensor->offset - ONE_PT_CZERO_CONST;
+
+ val = (V2_SHIFT_DEFAULT << CONVERSION_SHIFT_SHIFT) |
+ (ONE_PT_SLOPE << CONVERSION_SLOPE_SHIFT) | czero;
+
+ break;
+ default:
+ dev_dbg(dev, "calibrationless mode\n");
+
+ val = (V2_SHIFT_DEFAULT << CONVERSION_SHIFT_SHIFT) |
+ (V2_SLOPE_DEFAULT << CONVERSION_SLOPE_SHIFT) | V2_CZERO_DEFAULT;
+ }
+
+ regmap_write(map, SENSOR_CONVERSION(sensor->hw_id), val);
+
+ return 0;
+}
+
+static int tsens_v2_calibration(struct tsens_priv *priv)
+{
+ struct device *dev = priv->dev;
+ u32 mode, base0, base1;
+ int i, ret;
+
+ if (priv->num_sensors > MAX_SENSORS)
+ return -EINVAL;
+
+ ret = nvmem_cell_read_variable_le_u32(priv->dev, "mode", &mode);
+ if (ret == -ENOENT)
+ dev_warn(priv->dev, "Calibration data not present in DT\n");
+ if (ret < 0)
+ return ret;
+
+ dev_dbg(priv->dev, "calibration mode is %d\n", mode);
+
+ ret = nvmem_cell_read_variable_le_u32(priv->dev, "base0", &base0);
+ if (ret < 0)
+ return ret;
+
+ ret = nvmem_cell_read_variable_le_u32(priv->dev, "base1", &base1);
+ if (ret < 0)
+ return ret;
+
+ /* Calibrate each sensor */
+ for (i = 0; i < priv->num_sensors; i++) {
+ ret = tsens_v2_calibrate_sensor(dev, &priv->sensor[i], priv->srot_map,
+ mode, base0, base1);
+ if (ret < 0)
+ return ret;
+ }
+
+ return 0;
+}
+
+static int __init init_tsens_v2_no_rpm(struct tsens_priv *priv)
+{
+ int i, ret;
+ u32 val = 0;
+ struct device *dev = priv->dev;
+
+ ret = init_common(priv);
+ if (ret < 0)
+ return ret;
+
+ priv->rf[CODE_OR_TEMP] = devm_regmap_field_alloc(dev, priv->srot_map,
+ priv->fields[CODE_OR_TEMP]);
+ if (IS_ERR(priv->rf[CODE_OR_TEMP]))
+ return PTR_ERR(priv->rf[CODE_OR_TEMP]);
+
+ priv->rf[MAIN_MEASURE_PERIOD] = devm_regmap_field_alloc(dev, priv->srot_map,
+ priv->fields[MAIN_MEASURE_PERIOD]);
+ if (IS_ERR(priv->rf[MAIN_MEASURE_PERIOD]))
+ return PTR_ERR(priv->rf[MAIN_MEASURE_PERIOD]);
+
+ regmap_field_write(priv->rf[TSENS_SW_RST], 0x1);
+
+ /* Update measure period to 2ms */
+ regmap_field_write(priv->rf[MAIN_MEASURE_PERIOD], 0x1);
+
+ /* Enable available sensors */
+ for (i = 0; i < priv->num_sensors; i++)
+ val |= 1 << priv->sensor[i].hw_id;
+
+ regmap_field_write(priv->rf[SENSOR_EN], val);
+
+ /* Real temperature format */
+ regmap_field_write(priv->rf[CODE_OR_TEMP], 0x1);
+
+ regmap_field_write(priv->rf[TSENS_SW_RST], 0x0);
+
+ /* Enable TSENS */
+ regmap_field_write(priv->rf[TSENS_EN], 0x1);
+
+ return 0;
+}
+
static const struct tsens_ops ops_generic_v2 = {
.init = init_common,
.get_temp = get_temp_tsens_valid,
diff --git a/drivers/thermal/qcom/tsens.c b/drivers/thermal/qcom/tsens.c
index 98c356acfe98..9dc0c2150948 100644
--- a/drivers/thermal/qcom/tsens.c
+++ b/drivers/thermal/qcom/tsens.c
@@ -974,7 +974,7 @@ int __init init_common(struct tsens_priv *priv)
ret = regmap_field_read(priv->rf[TSENS_EN], &enabled);
if (ret)
goto err_put_device;
- if (!enabled) {
+ if (!enabled && (tsens_version(priv) != VER_2_X_NO_RPM)) {
dev_err(dev, "%s: device not enabled\n", __func__);
ret = -ENODEV;
goto err_put_device;
diff --git a/drivers/thermal/qcom/tsens.h b/drivers/thermal/qcom/tsens.h
index 2805de1c6827..b2e8f0f2b466 100644
--- a/drivers/thermal/qcom/tsens.h
+++ b/drivers/thermal/qcom/tsens.h
@@ -35,6 +35,7 @@ enum tsens_ver {
VER_0_1,
VER_1_X,
VER_2_X,
+ VER_2_X_NO_RPM,
};
enum tsens_irq_type {
@@ -168,6 +169,8 @@ enum regfield_ids {
TSENS_SW_RST,
SENSOR_EN,
CODE_OR_TEMP,
+ /* MEASURE_PERIOD */
+ MAIN_MEASURE_PERIOD,
/* ----- TM ------ */
/* TRDY */
--
The Qualcomm Innovation Center, Inc. is a member of the Code Aurora Forum,
a Linux Foundation Collaborative Project
^ permalink raw reply related [flat|nested] 11+ messages in thread* Re: [PATCH v3 1/5] thermal/drivers/tsens: Add TSENS enable and calibration support for V2
2023-07-13 5:27 ` [PATCH v3 1/5] thermal/drivers/tsens: Add TSENS enable and calibration support for V2 Praveenkumar I
@ 2023-07-15 14:05 ` Konrad Dybcio
2023-07-17 5:17 ` Praveenkumar I
0 siblings, 1 reply; 11+ messages in thread
From: Konrad Dybcio @ 2023-07-15 14:05 UTC (permalink / raw)
To: Praveenkumar I, amitk, thara.gopinath, agross, andersson, rafael,
daniel.lezcano, rui.zhang, robh+dt, krzysztof.kozlowski+dt,
conor+dt, linux-pm, linux-arm-msm, devicetree, linux-kernel
Cc: quic_varada
On 13.07.2023 07:27, Praveenkumar I wrote:
> SoCs without RPM have to enable sensors and calibrate from the kernel.
> Though TSENS IP supports 16 sensors, not all are used. So used hw_id
> to enable the relevant sensors.
>
> Added new calibration function for V2 as the tsens.c calib function
> only supports V1.
>
> Signed-off-by: Praveenkumar I <quic_ipkumar@quicinc.com>
> ---
[...]
>
> /* ----- SROT ------ */
> #define SROT_HW_VER_OFF 0x0000
> #define SROT_CTRL_OFF 0x0004
> +#define SROT_MEASURE_PERIOD 0x0008
> +#define SROT_Sn_CONVERSION 0x0060
> +#define V2_SHIFT_DEFAULT 0x0003
> +#define V2_SLOPE_DEFAULT 0x0cd0
> +#define V2_CZERO_DEFAULT 0x016a
> +#define ONE_PT_SLOPE 0x0cd0
> +#define TWO_PT_SHIFTED_GAIN 921600
> +#define ONE_PT_CZERO_CONST 94
> +#define SENSOR_CONVERSION(n) (((n) * 4) + SROT_Sn_CONVERSION)
> +#define CONVERSION_SLOPE_SHIFT 10
> +#define CONVERSION_SHIFT_SHIFT 23
Please define bitfields with GENMASK() and use FIELD_PREP/GET() helpers
>
> /* ----- TM ------ */
> #define TM_INT_EN_OFF 0x0004
> @@ -59,6 +71,11 @@ static const struct reg_field tsens_v2_regfields[MAX_REGFIELDS] = {
> /* CTRL_OFF */
> [TSENS_EN] = REG_FIELD(SROT_CTRL_OFF, 0, 0),
> [TSENS_SW_RST] = REG_FIELD(SROT_CTRL_OFF, 1, 1),
> + [SENSOR_EN] = REG_FIELD(SROT_CTRL_OFF, 3, 18),
> + [CODE_OR_TEMP] = REG_FIELD(SROT_CTRL_OFF, 21, 21),
> +
> + /* MAIN_MEASURE_PERIOD */
> + [MAIN_MEASURE_PERIOD] = REG_FIELD(SROT_MEASURE_PERIOD, 0, 7),
>
> /* ----- TM ------ */
> /* INTERRUPT ENABLE */
> @@ -104,6 +121,130 @@ static const struct reg_field tsens_v2_regfields[MAX_REGFIELDS] = {
> [TRDY] = REG_FIELD(TM_TRDY_OFF, 0, 0),
> };
>
> +static int tsens_v2_calibrate_sensor(struct device *dev, struct tsens_sensor *sensor,
> + struct regmap *map, u32 mode, u32 base0, u32 base1)
> +{
> + u32 slope, czero, val;
> + char name[15];
What's the rationale behind choosing 15 here?
> + int ret;
> +
[...]
> +static int tsens_v2_calibration(struct tsens_priv *priv)
> +{
> + struct device *dev = priv->dev;
> + u32 mode, base0, base1;
> + int i, ret;
> +
> + if (priv->num_sensors > MAX_SENSORS)
> + return -EINVAL;
> +
> + ret = nvmem_cell_read_variable_le_u32(priv->dev, "mode", &mode);
> + if (ret == -ENOENT)
> + dev_warn(priv->dev, "Calibration data not present in DT\n");
I think bindings don't allow that anyway
> + if (ret < 0)
> + return ret;
> +
> + dev_dbg(priv->dev, "calibration mode is %d\n", mode);
> +
> + ret = nvmem_cell_read_variable_le_u32(priv->dev, "base0", &base0);
> + if (ret < 0)
> + return ret;
> +
> + ret = nvmem_cell_read_variable_le_u32(priv->dev, "base1", &base1);
> + if (ret < 0)
> + return ret;
> +
> + /* Calibrate each sensor */
> + for (i = 0; i < priv->num_sensors; i++) {
> + ret = tsens_v2_calibrate_sensor(dev, &priv->sensor[i], priv->srot_map,
> + mode, base0, base1);
> + if (ret < 0)
> + return ret;
> + }
> +
> + return 0;
> +}
> +
> +static int __init init_tsens_v2_no_rpm(struct tsens_priv *priv)
> +{
> + int i, ret;
> + u32 val = 0;
> + struct device *dev = priv->dev;
Reverse-Christmas-tree, please.
> +
> + ret = init_common(priv);
> + if (ret < 0)
> + return ret;
> +
> + priv->rf[CODE_OR_TEMP] = devm_regmap_field_alloc(dev, priv->srot_map,
> + priv->fields[CODE_OR_TEMP]);
> + if (IS_ERR(priv->rf[CODE_OR_TEMP]))
> + return PTR_ERR(priv->rf[CODE_OR_TEMP]);
> +
> + priv->rf[MAIN_MEASURE_PERIOD] = devm_regmap_field_alloc(dev, priv->srot_map,
> + priv->fields[MAIN_MEASURE_PERIOD]);
> + if (IS_ERR(priv->rf[MAIN_MEASURE_PERIOD]))
> + return PTR_ERR(priv->rf[MAIN_MEASURE_PERIOD]);
> +
> + regmap_field_write(priv->rf[TSENS_SW_RST], 0x1);
> +
> + /* Update measure period to 2ms */
What's the unit? Can we name the 0x1 value?
> + regmap_field_write(priv->rf[MAIN_MEASURE_PERIOD], 0x1);
> +
> + /* Enable available sensors */
> + for (i = 0; i < priv->num_sensors; i++)
> + val |= 1 << priv->sensor[i].hw_id;
> +
> + regmap_field_write(priv->rf[SENSOR_EN], val);
> +
> + /* Real temperature format */
What does that mean?
> + regmap_field_write(priv->rf[CODE_OR_TEMP], 0x1);
> +
> + regmap_field_write(priv->rf[TSENS_SW_RST], 0x0);
> +
> + /* Enable TSENS */
> + regmap_field_write(priv->rf[TSENS_EN], 0x1);
It would be really nice if you could provide the names of all these
magic values.
Konrad
> +
> + return 0;
> +}
> +
> static const struct tsens_ops ops_generic_v2 = {
> .init = init_common,
> .get_temp = get_temp_tsens_valid,
> diff --git a/drivers/thermal/qcom/tsens.c b/drivers/thermal/qcom/tsens.c
> index 98c356acfe98..9dc0c2150948 100644
> --- a/drivers/thermal/qcom/tsens.c
> +++ b/drivers/thermal/qcom/tsens.c
> @@ -974,7 +974,7 @@ int __init init_common(struct tsens_priv *priv)
> ret = regmap_field_read(priv->rf[TSENS_EN], &enabled);
> if (ret)
> goto err_put_device;
> - if (!enabled) {
> + if (!enabled && (tsens_version(priv) != VER_2_X_NO_RPM)) {
> dev_err(dev, "%s: device not enabled\n", __func__);
> ret = -ENODEV;
> goto err_put_device;
> diff --git a/drivers/thermal/qcom/tsens.h b/drivers/thermal/qcom/tsens.h
> index 2805de1c6827..b2e8f0f2b466 100644
> --- a/drivers/thermal/qcom/tsens.h
> +++ b/drivers/thermal/qcom/tsens.h
> @@ -35,6 +35,7 @@ enum tsens_ver {
> VER_0_1,
> VER_1_X,
> VER_2_X,
> + VER_2_X_NO_RPM,
> };
>
> enum tsens_irq_type {
> @@ -168,6 +169,8 @@ enum regfield_ids {
> TSENS_SW_RST,
> SENSOR_EN,
> CODE_OR_TEMP,
> + /* MEASURE_PERIOD */
> + MAIN_MEASURE_PERIOD,
>
> /* ----- TM ------ */
> /* TRDY */
^ permalink raw reply [flat|nested] 11+ messages in thread* Re: [PATCH v3 1/5] thermal/drivers/tsens: Add TSENS enable and calibration support for V2
2023-07-15 14:05 ` Konrad Dybcio
@ 2023-07-17 5:17 ` Praveenkumar I
0 siblings, 0 replies; 11+ messages in thread
From: Praveenkumar I @ 2023-07-17 5:17 UTC (permalink / raw)
To: Konrad Dybcio, amitk, thara.gopinath, agross, andersson, rafael,
daniel.lezcano, rui.zhang, robh+dt, krzysztof.kozlowski+dt,
conor+dt, linux-pm, linux-arm-msm, devicetree, linux-kernel
Cc: quic_varada
On 7/15/2023 7:35 PM, Konrad Dybcio wrote:
> On 13.07.2023 07:27, Praveenkumar I wrote:
>> SoCs without RPM have to enable sensors and calibrate from the kernel.
>> Though TSENS IP supports 16 sensors, not all are used. So used hw_id
>> to enable the relevant sensors.
>>
>> Added new calibration function for V2 as the tsens.c calib function
>> only supports V1.
>>
>> Signed-off-by: Praveenkumar I <quic_ipkumar@quicinc.com>
>> ---
> [...]
>
>>
>> /* ----- SROT ------ */
>> #define SROT_HW_VER_OFF 0x0000
>> #define SROT_CTRL_OFF 0x0004
>> +#define SROT_MEASURE_PERIOD 0x0008
>> +#define SROT_Sn_CONVERSION 0x0060
>> +#define V2_SHIFT_DEFAULT 0x0003
>> +#define V2_SLOPE_DEFAULT 0x0cd0
>> +#define V2_CZERO_DEFAULT 0x016a
>> +#define ONE_PT_SLOPE 0x0cd0
>> +#define TWO_PT_SHIFTED_GAIN 921600
>> +#define ONE_PT_CZERO_CONST 94
>> +#define SENSOR_CONVERSION(n) (((n) * 4) + SROT_Sn_CONVERSION)
>> +#define CONVERSION_SLOPE_SHIFT 10
>> +#define CONVERSION_SHIFT_SHIFT 23
> Please define bitfields with GENMASK() and use FIELD_PREP/GET() helpers
Sure, will change in the next patch.
>
>>
>> /* ----- TM ------ */
>> #define TM_INT_EN_OFF 0x0004
>> @@ -59,6 +71,11 @@ static const struct reg_field tsens_v2_regfields[MAX_REGFIELDS] = {
>> /* CTRL_OFF */
>> [TSENS_EN] = REG_FIELD(SROT_CTRL_OFF, 0, 0),
>> [TSENS_SW_RST] = REG_FIELD(SROT_CTRL_OFF, 1, 1),
>> + [SENSOR_EN] = REG_FIELD(SROT_CTRL_OFF, 3, 18),
>> + [CODE_OR_TEMP] = REG_FIELD(SROT_CTRL_OFF, 21, 21),
>> +
>> + /* MAIN_MEASURE_PERIOD */
>> + [MAIN_MEASURE_PERIOD] = REG_FIELD(SROT_MEASURE_PERIOD, 0, 7),
>>
>> /* ----- TM ------ */
>> /* INTERRUPT ENABLE */
>> @@ -104,6 +121,130 @@ static const struct reg_field tsens_v2_regfields[MAX_REGFIELDS] = {
>> [TRDY] = REG_FIELD(TM_TRDY_OFF, 0, 0),
>> };
>>
>> +static int tsens_v2_calibrate_sensor(struct device *dev, struct tsens_sensor *sensor,
>> + struct regmap *map, u32 mode, u32 base0, u32 base1)
>> +{
>> + u32 slope, czero, val;
>> + char name[15];
> What's the rationale behind choosing 15 here?
Chose 15 when I had the sensor data name as s[0-9]+_offset. Right now
sensor data name is changed to s[0-9]+, I can reduce it to 8 based on
"mode0".
>
>> + int ret;
>> +
> [...]
>
>> +static int tsens_v2_calibration(struct tsens_priv *priv)
>> +{
>> + struct device *dev = priv->dev;
>> + u32 mode, base0, base1;
>> + int i, ret;
>> +
>> + if (priv->num_sensors > MAX_SENSORS)
>> + return -EINVAL;
>> +
>> + ret = nvmem_cell_read_variable_le_u32(priv->dev, "mode", &mode);
>> + if (ret == -ENOENT)
>> + dev_warn(priv->dev, "Calibration data not present in DT\n");
> I think bindings don't allow that anyway
Updated the bindings in [v3 2/5] and with that it is allowing.
>
>> + if (ret < 0)
>> + return ret;
>> +
>> + dev_dbg(priv->dev, "calibration mode is %d\n", mode);
>> +
>> + ret = nvmem_cell_read_variable_le_u32(priv->dev, "base0", &base0);
>> + if (ret < 0)
>> + return ret;
>> +
>> + ret = nvmem_cell_read_variable_le_u32(priv->dev, "base1", &base1);
>> + if (ret < 0)
>> + return ret;
>> +
>> + /* Calibrate each sensor */
>> + for (i = 0; i < priv->num_sensors; i++) {
>> + ret = tsens_v2_calibrate_sensor(dev, &priv->sensor[i], priv->srot_map,
>> + mode, base0, base1);
>> + if (ret < 0)
>> + return ret;
>> + }
>> +
>> + return 0;
>> +}
>> +
>> +static int __init init_tsens_v2_no_rpm(struct tsens_priv *priv)
>> +{
>> + int i, ret;
>> + u32 val = 0;
>> + struct device *dev = priv->dev;
> Reverse-Christmas-tree, please.
Sure, will update in next patch.
>
>> +
>> + ret = init_common(priv);
>> + if (ret < 0)
>> + return ret;
>> +
>> + priv->rf[CODE_OR_TEMP] = devm_regmap_field_alloc(dev, priv->srot_map,
>> + priv->fields[CODE_OR_TEMP]);
>> + if (IS_ERR(priv->rf[CODE_OR_TEMP]))
>> + return PTR_ERR(priv->rf[CODE_OR_TEMP]);
>> +
>> + priv->rf[MAIN_MEASURE_PERIOD] = devm_regmap_field_alloc(dev, priv->srot_map,
>> + priv->fields[MAIN_MEASURE_PERIOD]);
>> + if (IS_ERR(priv->rf[MAIN_MEASURE_PERIOD]))
>> + return PTR_ERR(priv->rf[MAIN_MEASURE_PERIOD]);
>> +
>> + regmap_field_write(priv->rf[TSENS_SW_RST], 0x1);
>> +
>> + /* Update measure period to 2ms */
> What's the unit? Can we name the 0x1 value?
Deci-Celcius is supported in hardware.
Sure, will name the values in the next patch.
>
>> + regmap_field_write(priv->rf[MAIN_MEASURE_PERIOD], 0x1);
>> +
>> + /* Enable available sensors */
>> + for (i = 0; i < priv->num_sensors; i++)
>> + val |= 1 << priv->sensor[i].hw_id;
>> +
>> + regmap_field_write(priv->rf[SENSOR_EN], val);
>> +
>> + /* Real temperature format */
> What does that mean?
Result format can be selected via the below write and supported format
is ADC Code or Temperature in deci-celcius. Added a comment to mention
selecting temperature format.
Will name the value and remove the comment.
>
>> + regmap_field_write(priv->rf[CODE_OR_TEMP], 0x1);
>> +
>> + regmap_field_write(priv->rf[TSENS_SW_RST], 0x0);
>> +
>> + /* Enable TSENS */
>> + regmap_field_write(priv->rf[TSENS_EN], 0x1);
> It would be really nice if you could provide the names of all these
> magic values.
Sure, will update in the next patch.
>
> Konrad
>> +
>> + return 0;
>> +}
>> +
>> static const struct tsens_ops ops_generic_v2 = {
>> .init = init_common,
>> .get_temp = get_temp_tsens_valid,
>> diff --git a/drivers/thermal/qcom/tsens.c b/drivers/thermal/qcom/tsens.c
>> index 98c356acfe98..9dc0c2150948 100644
>> --- a/drivers/thermal/qcom/tsens.c
>> +++ b/drivers/thermal/qcom/tsens.c
>> @@ -974,7 +974,7 @@ int __init init_common(struct tsens_priv *priv)
>> ret = regmap_field_read(priv->rf[TSENS_EN], &enabled);
>> if (ret)
>> goto err_put_device;
>> - if (!enabled) {
>> + if (!enabled && (tsens_version(priv) != VER_2_X_NO_RPM)) {
>> dev_err(dev, "%s: device not enabled\n", __func__);
>> ret = -ENODEV;
>> goto err_put_device;
>> diff --git a/drivers/thermal/qcom/tsens.h b/drivers/thermal/qcom/tsens.h
>> index 2805de1c6827..b2e8f0f2b466 100644
>> --- a/drivers/thermal/qcom/tsens.h
>> +++ b/drivers/thermal/qcom/tsens.h
>> @@ -35,6 +35,7 @@ enum tsens_ver {
>> VER_0_1,
>> VER_1_X,
>> VER_2_X,
>> + VER_2_X_NO_RPM,
>> };
>>
>> enum tsens_irq_type {
>> @@ -168,6 +169,8 @@ enum regfield_ids {
>> TSENS_SW_RST,
>> SENSOR_EN,
>> CODE_OR_TEMP,
>> + /* MEASURE_PERIOD */
>> + MAIN_MEASURE_PERIOD,
>>
>> /* ----- TM ------ */
>> /* TRDY */
--
Thanks,
Praveenkumar
^ permalink raw reply [flat|nested] 11+ messages in thread
* [PATCH v3 2/5] dt-bindings: thermal: tsens: Add ipq5332 compatible
2023-07-13 5:27 [PATCH v3 0/5] Add IPQ5332 TSENS support Praveenkumar I
2023-07-13 5:27 ` [PATCH v3 1/5] thermal/drivers/tsens: Add TSENS enable and calibration support for V2 Praveenkumar I
@ 2023-07-13 5:27 ` Praveenkumar I
2023-07-13 6:32 ` Krzysztof Kozlowski
2023-07-13 5:27 ` [PATCH v3 3/5] arm64: dts: qcom: ipq5332: Add tsens node Praveenkumar I
` (2 subsequent siblings)
4 siblings, 1 reply; 11+ messages in thread
From: Praveenkumar I @ 2023-07-13 5:27 UTC (permalink / raw)
To: amitk, thara.gopinath, agross, andersson, konrad.dybcio, rafael,
daniel.lezcano, rui.zhang, robh+dt, krzysztof.kozlowski+dt,
conor+dt, linux-pm, linux-arm-msm, devicetree, linux-kernel
Cc: quic_varada
IPQ5332 uses TSENS v2.3.3 with combined interrupt. RPM is not
available in the SoC, hence adding new compatible to have the
sensor enablement and calibration function.
This patch also adds nvmem-cell-names for ipq5332
Signed-off-by: Praveenkumar I <quic_ipkumar@quicinc.com>
---
[v3]:
No changes.
[v2]:
Followed the order for ipq5332 and added nvmem-cell-names.
.../devicetree/bindings/thermal/qcom-tsens.yaml | 12 ++++++++++++
1 file changed, 12 insertions(+)
diff --git a/Documentation/devicetree/bindings/thermal/qcom-tsens.yaml b/Documentation/devicetree/bindings/thermal/qcom-tsens.yaml
index 27e9e16e6455..cca115906762 100644
--- a/Documentation/devicetree/bindings/thermal/qcom-tsens.yaml
+++ b/Documentation/devicetree/bindings/thermal/qcom-tsens.yaml
@@ -69,6 +69,7 @@ properties:
- description: v2 of TSENS with combined interrupt
enum:
+ - qcom,ipq5332-tsens
- qcom,ipq8074-tsens
- description: v2 of TSENS with combined interrupt
@@ -205,6 +206,15 @@ properties:
- const: s9_p2_backup
- const: s10_p1_backup
- const: s10_p2_backup
+ - items:
+ - const: mode
+ - const: base0
+ - const: base1
+ - pattern: '^s[0-9]+$'
+ - pattern: '^s[0-9]+$'
+ - pattern: '^s[0-9]+$'
+ - pattern: '^s[0-9]+$'
+ - pattern: '^s[0-9]+$'
"#qcom,sensors":
description:
@@ -266,6 +276,7 @@ allOf:
compatible:
contains:
enum:
+ - qcom,ipq5332-tsens
- qcom,ipq8074-tsens
then:
properties:
@@ -281,6 +292,7 @@ allOf:
compatible:
contains:
enum:
+ - qcom,ipq5332-tsens
- qcom,ipq8074-tsens
- qcom,tsens-v0_1
- qcom,tsens-v1
--
The Qualcomm Innovation Center, Inc. is a member of the Code Aurora Forum,
a Linux Foundation Collaborative Project
^ permalink raw reply related [flat|nested] 11+ messages in thread* Re: [PATCH v3 2/5] dt-bindings: thermal: tsens: Add ipq5332 compatible
2023-07-13 5:27 ` [PATCH v3 2/5] dt-bindings: thermal: tsens: Add ipq5332 compatible Praveenkumar I
@ 2023-07-13 6:32 ` Krzysztof Kozlowski
0 siblings, 0 replies; 11+ messages in thread
From: Krzysztof Kozlowski @ 2023-07-13 6:32 UTC (permalink / raw)
To: Praveenkumar I, amitk, thara.gopinath, agross, andersson,
konrad.dybcio, rafael, daniel.lezcano, rui.zhang, robh+dt,
krzysztof.kozlowski+dt, conor+dt, linux-pm, linux-arm-msm,
devicetree, linux-kernel
Cc: quic_varada
On 13/07/2023 07:27, Praveenkumar I wrote:
> IPQ5332 uses TSENS v2.3.3 with combined interrupt. RPM is not
> available in the SoC, hence adding new compatible to have the
> sensor enablement and calibration function.
>
> This patch also adds nvmem-cell-names for ipq5332
>
> Signed-off-by: Praveenkumar I <quic_ipkumar@quicinc.com>
Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Best regards,
Krzysztof
^ permalink raw reply [flat|nested] 11+ messages in thread
* [PATCH v3 3/5] arm64: dts: qcom: ipq5332: Add tsens node
2023-07-13 5:27 [PATCH v3 0/5] Add IPQ5332 TSENS support Praveenkumar I
2023-07-13 5:27 ` [PATCH v3 1/5] thermal/drivers/tsens: Add TSENS enable and calibration support for V2 Praveenkumar I
2023-07-13 5:27 ` [PATCH v3 2/5] dt-bindings: thermal: tsens: Add ipq5332 compatible Praveenkumar I
@ 2023-07-13 5:27 ` Praveenkumar I
2023-07-13 5:27 ` [PATCH v3 4/5] arm64: dts: qcom: ipq5332: Add thermal zone nodes Praveenkumar I
2023-07-13 5:27 ` [PATCH v3 5/5] thermal/drivers/tsens: Add IPQ5332 support Praveenkumar I
4 siblings, 0 replies; 11+ messages in thread
From: Praveenkumar I @ 2023-07-13 5:27 UTC (permalink / raw)
To: amitk, thara.gopinath, agross, andersson, konrad.dybcio, rafael,
daniel.lezcano, rui.zhang, robh+dt, krzysztof.kozlowski+dt,
conor+dt, linux-pm, linux-arm-msm, devicetree, linux-kernel
Cc: quic_varada
IPQ5332 has tsens v2.3.3 peripheral. This patch adds the tsense
node with nvmem cells for calibration data.
Signed-off-by: Praveenkumar I <quic_ipkumar@quicinc.com>
---
[v3]:
Reordered device nodes according to the address.
[v2]:
Included qfprom nodes only for available sensors and removed
the offset suffix.
arch/arm64/boot/dts/qcom/ipq5332.dtsi | 66 +++++++++++++++++++++++++++
1 file changed, 66 insertions(+)
diff --git a/arch/arm64/boot/dts/qcom/ipq5332.dtsi b/arch/arm64/boot/dts/qcom/ipq5332.dtsi
index 8bfc2db44624..026f99fda00c 100644
--- a/arch/arm64/boot/dts/qcom/ipq5332.dtsi
+++ b/arch/arm64/boot/dts/qcom/ipq5332.dtsi
@@ -150,6 +150,46 @@ qfprom: efuse@a4000 {
reg = <0x000a4000 0x721>;
#address-cells = <1>;
#size-cells = <1>;
+
+ s11: s11@3a5 {
+ reg = <0x3a5 0x1>;
+ bits = <4 4>;
+ };
+
+ s12: s12@3a6 {
+ reg = <0x3a6 0x1>;
+ bits = <0 4>;
+ };
+
+ s13: s13@3a6 {
+ reg = <0x3a6 0x1>;
+ bits = <4 4>;
+ };
+
+ s14: s14@3ad {
+ reg = <0x3ad 0x2>;
+ bits = <7 4>;
+ };
+
+ s15: s15@3ae {
+ reg = <0x3ae 0x1>;
+ bits = <3 4>;
+ };
+
+ tsens_mode: mode@3e1 {
+ reg = <0x3e1 0x1>;
+ bits = <0 3>;
+ };
+
+ tsens_base0: base0@3e1 {
+ reg = <0x3e1 0x2>;
+ bits = <3 10>;
+ };
+
+ tsens_base1: base1@3e2 {
+ reg = <0x3e2 0x2>;
+ bits = <5 10>;
+ };
};
rng: rng@e3000 {
@@ -159,6 +199,32 @@ rng: rng@e3000 {
clock-names = "core";
};
+ tsens: thermal-sensor@4a9000 {
+ compatible = "qcom,ipq5332-tsens";
+ reg = <0x4a9000 0x1000>,
+ <0x4a8000 0x1000>;
+ nvmem-cells = <&tsens_mode>,
+ <&tsens_base0>,
+ <&tsens_base1>,
+ <&s11>,
+ <&s12>,
+ <&s13>,
+ <&s14>,
+ <&s15>;
+ nvmem-cell-names = "mode",
+ "base0",
+ "base1",
+ "s11",
+ "s12",
+ "s13",
+ "s14",
+ "s15";
+ interrupts = <GIC_SPI 320 IRQ_TYPE_LEVEL_HIGH>;
+ interrupt-names = "combined";
+ #qcom,sensors = <5>;
+ #thermal-sensor-cells = <1>;
+ };
+
tlmm: pinctrl@1000000 {
compatible = "qcom,ipq5332-tlmm";
reg = <0x01000000 0x300000>;
--
The Qualcomm Innovation Center, Inc. is a member of the Code Aurora Forum,
a Linux Foundation Collaborative Project
^ permalink raw reply related [flat|nested] 11+ messages in thread* [PATCH v3 4/5] arm64: dts: qcom: ipq5332: Add thermal zone nodes
2023-07-13 5:27 [PATCH v3 0/5] Add IPQ5332 TSENS support Praveenkumar I
` (2 preceding siblings ...)
2023-07-13 5:27 ` [PATCH v3 3/5] arm64: dts: qcom: ipq5332: Add tsens node Praveenkumar I
@ 2023-07-13 5:27 ` Praveenkumar I
2023-07-13 5:27 ` [PATCH v3 5/5] thermal/drivers/tsens: Add IPQ5332 support Praveenkumar I
4 siblings, 0 replies; 11+ messages in thread
From: Praveenkumar I @ 2023-07-13 5:27 UTC (permalink / raw)
To: amitk, thara.gopinath, agross, andersson, konrad.dybcio, rafael,
daniel.lezcano, rui.zhang, robh+dt, krzysztof.kozlowski+dt,
conor+dt, linux-pm, linux-arm-msm, devicetree, linux-kernel
Cc: quic_varada
This patch adds thermal zone nodes for sensors present in
IPQ5332.
Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Signed-off-by: Praveenkumar I <quic_ipkumar@quicinc.com>
---
[v3]:
Pick up R-b tag
[v2]:
Added passive trips and alignment change.
arch/arm64/boot/dts/qcom/ipq5332.dtsi | 78 +++++++++++++++++++++++++++
1 file changed, 78 insertions(+)
diff --git a/arch/arm64/boot/dts/qcom/ipq5332.dtsi b/arch/arm64/boot/dts/qcom/ipq5332.dtsi
index 026f99fda00c..fe9f0fdd44ee 100644
--- a/arch/arm64/boot/dts/qcom/ipq5332.dtsi
+++ b/arch/arm64/boot/dts/qcom/ipq5332.dtsi
@@ -480,4 +480,82 @@ timer {
<GIC_PPI 4 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>,
<GIC_PPI 1 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>;
};
+
+ thermal-zones {
+ rfa-0-thermal {
+ polling-delay-passive = <0>;
+ polling-delay = <0>;
+ thermal-sensors = <&tsens 11>;
+
+ trips {
+ rfa-0-critical {
+ temperature = <125000>;
+ hysteresis = <1000>;
+ type = "critical";
+ };
+ };
+ };
+
+ rfa-1-thermal {
+ polling-delay-passive = <0>;
+ polling-delay = <0>;
+ thermal-sensors = <&tsens 12>;
+
+ trips {
+ rfa-1-critical {
+ temperature = <125000>;
+ hysteresis = <1000>;
+ type = "critical";
+ };
+ };
+ };
+
+ misc-thermal {
+ polling-delay-passive = <0>;
+ polling-delay = <0>;
+ thermal-sensors = <&tsens 13>;
+
+ trips {
+ misc-critical {
+ temperature = <125000>;
+ hysteresis = <1000>;
+ type = "critical";
+ };
+ };
+ };
+
+ cpu-top-thermal {
+ polling-delay-passive = <0>;
+ polling-delay = <0>;
+ thermal-sensors = <&tsens 14>;
+
+ trips {
+ cpu-top-critical {
+ temperature = <115000>;
+ hysteresis = <1000>;
+ type = "critical";
+ };
+
+ cpu-passive {
+ temperature = <105000>;
+ hysteresis = <1000>;
+ type = "passive";
+ };
+ };
+ };
+
+ top-glue-thermal {
+ polling-delay-passive = <0>;
+ polling-delay = <0>;
+ thermal-sensors = <&tsens 15>;
+
+ trips {
+ top-glue-critical {
+ temperature = <125000>;
+ hysteresis = <1000>;
+ type = "critical";
+ };
+ };
+ };
+ };
};
--
The Qualcomm Innovation Center, Inc. is a member of the Code Aurora Forum,
a Linux Foundation Collaborative Project
^ permalink raw reply related [flat|nested] 11+ messages in thread* [PATCH v3 5/5] thermal/drivers/tsens: Add IPQ5332 support
2023-07-13 5:27 [PATCH v3 0/5] Add IPQ5332 TSENS support Praveenkumar I
` (3 preceding siblings ...)
2023-07-13 5:27 ` [PATCH v3 4/5] arm64: dts: qcom: ipq5332: Add thermal zone nodes Praveenkumar I
@ 2023-07-13 5:27 ` Praveenkumar I
2023-07-15 14:06 ` Konrad Dybcio
4 siblings, 1 reply; 11+ messages in thread
From: Praveenkumar I @ 2023-07-13 5:27 UTC (permalink / raw)
To: amitk, thara.gopinath, agross, andersson, konrad.dybcio, rafael,
daniel.lezcano, rui.zhang, robh+dt, krzysztof.kozlowski+dt,
conor+dt, linux-pm, linux-arm-msm, devicetree, linux-kernel
Cc: quic_varada
IPQ5332 uses tsens v2.3.3 IP and it is having combined interrupt.
It does not have RPM and kernel needs to take care of sensor
enablement, calibration. Hence introduced new feature_config,
ops and data for IPQ5332.
Signed-off-by: Praveenkumar I <quic_ipkumar@quicinc.com>
---
[v3]:
No changes.
[v2]:
Added tsens_features for ipq5332 with VER_2_X_NO_RPM. Used
hw_ids to mention the available sensors. Dropped v2 in
ops_ipq5332.
drivers/thermal/qcom/tsens-v2.c | 25 +++++++++++++++++++++++++
drivers/thermal/qcom/tsens.c | 3 +++
drivers/thermal/qcom/tsens.h | 2 +-
3 files changed, 29 insertions(+), 1 deletion(-)
diff --git a/drivers/thermal/qcom/tsens-v2.c b/drivers/thermal/qcom/tsens-v2.c
index 781595a9a622..e25d9d34e519 100644
--- a/drivers/thermal/qcom/tsens-v2.c
+++ b/drivers/thermal/qcom/tsens-v2.c
@@ -62,6 +62,17 @@ static struct tsens_features ipq8074_feat = {
.trip_max_temp = 204000,
};
+static struct tsens_features ipq5332_feat = {
+ .ver_major = VER_2_X_NO_RPM,
+ .crit_int = 1,
+ .combo_int = 1,
+ .adc = 0,
+ .srot_split = 1,
+ .max_sensors = 16,
+ .trip_min_temp = 0,
+ .trip_max_temp = 204000,
+};
+
static const struct reg_field tsens_v2_regfields[MAX_REGFIELDS] = {
/* ----- SROT ------ */
/* VERSION */
@@ -262,6 +273,20 @@ struct tsens_plat_data data_ipq8074 = {
.fields = tsens_v2_regfields,
};
+static const struct tsens_ops ops_ipq5332 = {
+ .init = init_tsens_v2_no_rpm,
+ .get_temp = get_temp_tsens_valid,
+ .calibrate = tsens_v2_calibration,
+};
+
+struct tsens_plat_data data_ipq5332 = {
+ .num_sensors = 5,
+ .ops = &ops_ipq5332,
+ .hw_ids = (unsigned int []){11, 12, 13, 14, 15},
+ .feat = &ipq5332_feat,
+ .fields = tsens_v2_regfields,
+};
+
/* Kept around for backward compatibility with old msm8996.dtsi */
struct tsens_plat_data data_8996 = {
.num_sensors = 13,
diff --git a/drivers/thermal/qcom/tsens.c b/drivers/thermal/qcom/tsens.c
index 9dc0c2150948..af58a94628a8 100644
--- a/drivers/thermal/qcom/tsens.c
+++ b/drivers/thermal/qcom/tsens.c
@@ -1106,6 +1106,9 @@ static const struct of_device_id tsens_table[] = {
}, {
.compatible = "qcom,ipq8074-tsens",
.data = &data_ipq8074,
+ }, {
+ .compatible = "qcom,ipq5332-tsens",
+ .data = &data_ipq5332,
}, {
.compatible = "qcom,mdm9607-tsens",
.data = &data_9607,
diff --git a/drivers/thermal/qcom/tsens.h b/drivers/thermal/qcom/tsens.h
index b2e8f0f2b466..1dde363914cd 100644
--- a/drivers/thermal/qcom/tsens.h
+++ b/drivers/thermal/qcom/tsens.h
@@ -648,6 +648,6 @@ extern struct tsens_plat_data data_8226, data_8909, data_8916, data_8939, data_8
extern struct tsens_plat_data data_tsens_v1, data_8976, data_8956;
/* TSENS v2 targets */
-extern struct tsens_plat_data data_8996, data_ipq8074, data_tsens_v2;
+extern struct tsens_plat_data data_8996, data_ipq8074, data_ipq5332, data_tsens_v2;
#endif /* __QCOM_TSENS_H__ */
--
The Qualcomm Innovation Center, Inc. is a member of the Code Aurora Forum,
a Linux Foundation Collaborative Project
^ permalink raw reply related [flat|nested] 11+ messages in thread* Re: [PATCH v3 5/5] thermal/drivers/tsens: Add IPQ5332 support
2023-07-13 5:27 ` [PATCH v3 5/5] thermal/drivers/tsens: Add IPQ5332 support Praveenkumar I
@ 2023-07-15 14:06 ` Konrad Dybcio
2023-07-17 4:48 ` Praveenkumar I
0 siblings, 1 reply; 11+ messages in thread
From: Konrad Dybcio @ 2023-07-15 14:06 UTC (permalink / raw)
To: Praveenkumar I, amitk, thara.gopinath, agross, andersson, rafael,
daniel.lezcano, rui.zhang, robh+dt, krzysztof.kozlowski+dt,
conor+dt, linux-pm, linux-arm-msm, devicetree, linux-kernel
Cc: quic_varada
On 13.07.2023 07:27, Praveenkumar I wrote:
> IPQ5332 uses tsens v2.3.3 IP and it is having combined interrupt.
> It does not have RPM and kernel needs to take care of sensor
> enablement, calibration. Hence introduced new feature_config,
> ops and data for IPQ5332.
>
> Signed-off-by: Praveenkumar I <quic_ipkumar@quicinc.com>
> ---
> [v3]:
> No changes.
> [v2]:
> Added tsens_features for ipq5332 with VER_2_X_NO_RPM. Used
> hw_ids to mention the available sensors. Dropped v2 in
> ops_ipq5332.
>
> drivers/thermal/qcom/tsens-v2.c | 25 +++++++++++++++++++++++++
> drivers/thermal/qcom/tsens.c | 3 +++
> drivers/thermal/qcom/tsens.h | 2 +-
> 3 files changed, 29 insertions(+), 1 deletion(-)
>
> diff --git a/drivers/thermal/qcom/tsens-v2.c b/drivers/thermal/qcom/tsens-v2.c
> index 781595a9a622..e25d9d34e519 100644
> --- a/drivers/thermal/qcom/tsens-v2.c
> +++ b/drivers/thermal/qcom/tsens-v2.c
> @@ -62,6 +62,17 @@ static struct tsens_features ipq8074_feat = {
> .trip_max_temp = 204000,
> };
>
> +static struct tsens_features ipq5332_feat = {
> + .ver_major = VER_2_X_NO_RPM,
> + .crit_int = 1,
> + .combo_int = 1,
> + .adc = 0,
> + .srot_split = 1,
> + .max_sensors = 16,
> + .trip_min_temp = 0,
> + .trip_max_temp = 204000,
204 degrees Celcius?
Konrad
> +};
> +
> static const struct reg_field tsens_v2_regfields[MAX_REGFIELDS] = {
> /* ----- SROT ------ */
> /* VERSION */
> @@ -262,6 +273,20 @@ struct tsens_plat_data data_ipq8074 = {
> .fields = tsens_v2_regfields,
> };
>
> +static const struct tsens_ops ops_ipq5332 = {
> + .init = init_tsens_v2_no_rpm,
> + .get_temp = get_temp_tsens_valid,
> + .calibrate = tsens_v2_calibration,
> +};
> +
> +struct tsens_plat_data data_ipq5332 = {
> + .num_sensors = 5,
> + .ops = &ops_ipq5332,
> + .hw_ids = (unsigned int []){11, 12, 13, 14, 15},
> + .feat = &ipq5332_feat,
> + .fields = tsens_v2_regfields,
> +};
> +
> /* Kept around for backward compatibility with old msm8996.dtsi */
> struct tsens_plat_data data_8996 = {
> .num_sensors = 13,
> diff --git a/drivers/thermal/qcom/tsens.c b/drivers/thermal/qcom/tsens.c
> index 9dc0c2150948..af58a94628a8 100644
> --- a/drivers/thermal/qcom/tsens.c
> +++ b/drivers/thermal/qcom/tsens.c
> @@ -1106,6 +1106,9 @@ static const struct of_device_id tsens_table[] = {
> }, {
> .compatible = "qcom,ipq8074-tsens",
> .data = &data_ipq8074,
> + }, {
> + .compatible = "qcom,ipq5332-tsens",
> + .data = &data_ipq5332,
> }, {
> .compatible = "qcom,mdm9607-tsens",
> .data = &data_9607,
> diff --git a/drivers/thermal/qcom/tsens.h b/drivers/thermal/qcom/tsens.h
> index b2e8f0f2b466..1dde363914cd 100644
> --- a/drivers/thermal/qcom/tsens.h
> +++ b/drivers/thermal/qcom/tsens.h
> @@ -648,6 +648,6 @@ extern struct tsens_plat_data data_8226, data_8909, data_8916, data_8939, data_8
> extern struct tsens_plat_data data_tsens_v1, data_8976, data_8956;
>
> /* TSENS v2 targets */
> -extern struct tsens_plat_data data_8996, data_ipq8074, data_tsens_v2;
> +extern struct tsens_plat_data data_8996, data_ipq8074, data_ipq5332, data_tsens_v2;
>
> #endif /* __QCOM_TSENS_H__ */
^ permalink raw reply [flat|nested] 11+ messages in thread* Re: [PATCH v3 5/5] thermal/drivers/tsens: Add IPQ5332 support
2023-07-15 14:06 ` Konrad Dybcio
@ 2023-07-17 4:48 ` Praveenkumar I
0 siblings, 0 replies; 11+ messages in thread
From: Praveenkumar I @ 2023-07-17 4:48 UTC (permalink / raw)
To: Konrad Dybcio, amitk, thara.gopinath, agross, andersson, rafael,
daniel.lezcano, rui.zhang, robh+dt, krzysztof.kozlowski+dt,
conor+dt, linux-pm, linux-arm-msm, devicetree, linux-kernel
Cc: quic_varada
On 7/15/2023 7:36 PM, Konrad Dybcio wrote:
> On 13.07.2023 07:27, Praveenkumar I wrote:
>> IPQ5332 uses tsens v2.3.3 IP and it is having combined interrupt.
>> It does not have RPM and kernel needs to take care of sensor
>> enablement, calibration. Hence introduced new feature_config,
>> ops and data for IPQ5332.
>>
>> Signed-off-by: Praveenkumar I <quic_ipkumar@quicinc.com>
>> ---
>> [v3]:
>> No changes.
>> [v2]:
>> Added tsens_features for ipq5332 with VER_2_X_NO_RPM. Used
>> hw_ids to mention the available sensors. Dropped v2 in
>> ops_ipq5332.
>>
>> drivers/thermal/qcom/tsens-v2.c | 25 +++++++++++++++++++++++++
>> drivers/thermal/qcom/tsens.c | 3 +++
>> drivers/thermal/qcom/tsens.h | 2 +-
>> 3 files changed, 29 insertions(+), 1 deletion(-)
>>
>> diff --git a/drivers/thermal/qcom/tsens-v2.c b/drivers/thermal/qcom/tsens-v2.c
>> index 781595a9a622..e25d9d34e519 100644
>> --- a/drivers/thermal/qcom/tsens-v2.c
>> +++ b/drivers/thermal/qcom/tsens-v2.c
>> @@ -62,6 +62,17 @@ static struct tsens_features ipq8074_feat = {
>> .trip_max_temp = 204000,
>> };
>>
>> +static struct tsens_features ipq5332_feat = {
>> + .ver_major = VER_2_X_NO_RPM,
>> + .crit_int = 1,
>> + .combo_int = 1,
>> + .adc = 0,
>> + .srot_split = 1,
>> + .max_sensors = 16,
>> + .trip_min_temp = 0,
>> + .trip_max_temp = 204000,
> 204 degrees Celcius?
Yes, it is 204 degrees celcius as like ipq8074.
> Konrad
>> +};
>> +
>> static const struct reg_field tsens_v2_regfields[MAX_REGFIELDS] = {
>> /* ----- SROT ------ */
>> /* VERSION */
>> @@ -262,6 +273,20 @@ struct tsens_plat_data data_ipq8074 = {
>> .fields = tsens_v2_regfields,
>> };
>>
>> +static const struct tsens_ops ops_ipq5332 = {
>> + .init = init_tsens_v2_no_rpm,
>> + .get_temp = get_temp_tsens_valid,
>> + .calibrate = tsens_v2_calibration,
>> +};
>> +
>> +struct tsens_plat_data data_ipq5332 = {
>> + .num_sensors = 5,
>> + .ops = &ops_ipq5332,
>> + .hw_ids = (unsigned int []){11, 12, 13, 14, 15},
>> + .feat = &ipq5332_feat,
>> + .fields = tsens_v2_regfields,
>> +};
>> +
>> /* Kept around for backward compatibility with old msm8996.dtsi */
>> struct tsens_plat_data data_8996 = {
>> .num_sensors = 13,
>> diff --git a/drivers/thermal/qcom/tsens.c b/drivers/thermal/qcom/tsens.c
>> index 9dc0c2150948..af58a94628a8 100644
>> --- a/drivers/thermal/qcom/tsens.c
>> +++ b/drivers/thermal/qcom/tsens.c
>> @@ -1106,6 +1106,9 @@ static const struct of_device_id tsens_table[] = {
>> }, {
>> .compatible = "qcom,ipq8074-tsens",
>> .data = &data_ipq8074,
>> + }, {
>> + .compatible = "qcom,ipq5332-tsens",
>> + .data = &data_ipq5332,
>> }, {
>> .compatible = "qcom,mdm9607-tsens",
>> .data = &data_9607,
>> diff --git a/drivers/thermal/qcom/tsens.h b/drivers/thermal/qcom/tsens.h
>> index b2e8f0f2b466..1dde363914cd 100644
>> --- a/drivers/thermal/qcom/tsens.h
>> +++ b/drivers/thermal/qcom/tsens.h
>> @@ -648,6 +648,6 @@ extern struct tsens_plat_data data_8226, data_8909, data_8916, data_8939, data_8
>> extern struct tsens_plat_data data_tsens_v1, data_8976, data_8956;
>>
>> /* TSENS v2 targets */
>> -extern struct tsens_plat_data data_8996, data_ipq8074, data_tsens_v2;
>> +extern struct tsens_plat_data data_8996, data_ipq8074, data_ipq5332, data_tsens_v2;
>>
>> #endif /* __QCOM_TSENS_H__ */
^ permalink raw reply [flat|nested] 11+ messages in thread