[PATCH v1 0/3] riscv: dts: starfive: jh71x0: Add temperature sensor nodes and thermal-zones

[PATCH v1 0/3] riscv: dts: starfive: jh71x0: Add temperature sensor nodes and thermal-zones

[Hal Feng]

Hi, Conor,

These patches add temperature sensor nodes and thermal-zones for the
StarFive JH71X0 SoC. I have tested them on the BeagleV Starlight board
and StarFive VisionFive 1 / 2 board. Thanks.

Best regards,
Hal

Hal Feng (3):
  riscv: dts: starfive: jh7100: Add temperature sensor node and
    thermal-zones
  riscv: dts: starfive: jh7110: Add temperature sensor node and
    thermal-zones
  MAINTAINERS: Add Hal as a maintainer of SFCTEMP HWMON DRIVER

 MAINTAINERS                              |  1 +
 arch/riscv/boot/dts/starfive/jh7100.dtsi | 37 +++++++++++++++++
 arch/riscv/boot/dts/starfive/jh7110.dtsi | 53 ++++++++++++++++++++++++
 3 files changed, 91 insertions(+)


base-commit: fdf0eaf11452d72945af31804e2a1048ee1b574c
-- 
2.38.1

[PATCH v1 1/3] riscv: dts: starfive: jh7100: Add temperature sensor node and thermal-zones

[Hal Feng]

Add temperature sensor and thermal-zones support for
the StarFive JH7100 SoC.

Co-developed-by: Emil Renner Berthing <kernel@esmil.dk>
Signed-off-by: Emil Renner Berthing <kernel@esmil.dk>
Signed-off-by: Hal Feng <hal.feng@starfivetech.com>
---
 arch/riscv/boot/dts/starfive/jh7100.dtsi | 37 ++++++++++++++++++++++++
 1 file changed, 37 insertions(+)

diff --git a/arch/riscv/boot/dts/starfive/jh7100.dtsi b/arch/riscv/boot/dts/starfive/jh7100.dtsi
index 4218621ea3b9..35ab54fb235f 100644
--- a/arch/riscv/boot/dts/starfive/jh7100.dtsi
+++ b/arch/riscv/boot/dts/starfive/jh7100.dtsi
@@ -80,6 +80,31 @@ core1 {
 		};
 	};
 
+	thermal-zones {
+		cpu-thermal {
+			polling-delay-passive = <250>;
+			polling-delay = <15000>;
+
+			thermal-sensors = <&sfctemp>;
+
+			trips {
+				cpu_alert0 {
+					/* milliCelsius */
+					temperature = <75000>;
+					hysteresis = <2000>;
+					type = "passive";
+				};
+
+				cpu_crit {
+					/* milliCelsius */
+					temperature = <90000>;
+					hysteresis = <2000>;
+					type = "critical";
+				};
+			};
+		};
+	};
+
 	osc_sys: osc_sys {
 		compatible = "fixed-clock";
 		#clock-cells = <0>;
@@ -248,5 +273,17 @@ watchdog@12480000 {
 			resets = <&rstgen JH7100_RSTN_WDTIMER_APB>,
 				 <&rstgen JH7100_RSTN_WDT>;
 		};
+
+		sfctemp: temperature-sensor@124a0000 {
+			compatible = "starfive,jh7100-temp";
+			reg = <0x0 0x124a0000 0x0 0x10000>;
+			clocks = <&clkgen JH7100_CLK_TEMP_SENSE>,
+				 <&clkgen JH7100_CLK_TEMP_APB>;
+			clock-names = "sense", "bus";
+			resets = <&rstgen JH7100_RSTN_TEMP_SENSE>,
+				 <&rstgen JH7100_RSTN_TEMP_APB>;
+			reset-names = "sense", "bus";
+			#thermal-sensor-cells = <0>;
+		};
 	};
 };
-- 
2.38.1

[PATCH v1 2/3] riscv: dts: starfive: jh7110: Add temperature sensor node and thermal-zones

[Hal Feng]

Add temperature sensor and thermal-zones support for
the StarFive JH7110 SoC. CPUFreq cooling is supported
in thermal-zones.

Co-developed-by: Emil Renner Berthing <kernel@esmil.dk>
Signed-off-by: Emil Renner Berthing <kernel@esmil.dk>
Signed-off-by: Hal Feng <hal.feng@starfivetech.com>
---
 arch/riscv/boot/dts/starfive/jh7110.dtsi | 53 ++++++++++++++++++++++++
 1 file changed, 53 insertions(+)

diff --git a/arch/riscv/boot/dts/starfive/jh7110.dtsi b/arch/riscv/boot/dts/starfive/jh7110.dtsi
index ec2e70011a73..2315acd560a3 100644
--- a/arch/riscv/boot/dts/starfive/jh7110.dtsi
+++ b/arch/riscv/boot/dts/starfive/jh7110.dtsi
@@ -7,6 +7,7 @@
 /dts-v1/;
 #include <dt-bindings/clock/starfive,jh7110-crg.h>
 #include <dt-bindings/reset/starfive,jh7110-crg.h>
+#include <dt-bindings/thermal/thermal.h>
 
 / {
 	compatible = "starfive,jh7110";
@@ -56,6 +57,7 @@ U74_1: cpu@1 {
 			operating-points-v2 = <&cpu_opp>;
 			clocks = <&syscrg JH7110_SYSCLK_CPU_CORE>;
 			clock-names = "cpu";
+			#cooling-cells = <2>;
 
 			cpu1_intc: interrupt-controller {
 				compatible = "riscv,cpu-intc";
@@ -85,6 +87,7 @@ U74_2: cpu@2 {
 			operating-points-v2 = <&cpu_opp>;
 			clocks = <&syscrg JH7110_SYSCLK_CPU_CORE>;
 			clock-names = "cpu";
+			#cooling-cells = <2>;
 
 			cpu2_intc: interrupt-controller {
 				compatible = "riscv,cpu-intc";
@@ -114,6 +117,7 @@ U74_3: cpu@3 {
 			operating-points-v2 = <&cpu_opp>;
 			clocks = <&syscrg JH7110_SYSCLK_CPU_CORE>;
 			clock-names = "cpu";
+			#cooling-cells = <2>;
 
 			cpu3_intc: interrupt-controller {
 				compatible = "riscv,cpu-intc";
@@ -143,6 +147,7 @@ U74_4: cpu@4 {
 			operating-points-v2 = <&cpu_opp>;
 			clocks = <&syscrg JH7110_SYSCLK_CPU_CORE>;
 			clock-names = "cpu";
+			#cooling-cells = <2>;
 
 			cpu4_intc: interrupt-controller {
 				compatible = "riscv,cpu-intc";
@@ -197,6 +202,42 @@ opp-1500000000 {
 			};
 	};
 
+	thermal-zones {
+		cpu-thermal {
+			polling-delay-passive = <250>;
+			polling-delay = <15000>;
+
+			thermal-sensors = <&sfctemp>;
+
+			cooling-maps {
+				map0 {
+					trip = <&cpu_alert0>;
+					cooling-device =
+						<&U74_1 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
+						<&U74_2 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
+						<&U74_3 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
+						<&U74_4 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>;
+				};
+			};
+
+			trips {
+				cpu_alert0: cpu_alert0 {
+					/* milliCelsius */
+					temperature = <85000>;
+					hysteresis = <2000>;
+					type = "passive";
+				};
+
+				cpu_crit {
+					/* milliCelsius */
+					temperature = <100000>;
+					hysteresis = <2000>;
+					type = "critical";
+				};
+			};
+		};
+	};
+
 	gmac0_rgmii_rxin: gmac0-rgmii-rxin-clock {
 		compatible = "fixed-clock";
 		clock-output-names = "gmac0_rgmii_rxin";
@@ -473,6 +514,18 @@ i2c6: i2c@12060000 {
 			status = "disabled";
 		};
 
+		sfctemp: temperature-sensor@120e0000 {
+			compatible = "starfive,jh7110-temp";
+			reg = <0x0 0x120e0000 0x0 0x10000>;
+			clocks = <&syscrg JH7110_SYSCLK_TEMP_CORE>,
+				 <&syscrg JH7110_SYSCLK_TEMP_APB>;
+			clock-names = "sense", "bus";
+			resets = <&syscrg JH7110_SYSRST_TEMP_CORE>,
+				 <&syscrg JH7110_SYSRST_TEMP_APB>;
+			reset-names = "sense", "bus";
+			#thermal-sensor-cells = <0>;
+		};
+
 		syscrg: clock-controller@13020000 {
 			compatible = "starfive,jh7110-syscrg";
 			reg = <0x0 0x13020000 0x0 0x10000>;
-- 
2.38.1

[PATCH v1 3/3] MAINTAINERS: Add Hal as a maintainer of SFCTEMP HWMON DRIVER

[Hal Feng]

As he is the submitter of this driver, add his mail so he can
maintain the driver and easily reply in the mailing list.

Signed-off-by: Hal Feng <hal.feng@starfivetech.com>
---
 MAINTAINERS | 1 +
 1 file changed, 1 insertion(+)

diff --git a/MAINTAINERS b/MAINTAINERS
index aee340630eca..5056079ade77 100644
--- a/MAINTAINERS
+++ b/MAINTAINERS
@@ -19256,6 +19256,7 @@ F:	drivers/net/ethernet/sfc/
 
 SFCTEMP HWMON DRIVER
 M:	Emil Renner Berthing <kernel@esmil.dk>
+M:	Hal Feng <hal.feng@starfivetech.com>
 L:	linux-hwmon@vger.kernel.org
 S:	Maintained
 F:	Documentation/devicetree/bindings/hwmon/starfive,jh71x0-temp.yaml
-- 
2.38.1

Re: [PATCH v1 3/3] MAINTAINERS: Add Hal as a maintainer of SFCTEMP HWMON DRIVER

[Conor Dooley]

[-- Attachment #1: Type: text/plain, Size: 856 bytes --]

On Tue, Jul 18, 2023 at 11:49:37AM +0800, Hal Feng wrote:
> As he is the submitter of this driver, add his mail so he can
> maintain the driver and easily reply in the mailing list.
> 
> Signed-off-by: Hal Feng <hal.feng@starfivetech.com>
> ---
>  MAINTAINERS | 1 +
>  1 file changed, 1 insertion(+)
> 
> diff --git a/MAINTAINERS b/MAINTAINERS
> index aee340630eca..5056079ade77 100644
> --- a/MAINTAINERS
> +++ b/MAINTAINERS
> @@ -19256,6 +19256,7 @@ F:	drivers/net/ethernet/sfc/
>  
>  SFCTEMP HWMON DRIVER
>  M:	Emil Renner Berthing <kernel@esmil.dk>
> +M:	Hal Feng <hal.feng@starfivetech.com>
>  L:	linux-hwmon@vger.kernel.org
>  S:	Maintained
>  F:	Documentation/devicetree/bindings/hwmon/starfive,jh71x0-temp.yaml

Whatever about the other patches in this series, this one certainly
needs an Ack from Emil.

Thanks,
Conor.

[-- Attachment #2: signature.asc --]
[-- Type: application/pgp-signature, Size: 228 bytes --]

Re: [PATCH v1 3/3] MAINTAINERS: Add Hal as a maintainer of SFCTEMP HWMON DRIVER

[Hal Feng]

On Tue, 18 Jul 2023 15:20:15 +0100, Conor Dooley wrote:
> On Tue, Jul 18, 2023 at 11:49:37AM +0800, Hal Feng wrote:
>> As he is the submitter of this driver, add his mail so he can
>> maintain the driver and easily reply in the mailing list.
>> 
>> Signed-off-by: Hal Feng <hal.feng@starfivetech.com>
>> ---
>>  MAINTAINERS | 1 +
>>  1 file changed, 1 insertion(+)
>> 
>> diff --git a/MAINTAINERS b/MAINTAINERS
>> index aee340630eca..5056079ade77 100644
>> --- a/MAINTAINERS
>> +++ b/MAINTAINERS
>> @@ -19256,6 +19256,7 @@ F:	drivers/net/ethernet/sfc/
>>  
>>  SFCTEMP HWMON DRIVER
>>  M:	Emil Renner Berthing <kernel@esmil.dk>
>> +M:	Hal Feng <hal.feng@starfivetech.com>
>>  L:	linux-hwmon@vger.kernel.org
>>  S:	Maintained
>>  F:	Documentation/devicetree/bindings/hwmon/starfive,jh71x0-temp.yaml
> 
> Whatever about the other patches in this series, this one certainly
> needs an Ack from Emil.

Hi @Emil,

Would you mind adding me as one of the maintainers of this driver?
Within StarFive, I was appointed to maintain this driver.

Best regards,
Hal

Re: [PATCH v1 3/3] MAINTAINERS: Add Hal as a maintainer of SFCTEMP HWMON DRIVER

[Emil Renner Berthing]

On Fri, 21 Jul 2023 at 05:24, Hal Feng <hal.feng@starfivetech.com> wrote:
> On Tue, 18 Jul 2023 15:20:15 +0100, Conor Dooley wrote:
> > On Tue, Jul 18, 2023 at 11:49:37AM +0800, Hal Feng wrote:
> >> As he is the submitter of this driver, add his mail so he can
> >> maintain the driver and easily reply in the mailing list.
> >>
> >> Signed-off-by: Hal Feng <hal.feng@starfivetech.com>
> >> ---
> >>  MAINTAINERS | 1 +
> >>  1 file changed, 1 insertion(+)
> >>
> >> diff --git a/MAINTAINERS b/MAINTAINERS
> >> index aee340630eca..5056079ade77 100644
> >> --- a/MAINTAINERS
> >> +++ b/MAINTAINERS
> >> @@ -19256,6 +19256,7 @@ F:   drivers/net/ethernet/sfc/
> >>
> >>  SFCTEMP HWMON DRIVER
> >>  M:  Emil Renner Berthing <kernel@esmil.dk>
> >> +M:  Hal Feng <hal.feng@starfivetech.com>
> >>  L:  linux-hwmon@vger.kernel.org
> >>  S:  Maintained
> >>  F:  Documentation/devicetree/bindings/hwmon/starfive,jh71x0-temp.yaml
> >
> > Whatever about the other patches in this series, this one certainly
> > needs an Ack from Emil.
>
> Hi @Emil,
>
> Would you mind adding me as one of the maintainers of this driver?
> Within StarFive, I was appointed to maintain this driver.

Hey, sorry about the late reply. That's absolutely fine by me.

/Emil

> Best regards,
> Hal

Re: [PATCH v1 3/3] MAINTAINERS: Add Hal as a maintainer of SFCTEMP HWMON DRIVER

[Emil Renner Berthing]

On Tue, 18 Jul 2023 at 05:49, Hal Feng <hal.feng@starfivetech.com> wrote:
> As he is the submitter of this driver, add his mail so he can
> maintain the driver and easily reply in the mailing list.
>

Acked-by: Emil Renner Berthing <kernel@esmil.dk>

> Signed-off-by: Hal Feng <hal.feng@starfivetech.com>
> ---
>  MAINTAINERS | 1 +
>  1 file changed, 1 insertion(+)
>
> diff --git a/MAINTAINERS b/MAINTAINERS
> index aee340630eca..5056079ade77 100644
> --- a/MAINTAINERS
> +++ b/MAINTAINERS
> @@ -19256,6 +19256,7 @@ F:      drivers/net/ethernet/sfc/
>
>  SFCTEMP HWMON DRIVER
>  M:     Emil Renner Berthing <kernel@esmil.dk>
> +M:     Hal Feng <hal.feng@starfivetech.com>
>  L:     linux-hwmon@vger.kernel.org
>  S:     Maintained
>  F:     Documentation/devicetree/bindings/hwmon/starfive,jh71x0-temp.yaml
> --
> 2.38.1
>

Re: (subset) [PATCH v1 0/3] riscv: dts: starfive: jh71x0: Add temperature sensor nodes and thermal-zones

[Conor Dooley]

From: Conor Dooley <conor.dooley@microchip.com>

On Tue, 18 Jul 2023 11:49:34 +0800, Hal Feng wrote:
> These patches add temperature sensor nodes and thermal-zones for the
> StarFive JH71X0 SoC. I have tested them on the BeagleV Starlight board
> and StarFive VisionFive 1 / 2 board. Thanks.
> 
> Best regards,
> Hal
> 
> [...]

Applied to riscv-dt-for-next, thanks!

[1/3] riscv: dts: starfive: jh7100: Add temperature sensor node and thermal-zones
      https://git.kernel.org/conor/c/0417c587420f
[2/3] riscv: dts: starfive: jh7110: Add temperature sensor node and thermal-zones
      https://git.kernel.org/conor/c/54ab0b6b85d4

Thanks,
Conor.