From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 3BD4FC001DE for ; Mon, 24 Jul 2023 11:29:34 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S231689AbjGXL3d (ORCPT ); Mon, 24 Jul 2023 07:29:33 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:49736 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S231650AbjGXL3a (ORCPT ); Mon, 24 Jul 2023 07:29:30 -0400 Received: from mail-pf1-x432.google.com (mail-pf1-x432.google.com [IPv6:2607:f8b0:4864:20::432]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 62345E64 for ; Mon, 24 Jul 2023 04:29:29 -0700 (PDT) Received: by mail-pf1-x432.google.com with SMTP id d2e1a72fcca58-666eec46206so4038186b3a.3 for ; Mon, 24 Jul 2023 04:29:29 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; t=1690198169; x=1690802969; h=in-reply-to:content-transfer-encoding:content-disposition :mime-version:references:message-id:subject:cc:to:from:date:from:to :cc:subject:date:message-id:reply-to; bh=tH1KzEb9LDaTk96IPzTkrIp1SW5M233TgMxWfs0J9LI=; b=XMLazlr3dttQGvZf/4ZP8kfG3D25JCLt0KIklb43ZXZ3FbiY2GixMfiIL6FMQoRvbd 765/JqWDzC4Qe+7JpMiAcv/f8IA27jCddJ1TnnDlnBAkOeDqAURaAmDdulo+kkcIzsMd QnNNZvz2OxyVlxcOgwtLprxNYbA9mzvjeQ+HfCIq94GlwUyccjCGarmGbp10Yk0n5eT0 xnk5CTHA5erhtBi4aCYUttOOJoRprULfhVJzwTS3lW8NzF6nWxttvfQ2A8YhhI0SPRv1 1UkTabOTkotwPa0qtK9hClebAi2NuctKWfL+u5L3WM+Wg5H9ma3CBUTmpYDJ66FVD3mk HP7A== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20221208; t=1690198169; x=1690802969; h=in-reply-to:content-transfer-encoding:content-disposition :mime-version:references:message-id:subject:cc:to:from:date :x-gm-message-state:from:to:cc:subject:date:message-id:reply-to; bh=tH1KzEb9LDaTk96IPzTkrIp1SW5M233TgMxWfs0J9LI=; b=c0KeMMdp27uQhZlkcMKkOipoZY7CHN2OfVHTUCMcy8bKJh47pr9yKNjC5PAxj9wrp/ 9H0G9rjMSN65Lx2P50Udpc0IAPWAOYyLtyCLaPeuNG4vSkolzCquf4NLetCpBUmDrVIc A++KzlkBi8vK+s0jCb3/JO8KWP2JXd29adixIMtdKMuppG7FSwPqUlcY4H+ILPfQT48V 6s0Tcsahpz0/hJuIElzby6HkqoJrTfZcWeZCQOe2eb5WzVInYRa5REHOxwbLXATFSp+x 5+irOMYWNwvhTZoCVnxGw/qJX5STbOO+z5rMmXfYG9CNwtspDkhJpPYFMn+/88tqXFK+ kqQw== X-Gm-Message-State: ABy/qLZGBxOnGJJ1w6oN/7jQfM+IbC9I3RvKzxAlAt+fIkc1DKwUOnYt EztjIizX8Sn6g9VLXngMG/fT X-Google-Smtp-Source: APBJJlGYCB+TMgYAep6VE5U5sZAM60sGkdTbx1IkkJ53ohprQAyGtHxXEIpF9khhqYe5gzQbsJbv9w== X-Received: by 2002:a05:6a00:2ea6:b0:682:4e4c:48bc with SMTP id fd38-20020a056a002ea600b006824e4c48bcmr11463465pfb.21.1690198168857; Mon, 24 Jul 2023 04:29:28 -0700 (PDT) Received: from thinkpad ([117.206.118.29]) by smtp.gmail.com with ESMTPSA id k3-20020a63ab43000000b0055c090df2fasm8209624pgp.93.2023.07.24.04.29.23 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 24 Jul 2023 04:29:28 -0700 (PDT) Date: Mon, 24 Jul 2023 16:59:19 +0530 From: Manivannan Sadhasivam To: Yoshihiro Shimoda Cc: jingoohan1@gmail.com, gustavo.pimentel@synopsys.com, lpieralisi@kernel.org, robh+dt@kernel.org, kw@linux.com, bhelgaas@google.com, kishon@kernel.org, krzysztof.kozlowski+dt@linaro.org, conor+dt@kernel.org, marek.vasut+renesas@gmail.com, fancer.lancer@gmail.com, linux-pci@vger.kernel.org, devicetree@vger.kernel.org, linux-renesas-soc@vger.kernel.org, Thierry Reding , Jonathan Hunter Subject: Re: [PATCH v18 10/20] PCI: tegra194: Drop PCI_EXP_LNKSTA_NLW setting. Message-ID: <20230724112919.GI6291@thinkpad> References: <20230721074452.65545-1-yoshihiro.shimoda.uh@renesas.com> <20230721074452.65545-11-yoshihiro.shimoda.uh@renesas.com> MIME-Version: 1.0 Content-Type: text/plain; charset=utf-8 Content-Disposition: inline Content-Transfer-Encoding: 8bit In-Reply-To: <20230721074452.65545-11-yoshihiro.shimoda.uh@renesas.com> Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org Remove full stop from subject. On Fri, Jul 21, 2023 at 04:44:42PM +0900, Yoshihiro Shimoda wrote: > dw_pcie_setup() will set PCI_EXP_LNKSTA_NLW to PCI_EXP_LNKCAP register > so that drop such setting from tegra_pcie_dw_host_init(). > How about, dw_pcie_setup() is already setting PCI_EXP_LNKCAP_MLW to pcie->num_lanes in the PCI_EXP_LNKCAP register for programming maximum link width. Hence, remove the redundant setting here. > Signed-off-by: Yoshihiro Shimoda With that, Reviewed-by: Manivannan Sadhasivam - Mani > Cc: Thierry Reding > Cc: Jonathan Hunter > Reviewed-by: Serge Semin > --- > drivers/pci/controller/dwc/pcie-tegra194.c | 6 ------ > 1 file changed, 6 deletions(-) > > diff --git a/drivers/pci/controller/dwc/pcie-tegra194.c b/drivers/pci/controller/dwc/pcie-tegra194.c > index 85cc64324efd..3bba174b1701 100644 > --- a/drivers/pci/controller/dwc/pcie-tegra194.c > +++ b/drivers/pci/controller/dwc/pcie-tegra194.c > @@ -922,12 +922,6 @@ static int tegra_pcie_dw_host_init(struct dw_pcie_rp *pp) > AMBA_ERROR_RESPONSE_CRS_SHIFT); > dw_pcie_writel_dbi(pci, PORT_LOGIC_AMBA_ERROR_RESPONSE_DEFAULT, val); > > - /* Configure Max lane width from DT */ > - val = dw_pcie_readl_dbi(pci, pcie->pcie_cap_base + PCI_EXP_LNKCAP); > - val &= ~PCI_EXP_LNKCAP_MLW; > - val |= (pcie->num_lanes << PCI_EXP_LNKSTA_NLW_SHIFT); > - dw_pcie_writel_dbi(pci, pcie->pcie_cap_base + PCI_EXP_LNKCAP, val); > - > /* Clear Slot Clock Configuration bit if SRNS configuration */ > if (pcie->enable_srns) { > val_16 = dw_pcie_readw_dbi(pci, pcie->pcie_cap_base + > -- > 2.25.1 > -- மணிவண்ணன் சதாசிவம்