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From: Shawn Guo <shawnguo@kernel.org>
To: Josua Mayer <josua@solid-run.com>
Cc: devicetree@vger.kernel.org, linux-kernel@vger.kernel.org,
	linux-arm-kernel@lists.infradead.org,
	Sascha Hauer <s.hauer@pengutronix.de>,
	Pengutronix Kernel Team <kernel@pengutronix.de>,
	Fabio Estevam <festevam@gmail.com>,
	NXP Linux Team <linux-imx@nxp.com>,
	Rob Herring <robh+dt@kernel.org>,
	Krzysztof Kozlowski <krzysztof.kozlowski+dt@linaro.org>,
	Conor Dooley <conor+dt@kernel.org>, Li Yang <leoyang.li@nxp.com>
Subject: Re: [PATCH v3 4/4] arm64: dts: freescale: Add support for LX2162 SoM & Clearfog Board
Date: Sun, 30 Jul 2023 11:01:23 +0800	[thread overview]
Message-ID: <20230730030123.GS151430@dragon> (raw)
In-Reply-To: <1ab424ee-21a8-9ca4-e792-3222e68e1098@solid-run.com>

On Sun, Jul 23, 2023 at 12:37:38PM +0200, Josua Mayer wrote:
> Hi Shawn,
> 
> Thank you for reviewing.
> 
> Note I have added a general question inline below.
> 
> Am 18.07.23 um 04:46 schrieb Shawn Guo:
> > On Mon, Jun 19, 2023 at 12:00:26PM +0300, Josua Mayer wrote:
> > > Add support for the SolidRun LX2162A System on Module (SoM), and the
> > > Clearfog evaluation board.
> 
> > > +&dpmac11 {
> > > +	status = "okay";
> > We generally end property list with 'status'.
> Okay, I will change the order for v4.
> > 
> > Shawn
> > 
> > > +	phys = <&serdes_2 0>;
> > > +	phy-handle = <&ethernet_phy2>;
> > > +	phy-connection-type = "sgmii";
> > > +};
> > > +
> > > +&emdio1 {
> > > +	/*
> > > +	 * SoM has a phy at address 1 connected to SoC Ethernet Controller 1.
> > > +	 * It competes for WRIOP MAC17, and no connector has been wired.
> > > +	 */
> > > +	/delete-node/ ethernet-phy@1;
> Perhaps somebody can help here on what is best practice:
> As outlined in the comment the SoM includes an ethernet phy at address 1,
> which is not used at all by the Clearfog carrier.
> 
> What is the best practice for unused but available components?

If you are saying the connector is not wired on Clearfog, it might make
more sense to give it a disabled status in clearfog dts, IMO.

Shawn

> 
> The phy can still communicate on mdio - just it will never receive rgmii
> signals from ether cpu or carrier.
> I am leaning towards just keeping it with status okay, if only for the
> prospect that a smart driver might put it in a power-saving mode.
> 
> > > +
> > > +	ethernet_phy0: ethernet-phy@8 {
> > > +		compatible = "ethernet-phy-ieee802.3-c45";
> > > +		reg = <8>;
> > > +		max-speed = <1000>;
> > > +	};
> > > +

      reply	other threads:[~2023-07-30  3:01 UTC|newest]

Thread overview: 8+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2023-06-19  9:00 [PATCH v3 0/4] arm64: dts: freescale: Add support for LX2162 SoM & Clearfog Board Josua Mayer
2023-06-19  9:00 ` [PATCH v3 1/4] arm64: dts: lx2160a: describe the SerDes block #2 Josua Mayer
2023-06-19  9:00 ` [PATCH v3 2/4] dt-bindings: net: dpaa2 mac: add phys property Josua Mayer
2023-06-19  9:00 ` [PATCH v3 3/4] dt-bindings: arm: Add SolidRun LX2162A SoM & Clearfog Board Josua Mayer
2023-06-19  9:00 ` [PATCH v3 4/4] arm64: dts: freescale: Add support for LX2162 " Josua Mayer
2023-07-18  2:46   ` Shawn Guo
2023-07-23 10:37     ` Josua Mayer
2023-07-30  3:01       ` Shawn Guo [this message]

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