* [PATCH 1/5] arm: dts: ti: omap: omap36xx: Rename opp_supply nodename
2023-07-24 15:39 [PATCH 0/5] dt-bindings: opp/cpufreq: Convert ti-cpufreq to Nishanth Menon
@ 2023-07-24 15:39 ` Nishanth Menon
2023-07-28 7:52 ` Dhruva Gole
2023-07-24 15:39 ` [PATCH 2/5] arm: dts: ti: omap: am5729-beagleboneai: Drop the OPP Nishanth Menon
` (3 subsequent siblings)
4 siblings, 1 reply; 12+ messages in thread
From: Nishanth Menon @ 2023-07-24 15:39 UTC (permalink / raw)
To: Tony Lindgren, Benoît Cousson, Stephen Boyd, Nishanth Menon,
Conor Dooley, Krzysztof Kozlowski, Rob Herring, Viresh Kumar,
Rafael J. Wysocki
Cc: Vibhore Vardhan, Dhruva Gole, linux-omap, linux-kernel,
devicetree, linux-pm, linux-arm-kernel
Use opp-supply as the proper node name.
Signed-off-by: Nishanth Menon <nm@ti.com>
---
Should probably go via Tony's tree.
arch/arm/boot/dts/ti/omap/omap36xx.dtsi | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/arch/arm/boot/dts/ti/omap/omap36xx.dtsi b/arch/arm/boot/dts/ti/omap/omap36xx.dtsi
index fff9c3d34193..50e640a32b5c 100644
--- a/arch/arm/boot/dts/ti/omap/omap36xx.dtsi
+++ b/arch/arm/boot/dts/ti/omap/omap36xx.dtsi
@@ -71,7 +71,7 @@ opp1g-1000000000 {
};
};
- opp_supply_mpu_iva: opp_supply {
+ opp_supply_mpu_iva: opp-supply {
compatible = "ti,omap-opp-supply";
ti,absolute-max-voltage-uv = <1375000>;
};
--
2.40.0
^ permalink raw reply related [flat|nested] 12+ messages in thread* Re: [PATCH 1/5] arm: dts: ti: omap: omap36xx: Rename opp_supply nodename
2023-07-24 15:39 ` [PATCH 1/5] arm: dts: ti: omap: omap36xx: Rename opp_supply nodename Nishanth Menon
@ 2023-07-28 7:52 ` Dhruva Gole
0 siblings, 0 replies; 12+ messages in thread
From: Dhruva Gole @ 2023-07-28 7:52 UTC (permalink / raw)
To: Nishanth Menon
Cc: Tony Lindgren, Benoît Cousson, Stephen Boyd, Conor Dooley,
Krzysztof Kozlowski, Rob Herring, Viresh Kumar, Rafael J. Wysocki,
Vibhore Vardhan, linux-omap, linux-kernel, devicetree, linux-pm,
linux-arm-kernel
On Jul 24, 2023 at 10:39:07 -0500, Nishanth Menon wrote:
> Use opp-supply as the proper node name.
>
> Signed-off-by: Nishanth Menon <nm@ti.com>
> ---
>
> Should probably go via Tony's tree.
>
> arch/arm/boot/dts/ti/omap/omap36xx.dtsi | 2 +-
> 1 file changed, 1 insertion(+), 1 deletion(-)
>
> diff --git a/arch/arm/boot/dts/ti/omap/omap36xx.dtsi b/arch/arm/boot/dts/ti/omap/omap36xx.dtsi
> index fff9c3d34193..50e640a32b5c 100644
> --- a/arch/arm/boot/dts/ti/omap/omap36xx.dtsi
> +++ b/arch/arm/boot/dts/ti/omap/omap36xx.dtsi
> @@ -71,7 +71,7 @@ opp1g-1000000000 {
> };
> };
>
> - opp_supply_mpu_iva: opp_supply {
> + opp_supply_mpu_iva: opp-supply {
Reviewed-by: Dhruva Gole <d-gole@ti.com>
> compatible = "ti,omap-opp-supply";
> ti,absolute-max-voltage-uv = <1375000>;
> };
> --
> 2.40.0
>
--
Best regards,
Dhruva Gole <d-gole@ti.com>
^ permalink raw reply [flat|nested] 12+ messages in thread
* [PATCH 2/5] arm: dts: ti: omap: am5729-beagleboneai: Drop the OPP
2023-07-24 15:39 [PATCH 0/5] dt-bindings: opp/cpufreq: Convert ti-cpufreq to Nishanth Menon
2023-07-24 15:39 ` [PATCH 1/5] arm: dts: ti: omap: omap36xx: Rename opp_supply nodename Nishanth Menon
@ 2023-07-24 15:39 ` Nishanth Menon
2023-07-24 15:39 ` [PATCH 3/5] arm: dts: ti: omap: Fix OPP table node names Nishanth Menon
` (2 subsequent siblings)
4 siblings, 0 replies; 12+ messages in thread
From: Nishanth Menon @ 2023-07-24 15:39 UTC (permalink / raw)
To: Tony Lindgren, Benoît Cousson, Stephen Boyd, Nishanth Menon,
Conor Dooley, Krzysztof Kozlowski, Rob Herring, Viresh Kumar,
Rafael J. Wysocki
Cc: Vibhore Vardhan, Dhruva Gole, linux-omap, linux-kernel,
devicetree, linux-pm, linux-arm-kernel
opp_slow is not defined in the table in dra7 or derivatives, drop the
definition.
Signed-off-by: Nishanth Menon <nm@ti.com>
---
Should probably go via Tony's tree
arch/arm/boot/dts/ti/omap/am5729-beagleboneai.dts | 6 ------
1 file changed, 6 deletions(-)
diff --git a/arch/arm/boot/dts/ti/omap/am5729-beagleboneai.dts b/arch/arm/boot/dts/ti/omap/am5729-beagleboneai.dts
index 149cfafb90bf..9a234dc1431d 100644
--- a/arch/arm/boot/dts/ti/omap/am5729-beagleboneai.dts
+++ b/arch/arm/boot/dts/ti/omap/am5729-beagleboneai.dts
@@ -677,12 +677,6 @@ &i2c4 {
clock-frequency = <100000>;
};
-&cpu0_opp_table {
- opp_slow-500000000 {
- opp-shared;
- };
-};
-
&ipu2 {
status = "okay";
memory-region = <&ipu2_memory_region>;
--
2.40.0
^ permalink raw reply related [flat|nested] 12+ messages in thread* [PATCH 3/5] arm: dts: ti: omap: Fix OPP table node names
2023-07-24 15:39 [PATCH 0/5] dt-bindings: opp/cpufreq: Convert ti-cpufreq to Nishanth Menon
2023-07-24 15:39 ` [PATCH 1/5] arm: dts: ti: omap: omap36xx: Rename opp_supply nodename Nishanth Menon
2023-07-24 15:39 ` [PATCH 2/5] arm: dts: ti: omap: am5729-beagleboneai: Drop the OPP Nishanth Menon
@ 2023-07-24 15:39 ` Nishanth Menon
2023-07-31 6:25 ` Tony Lindgren
2023-07-24 15:39 ` [PATCH 4/5] dt-bindings: opp: Convert ti-omap5-opp-supply.txt to yaml binding Nishanth Menon
2023-07-24 15:39 ` [PATCH 5/5] dt-bindings: cpufreq: Convert ti-cpufreq.txt " Nishanth Menon
4 siblings, 1 reply; 12+ messages in thread
From: Nishanth Menon @ 2023-07-24 15:39 UTC (permalink / raw)
To: Tony Lindgren, Benoît Cousson, Stephen Boyd, Nishanth Menon,
Conor Dooley, Krzysztof Kozlowski, Rob Herring, Viresh Kumar,
Rafael J. Wysocki
Cc: Vibhore Vardhan, Dhruva Gole, linux-omap, linux-kernel,
devicetree, linux-pm, linux-arm-kernel
Fix the opp table node names for opps to be compliant with bindings.
Signed-off-by: Nishanth Menon <nm@ti.com>
---
Should probably go via Tony's tree.
.../arm/boot/dts/ti/omap/am335x-boneblack.dts | 3 +-
.../dts/ti/omap/am335x-osd335x-common.dtsi | 3 +-
arch/arm/boot/dts/ti/omap/am33xx.dtsi | 30 ++++++++++++-------
arch/arm/boot/dts/ti/omap/am3517.dtsi | 6 ++--
arch/arm/boot/dts/ti/omap/am4372.dtsi | 15 ++++++----
arch/arm/boot/dts/ti/omap/am437x-idk-evm.dts | 6 ++--
arch/arm/boot/dts/ti/omap/dra7.dtsi | 9 ++++--
arch/arm/boot/dts/ti/omap/dra76x.dtsi | 3 +-
arch/arm/boot/dts/ti/omap/omap34xx.dtsi | 12 ++++----
arch/arm/boot/dts/ti/omap/omap36xx.dtsi | 12 +++++---
10 files changed, 64 insertions(+), 35 deletions(-)
diff --git a/arch/arm/boot/dts/ti/omap/am335x-boneblack.dts b/arch/arm/boot/dts/ti/omap/am335x-boneblack.dts
index b956e2f60fe0..16b567e3cb47 100644
--- a/arch/arm/boot/dts/ti/omap/am335x-boneblack.dts
+++ b/arch/arm/boot/dts/ti/omap/am335x-boneblack.dts
@@ -20,7 +20,8 @@ &cpu0_opp_table {
* BeagleBone Blacks have PG 2.0 silicon which is guaranteed
* to support 1GHz OPP so enable it for PG 2.0 on this board.
*/
- oppnitro-1000000000 {
+ opp-1000000000 {
+ /* OPP Nitro */
opp-supported-hw = <0x06 0x0100>;
};
};
diff --git a/arch/arm/boot/dts/ti/omap/am335x-osd335x-common.dtsi b/arch/arm/boot/dts/ti/omap/am335x-osd335x-common.dtsi
index 9863bf499a39..93a3af83feac 100644
--- a/arch/arm/boot/dts/ti/omap/am335x-osd335x-common.dtsi
+++ b/arch/arm/boot/dts/ti/omap/am335x-osd335x-common.dtsi
@@ -28,7 +28,8 @@ &cpu0_opp_table {
* the HW OPP table, the silicon looks like it is Revision 1.0 (ie the
* EFUSE_SMA register reads as all zeros).
*/
- oppnitro-1000000000 {
+ opp-1000000000 {
+ /* OPP Nitro */
opp-supported-hw = <0x06 0x0100>;
};
};
diff --git a/arch/arm/boot/dts/ti/omap/am33xx.dtsi b/arch/arm/boot/dts/ti/omap/am33xx.dtsi
index 32d397b3950b..1a2cd5baf402 100644
--- a/arch/arm/boot/dts/ti/omap/am33xx.dtsi
+++ b/arch/arm/boot/dts/ti/omap/am33xx.dtsi
@@ -80,64 +80,74 @@ cpu0_opp_table: opp-table {
* because the can not be enabled simultaneously on a
* single SoC.
*/
- opp50-300000000 {
+ opp-50-300000000{
+ /* OPP50 */
opp-hz = /bits/ 64 <300000000>;
opp-microvolt = <950000 931000 969000>;
opp-supported-hw = <0x06 0x0010>;
opp-suspend;
};
- opp100-275000000 {
+ opp-100-275000000{
+ /* OPP100-1 */
opp-hz = /bits/ 64 <275000000>;
opp-microvolt = <1100000 1078000 1122000>;
opp-supported-hw = <0x01 0x00FF>;
opp-suspend;
};
- opp100-300000000 {
+ opp-100-300000000{
+ /* OPP100-2 */
opp-hz = /bits/ 64 <300000000>;
opp-microvolt = <1100000 1078000 1122000>;
opp-supported-hw = <0x06 0x0020>;
opp-suspend;
};
- opp100-500000000 {
+ opp-100-500000000{
+ /* OPP100-3 */
opp-hz = /bits/ 64 <500000000>;
opp-microvolt = <1100000 1078000 1122000>;
opp-supported-hw = <0x01 0xFFFF>;
};
- opp100-600000000 {
+ opp-100-600000000 {
+ /* OPP100-4 */
opp-hz = /bits/ 64 <600000000>;
opp-microvolt = <1100000 1078000 1122000>;
opp-supported-hw = <0x06 0x0040>;
};
- opp120-600000000 {
+ opp-120-600000000 {
+ /* OPP120-1 */
opp-hz = /bits/ 64 <600000000>;
opp-microvolt = <1200000 1176000 1224000>;
opp-supported-hw = <0x01 0xFFFF>;
};
- opp120-720000000 {
+ opp-120-720000000 {
+ /* OPP120-2 */
opp-hz = /bits/ 64 <720000000>;
opp-microvolt = <1200000 1176000 1224000>;
opp-supported-hw = <0x06 0x0080>;
};
- oppturbo-720000000 {
+ opp-720000000 {
+ /* OPP Turbo-1 */
opp-hz = /bits/ 64 <720000000>;
opp-microvolt = <1260000 1234800 1285200>;
opp-supported-hw = <0x01 0xFFFF>;
};
- oppturbo-800000000 {
+ opp-800000000 {
+ /* OPP Turbo-2 */
opp-hz = /bits/ 64 <800000000>;
opp-microvolt = <1260000 1234800 1285200>;
opp-supported-hw = <0x06 0x0100>;
};
- oppnitro-1000000000 {
+ opp-1000000000 {
+ /* OPP Nitro */
opp-hz = /bits/ 64 <1000000000>;
opp-microvolt = <1325000 1298500 1351500>;
opp-supported-hw = <0x04 0x0200>;
diff --git a/arch/arm/boot/dts/ti/omap/am3517.dtsi b/arch/arm/boot/dts/ti/omap/am3517.dtsi
index 823f63502e9f..fbfc956f4e4d 100644
--- a/arch/arm/boot/dts/ti/omap/am3517.dtsi
+++ b/arch/arm/boot/dts/ti/omap/am3517.dtsi
@@ -34,14 +34,16 @@ cpu0_opp_table: opp-table {
* appear to operate at 300MHz as well. Since AM3517 only
* lists one operating voltage, it will remain fixed at 1.2V
*/
- opp50-300000000 {
+ opp-50-300000000 {
+ /* OPP50 */
opp-hz = /bits/ 64 <300000000>;
opp-microvolt = <1200000>;
opp-supported-hw = <0xffffffff 0xffffffff>;
opp-suspend;
};
- opp100-600000000 {
+ opp-100-600000000 {
+ /* OPP100 */
opp-hz = /bits/ 64 <600000000>;
opp-microvolt = <1200000>;
opp-supported-hw = <0xffffffff 0xffffffff>;
diff --git a/arch/arm/boot/dts/ti/omap/am4372.dtsi b/arch/arm/boot/dts/ti/omap/am4372.dtsi
index 8613355bbd5e..9d2c064534f7 100644
--- a/arch/arm/boot/dts/ti/omap/am4372.dtsi
+++ b/arch/arm/boot/dts/ti/omap/am4372.dtsi
@@ -70,32 +70,37 @@ cpu0_opp_table: opp-table {
compatible = "operating-points-v2-ti-cpu";
syscon = <&scm_conf>;
- opp50-300000000 {
+ opp-50-300000000 {
+ /* OPP50 */
opp-hz = /bits/ 64 <300000000>;
opp-microvolt = <950000 931000 969000>;
opp-supported-hw = <0xFF 0x01>;
opp-suspend;
};
- opp100-600000000 {
+ opp-100-600000000 {
+ /* OPP100 */
opp-hz = /bits/ 64 <600000000>;
opp-microvolt = <1100000 1078000 1122000>;
opp-supported-hw = <0xFF 0x04>;
};
- opp120-720000000 {
+ opp-120-720000000 {
+ /* OPP120 */
opp-hz = /bits/ 64 <720000000>;
opp-microvolt = <1200000 1176000 1224000>;
opp-supported-hw = <0xFF 0x08>;
};
- oppturbo-800000000 {
+ opp-800000000{
+ /* OPP Turbo */
opp-hz = /bits/ 64 <800000000>;
opp-microvolt = <1260000 1234800 1285200>;
opp-supported-hw = <0xFF 0x10>;
};
- oppnitro-1000000000 {
+ opp-1000000000 {
+ /* OPP Nitro */
opp-hz = /bits/ 64 <1000000000>;
opp-microvolt = <1325000 1298500 1351500>;
opp-supported-hw = <0xFF 0x20>;
diff --git a/arch/arm/boot/dts/ti/omap/am437x-idk-evm.dts b/arch/arm/boot/dts/ti/omap/am437x-idk-evm.dts
index 863552393c07..5b2ac88a7e6a 100644
--- a/arch/arm/boot/dts/ti/omap/am437x-idk-evm.dts
+++ b/arch/arm/boot/dts/ti/omap/am437x-idk-evm.dts
@@ -527,11 +527,13 @@ &cpu0_opp_table {
* Supply voltage supervisor on board will not allow opp50 so
* disable it and set opp100 as suspend OPP.
*/
- opp50-300000000 {
+ opp-50-300000000 {
+ /* opp50-300000000 */
status = "disabled";
};
- opp100-600000000 {
+ opp-100-600000000 {
+ /* opp100-600000000 */
opp-suspend;
};
};
diff --git a/arch/arm/boot/dts/ti/omap/dra7.dtsi b/arch/arm/boot/dts/ti/omap/dra7.dtsi
index 97ce0c4f1df7..3f3e52e3b375 100644
--- a/arch/arm/boot/dts/ti/omap/dra7.dtsi
+++ b/arch/arm/boot/dts/ti/omap/dra7.dtsi
@@ -101,7 +101,8 @@ cpu0_opp_table: opp-table {
compatible = "operating-points-v2-ti-cpu";
syscon = <&scm_wkup>;
- opp_nom-1000000000 {
+ opp-1000000000 {
+ /* OPP NOM */
opp-hz = /bits/ 64 <1000000000>;
opp-microvolt = <1060000 850000 1150000>,
<1060000 850000 1150000>;
@@ -109,7 +110,8 @@ opp_nom-1000000000 {
opp-suspend;
};
- opp_od-1176000000 {
+ opp-1176000000 {
+ /* OPP OD */
opp-hz = /bits/ 64 <1176000000>;
opp-microvolt = <1160000 885000 1160000>,
<1160000 885000 1160000>;
@@ -117,7 +119,8 @@ opp_od-1176000000 {
opp-supported-hw = <0xFF 0x02>;
};
- opp_high@1500000000 {
+ opp-1500000000 {
+ /* OPP High */
opp-hz = /bits/ 64 <1500000000>;
opp-microvolt = <1210000 950000 1250000>,
<1210000 950000 1250000>;
diff --git a/arch/arm/boot/dts/ti/omap/dra76x.dtsi b/arch/arm/boot/dts/ti/omap/dra76x.dtsi
index 931db7932c11..1045eb24aa0d 100644
--- a/arch/arm/boot/dts/ti/omap/dra76x.dtsi
+++ b/arch/arm/boot/dts/ti/omap/dra76x.dtsi
@@ -130,7 +130,8 @@ &mmc3 {
};
&cpu0_opp_table {
- opp_plus@1800000000 {
+ opp-1800000000 {
+ /* OPP Plus */
opp-hz = /bits/ 64 <1800000000>;
opp-microvolt = <1250000 950000 1250000>,
<1250000 950000 1250000>;
diff --git a/arch/arm/boot/dts/ti/omap/omap34xx.dtsi b/arch/arm/boot/dts/ti/omap/omap34xx.dtsi
index 9dbf62797f0f..fc7233ac183a 100644
--- a/arch/arm/boot/dts/ti/omap/omap34xx.dtsi
+++ b/arch/arm/boot/dts/ti/omap/omap34xx.dtsi
@@ -25,7 +25,7 @@ cpu0_opp_table: opp-table {
compatible = "operating-points-v2-ti-cpu";
syscon = <&scm_conf>;
- opp1-125000000 {
+ opp-125000000 {
opp-hz = /bits/ 64 <125000000>;
/*
* we currently only select the max voltage from table
@@ -40,32 +40,32 @@ opp1-125000000 {
opp-supported-hw = <0xffffffff 3>;
};
- opp2-250000000 {
+ opp-250000000 {
opp-hz = /bits/ 64 <250000000>;
opp-microvolt = <1075000 1075000 1075000>;
opp-supported-hw = <0xffffffff 3>;
opp-suspend;
};
- opp3-500000000 {
+ opp-500000000 {
opp-hz = /bits/ 64 <500000000>;
opp-microvolt = <1200000 1200000 1200000>;
opp-supported-hw = <0xffffffff 3>;
};
- opp4-550000000 {
+ opp-550000000 {
opp-hz = /bits/ 64 <550000000>;
opp-microvolt = <1275000 1275000 1275000>;
opp-supported-hw = <0xffffffff 3>;
};
- opp5-600000000 {
+ opp-600000000 {
opp-hz = /bits/ 64 <600000000>;
opp-microvolt = <1350000 1350000 1350000>;
opp-supported-hw = <0xffffffff 3>;
};
- opp6-720000000 {
+ opp-720000000 {
opp-hz = /bits/ 64 <720000000>;
opp-microvolt = <1350000 1350000 1350000>;
/* only high-speed grade omap3530 devices */
diff --git a/arch/arm/boot/dts/ti/omap/omap36xx.dtsi b/arch/arm/boot/dts/ti/omap/omap36xx.dtsi
index 50e640a32b5c..e6d8070c1bf8 100644
--- a/arch/arm/boot/dts/ti/omap/omap36xx.dtsi
+++ b/arch/arm/boot/dts/ti/omap/omap36xx.dtsi
@@ -30,7 +30,8 @@ cpu0_opp_table: opp-table {
compatible = "operating-points-v2-ti-cpu";
syscon = <&scm_conf>;
- opp50-300000000 {
+ opp-50-300000000 {
+ /* OPP50 */
opp-hz = /bits/ 64 <300000000>;
/*
* we currently only select the max voltage from table
@@ -48,21 +49,24 @@ opp50-300000000 {
opp-suspend;
};
- opp100-600000000 {
+ opp-100-600000000 {
+ /* OPP100 */
opp-hz = /bits/ 64 <600000000>;
opp-microvolt = <1200000 1200000 1200000>,
<1200000 1200000 1200000>;
opp-supported-hw = <0xffffffff 3>;
};
- opp130-800000000 {
+ opp-130-800000000 {
+ /* OPP130 */
opp-hz = /bits/ 64 <800000000>;
opp-microvolt = <1325000 1325000 1325000>,
<1325000 1325000 1325000>;
opp-supported-hw = <0xffffffff 3>;
};
- opp1g-1000000000 {
+ opp-1000000000 {
+ /* OPP1G */
opp-hz = /bits/ 64 <1000000000>;
opp-microvolt = <1375000 1375000 1375000>,
<1375000 1375000 1375000>;
--
2.40.0
^ permalink raw reply related [flat|nested] 12+ messages in thread* Re: [PATCH 3/5] arm: dts: ti: omap: Fix OPP table node names
2023-07-24 15:39 ` [PATCH 3/5] arm: dts: ti: omap: Fix OPP table node names Nishanth Menon
@ 2023-07-31 6:25 ` Tony Lindgren
0 siblings, 0 replies; 12+ messages in thread
From: Tony Lindgren @ 2023-07-31 6:25 UTC (permalink / raw)
To: Nishanth Menon
Cc: Benoît Cousson, Stephen Boyd, Conor Dooley,
Krzysztof Kozlowski, Rob Herring, Viresh Kumar, Rafael J. Wysocki,
Vibhore Vardhan, Dhruva Gole, linux-omap, linux-kernel,
devicetree, linux-pm, linux-arm-kernel
* Nishanth Menon <nm@ti.com> [230724 15:39]:
> Fix the opp table node names for opps to be compliant with bindings.
>
> Signed-off-by: Nishanth Menon <nm@ti.com>
> ---
> Should probably go via Tony's tree.
Thanks applying patches 1 to 3 into omap-for-v6.6/dt.
Tony
^ permalink raw reply [flat|nested] 12+ messages in thread
* [PATCH 4/5] dt-bindings: opp: Convert ti-omap5-opp-supply.txt to yaml binding
2023-07-24 15:39 [PATCH 0/5] dt-bindings: opp/cpufreq: Convert ti-cpufreq to Nishanth Menon
` (2 preceding siblings ...)
2023-07-24 15:39 ` [PATCH 3/5] arm: dts: ti: omap: Fix OPP table node names Nishanth Menon
@ 2023-07-24 15:39 ` Nishanth Menon
2023-07-26 17:10 ` Rob Herring
2023-07-24 15:39 ` [PATCH 5/5] dt-bindings: cpufreq: Convert ti-cpufreq.txt " Nishanth Menon
4 siblings, 1 reply; 12+ messages in thread
From: Nishanth Menon @ 2023-07-24 15:39 UTC (permalink / raw)
To: Tony Lindgren, Benoît Cousson, Stephen Boyd, Nishanth Menon,
Conor Dooley, Krzysztof Kozlowski, Rob Herring, Viresh Kumar,
Rafael J. Wysocki
Cc: Vibhore Vardhan, Dhruva Gole, linux-omap, linux-kernel,
devicetree, linux-pm, linux-arm-kernel
Rename ti-omap5-opp-supply to be bit more generic omap-opp-supply and
convert the binding to yaml.
Signed-off-by: Nishanth Menon <nm@ti.com>
---
.../bindings/opp/ti,omap-opp-supply.yaml | 108 ++++++++++++++++++
.../bindings/opp/ti-omap5-opp-supply.txt | 63 ----------
2 files changed, 108 insertions(+), 63 deletions(-)
create mode 100644 Documentation/devicetree/bindings/opp/ti,omap-opp-supply.yaml
delete mode 100644 Documentation/devicetree/bindings/opp/ti-omap5-opp-supply.txt
diff --git a/Documentation/devicetree/bindings/opp/ti,omap-opp-supply.yaml b/Documentation/devicetree/bindings/opp/ti,omap-opp-supply.yaml
new file mode 100644
index 000000000000..ff1b3d8fea31
--- /dev/null
+++ b/Documentation/devicetree/bindings/opp/ti,omap-opp-supply.yaml
@@ -0,0 +1,108 @@
+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/opp/ti,omap-opp-supply.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: Texas Instruments OMAP compatible OPP supply description
+
+description: |
+ OMAP5, DRA7, and AM57 family of SoCs have Class0 AVS eFuse registers which
+ contain data that can be used to adjust voltages programmed for some of their
+ supplies for more efficient operation. This binding provides the information
+ needed to read these values and use them to program the main regulator during
+ an OPP transitions.
+
+ Also, some supplies may have an associated vbb-supply which is an Adaptive Body
+ Bias regulator which much be transitioned in a specific sequence with regards
+ to the vdd-supply and clk when making an OPP transition. By supplying two
+ regulators to the device that will undergo OPP transitions we can make use
+ of the multi regulator binding that is part of the OPP core described
+ to describe both regulators needed by the platform.
+
+maintainers:
+ - Nishanth Menon <nm@ti.com>
+
+properties:
+ $nodename:
+ pattern: '^opp-supply(@[0-9a-f]+)?$'
+
+ compatible:
+ oneOf:
+ - description: Basic OPP supply controlling VDD and VBB
+ items:
+ - const: ti,omap-opp-supply
+ - description: OMAP5+ optimized voltages in efuse(Class 0) VDD along with
+ VBB.
+ items:
+ - const: ti,omap5-opp-supply
+ - description: OMAP5+ optimized voltages in efuse(class0) VDD but no VBB
+ items:
+ - const: ti,omap5-core-opp-supply
+
+ reg:
+ description: Address and length of the efuse register set for the device
+ maxItems: 1
+
+ ti,absolute-max-voltage-uv:
+ $ref: /schemas/types.yaml#/definitions/uint32
+ description: Absolute maximum voltage for the OPP supply
+
+ ti,efuse-settings:
+ $ref: /schemas/types.yaml#/definitions/uint32-matrix
+ description: An array of u32 tuple items providing information about
+ optimized efuse configuration. Each item consists of the following
+ voltage_in_uV - reference voltage (OPP Voltage)
+ efuse_offset - efuse offset fromr eg where the optimized voltage is
+ stored.
+ items:
+ minItems: 2
+ maxItems: 2
+ minItems: 1
+
+required:
+ - compatible
+ - ti,absolute-max-voltage-uv
+
+allOf:
+ - if:
+ not:
+ properties:
+ compatible:
+ contains:
+ const: ti,omap-opp-supply
+ then:
+ required:
+ - reg
+ - ti,efuse-settings
+
+additionalProperties: false
+
+examples:
+ - |
+ opp_supply_mpu_iva_hd: opp-supply {
+ compatible = "ti,omap-opp-supply";
+ ti,absolute-max-voltage-uv = <1375000>;
+ };
+ - |
+ opp_supply_mpu: opp-supply@4a003b20 {
+ compatible = "ti,omap5-opp-supply";
+ reg = <0x4a003b20 0x8>;
+ ti,efuse-settings =
+ /* uV offset */
+ <1060000 0x0>,
+ <1160000 0x4>,
+ <1210000 0x8>;
+ ti,absolute-max-voltage-uv = <1500000>;
+ };
+ - |
+ opp_supply_mpu2: opp-supply@4a003b00 {
+ compatible = "ti,omap5-core-opp-supply";
+ reg = <0x4a003b00 0x8>;
+ ti,efuse-settings =
+ /* uV offset */
+ <1060000 0x0>,
+ <1160000 0x4>,
+ <1210000 0x8>;
+ ti,absolute-max-voltage-uv = <1500000>;
+ };
diff --git a/Documentation/devicetree/bindings/opp/ti-omap5-opp-supply.txt b/Documentation/devicetree/bindings/opp/ti-omap5-opp-supply.txt
deleted file mode 100644
index b70d326117cd..000000000000
--- a/Documentation/devicetree/bindings/opp/ti-omap5-opp-supply.txt
+++ /dev/null
@@ -1,63 +0,0 @@
-Texas Instruments OMAP compatible OPP supply description
-
-OMAP5, DRA7, and AM57 family of SoCs have Class0 AVS eFuse registers which
-contain data that can be used to adjust voltages programmed for some of their
-supplies for more efficient operation. This binding provides the information
-needed to read these values and use them to program the main regulator during
-an OPP transitions.
-
-Also, some supplies may have an associated vbb-supply which is an Adaptive Body
-Bias regulator which much be transitioned in a specific sequence with regards
-to the vdd-supply and clk when making an OPP transition. By supplying two
-regulators to the device that will undergo OPP transitions we can make use
-of the multi regulator binding that is part of the OPP core described here [1]
-to describe both regulators needed by the platform.
-
-[1] Documentation/devicetree/bindings/opp/opp-v2.yaml
-
-Required Properties for Device Node:
-- vdd-supply: phandle to regulator controlling VDD supply
-- vbb-supply: phandle to regulator controlling Body Bias supply
- (Usually Adaptive Body Bias regulator)
-
-Required Properties for opp-supply node:
-- compatible: Should be one of:
- "ti,omap-opp-supply" - basic OPP supply controlling VDD and VBB
- "ti,omap5-opp-supply" - OMAP5+ optimized voltages in efuse(class0)VDD
- along with VBB
- "ti,omap5-core-opp-supply" - OMAP5+ optimized voltages in efuse(class0) VDD
- but no VBB.
-- reg: Address and length of the efuse register set for the device (mandatory
- only for "ti,omap5-opp-supply")
-- ti,efuse-settings: An array of u32 tuple items providing information about
- optimized efuse configuration. Each item consists of the following:
- volt: voltage in uV - reference voltage (OPP voltage)
- efuse_offseet: efuse offset from reg where the optimized voltage is stored.
-- ti,absolute-max-voltage-uv: absolute maximum voltage for the OPP supply.
-
-Example:
-
-/* Device Node (CPU) */
-cpus {
- cpu0: cpu@0 {
- device_type = "cpu";
-
- ...
-
- vdd-supply = <&vcc>;
- vbb-supply = <&abb_mpu>;
- };
-};
-
-/* OMAP OPP Supply with Class0 registers */
-opp_supply_mpu: opp_supply@4a003b20 {
- compatible = "ti,omap5-opp-supply";
- reg = <0x4a003b20 0x8>;
- ti,efuse-settings = <
- /* uV offset */
- 1060000 0x0
- 1160000 0x4
- 1210000 0x8
- >;
- ti,absolute-max-voltage-uv = <1500000>;
-};
--
2.40.0
^ permalink raw reply related [flat|nested] 12+ messages in thread* Re: [PATCH 4/5] dt-bindings: opp: Convert ti-omap5-opp-supply.txt to yaml binding
2023-07-24 15:39 ` [PATCH 4/5] dt-bindings: opp: Convert ti-omap5-opp-supply.txt to yaml binding Nishanth Menon
@ 2023-07-26 17:10 ` Rob Herring
2023-07-26 19:15 ` Nishanth Menon
0 siblings, 1 reply; 12+ messages in thread
From: Rob Herring @ 2023-07-26 17:10 UTC (permalink / raw)
To: Nishanth Menon
Cc: Tony Lindgren, Benoît Cousson, Stephen Boyd, Conor Dooley,
Krzysztof Kozlowski, Viresh Kumar, Rafael J. Wysocki,
Vibhore Vardhan, Dhruva Gole, linux-omap, linux-kernel,
devicetree, linux-pm, linux-arm-kernel
On Mon, Jul 24, 2023 at 10:39:10AM -0500, Nishanth Menon wrote:
> Rename ti-omap5-opp-supply to be bit more generic omap-opp-supply and
> convert the binding to yaml.
>
> Signed-off-by: Nishanth Menon <nm@ti.com>
> ---
> .../bindings/opp/ti,omap-opp-supply.yaml | 108 ++++++++++++++++++
> .../bindings/opp/ti-omap5-opp-supply.txt | 63 ----------
> 2 files changed, 108 insertions(+), 63 deletions(-)
> create mode 100644 Documentation/devicetree/bindings/opp/ti,omap-opp-supply.yaml
> delete mode 100644 Documentation/devicetree/bindings/opp/ti-omap5-opp-supply.txt
>
> diff --git a/Documentation/devicetree/bindings/opp/ti,omap-opp-supply.yaml b/Documentation/devicetree/bindings/opp/ti,omap-opp-supply.yaml
> new file mode 100644
> index 000000000000..ff1b3d8fea31
> --- /dev/null
> +++ b/Documentation/devicetree/bindings/opp/ti,omap-opp-supply.yaml
> @@ -0,0 +1,108 @@
> +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
> +%YAML 1.2
> +---
> +$id: http://devicetree.org/schemas/opp/ti,omap-opp-supply.yaml#
> +$schema: http://devicetree.org/meta-schemas/core.yaml#
> +
> +title: Texas Instruments OMAP compatible OPP supply description
Drop "description"
> +
> +description: |
> + OMAP5, DRA7, and AM57 family of SoCs have Class0 AVS eFuse registers which
> + contain data that can be used to adjust voltages programmed for some of their
> + supplies for more efficient operation. This binding provides the information
> + needed to read these values and use them to program the main regulator during
> + an OPP transitions.
> +
> + Also, some supplies may have an associated vbb-supply which is an Adaptive Body
> + Bias regulator which much be transitioned in a specific sequence with regards
> + to the vdd-supply and clk when making an OPP transition. By supplying two
> + regulators to the device that will undergo OPP transitions we can make use
> + of the multi regulator binding that is part of the OPP core described
> + to describe both regulators needed by the platform.
> +
> +maintainers:
> + - Nishanth Menon <nm@ti.com>
> +
> +properties:
> + $nodename:
> + pattern: '^opp-supply(@[0-9a-f]+)?$'
> +
> + compatible:
> + oneOf:
> + - description: Basic OPP supply controlling VDD and VBB
> + items:
> + - const: ti,omap-opp-supply
> + - description: OMAP5+ optimized voltages in efuse(Class 0) VDD along with
> + VBB.
> + items:
> + - const: ti,omap5-opp-supply
> + - description: OMAP5+ optimized voltages in efuse(class0) VDD but no VBB
> + items:
> + - const: ti,omap5-core-opp-supply
> +
> + reg:
> + description: Address and length of the efuse register set for the device
Drop
> + maxItems: 1
> +
> + ti,absolute-max-voltage-uv:
> + $ref: /schemas/types.yaml#/definitions/uint32
> + description: Absolute maximum voltage for the OPP supply
> +
> + ti,efuse-settings:
> + $ref: /schemas/types.yaml#/definitions/uint32-matrix
> + description: An array of u32 tuple items providing information about
> + optimized efuse configuration. Each item consists of the following
> + voltage_in_uV - reference voltage (OPP Voltage)
> + efuse_offset - efuse offset fromr eg where the optimized voltage is
> + stored.
> + items:
> + minItems: 2
> + maxItems: 2
Constraints on the values?
> + minItems: 1
> +
> +required:
> + - compatible
> + - ti,absolute-max-voltage-uv
> +
> +allOf:
> + - if:
> + not:
> + properties:
> + compatible:
> + contains:
> + const: ti,omap-opp-supply
> + then:
> + required:
> + - reg
> + - ti,efuse-settings
> +
> +additionalProperties: false
> +
> +examples:
> + - |
> + opp_supply_mpu_iva_hd: opp-supply {
Drop unused labels.
> + compatible = "ti,omap-opp-supply";
> + ti,absolute-max-voltage-uv = <1375000>;
> + };
> + - |
> + opp_supply_mpu: opp-supply@4a003b20 {
> + compatible = "ti,omap5-opp-supply";
> + reg = <0x4a003b20 0x8>;
> + ti,efuse-settings =
> + /* uV offset */
> + <1060000 0x0>,
> + <1160000 0x4>,
> + <1210000 0x8>;
> + ti,absolute-max-voltage-uv = <1500000>;
> + };
> + - |
> + opp_supply_mpu2: opp-supply@4a003b00 {
> + compatible = "ti,omap5-core-opp-supply";
> + reg = <0x4a003b00 0x8>;
> + ti,efuse-settings =
> + /* uV offset */
> + <1060000 0x0>,
> + <1160000 0x4>,
> + <1210000 0x8>;
> + ti,absolute-max-voltage-uv = <1500000>;
> + };
The 3rd example doesn't add anything. It's just different values.
Rob
^ permalink raw reply [flat|nested] 12+ messages in thread* Re: [PATCH 4/5] dt-bindings: opp: Convert ti-omap5-opp-supply.txt to yaml binding
2023-07-26 17:10 ` Rob Herring
@ 2023-07-26 19:15 ` Nishanth Menon
0 siblings, 0 replies; 12+ messages in thread
From: Nishanth Menon @ 2023-07-26 19:15 UTC (permalink / raw)
To: Rob Herring
Cc: Tony Lindgren, Benoît Cousson, Stephen Boyd, Conor Dooley,
Krzysztof Kozlowski, Viresh Kumar, Rafael J. Wysocki,
Vibhore Vardhan, Dhruva Gole, linux-omap, linux-kernel,
devicetree, linux-pm, linux-arm-kernel
On 11:10-20230726, Rob Herring wrote:
> On Mon, Jul 24, 2023 at 10:39:10AM -0500, Nishanth Menon wrote:
> > Rename ti-omap5-opp-supply to be bit more generic omap-opp-supply and
> > convert the binding to yaml.
> >
> > Signed-off-by: Nishanth Menon <nm@ti.com>
> > ---
> > .../bindings/opp/ti,omap-opp-supply.yaml | 108 ++++++++++++++++++
> > .../bindings/opp/ti-omap5-opp-supply.txt | 63 ----------
> > 2 files changed, 108 insertions(+), 63 deletions(-)
> > create mode 100644 Documentation/devicetree/bindings/opp/ti,omap-opp-supply.yaml
> > delete mode 100644 Documentation/devicetree/bindings/opp/ti-omap5-opp-supply.txt
> >
> > diff --git a/Documentation/devicetree/bindings/opp/ti,omap-opp-supply.yaml b/Documentation/devicetree/bindings/opp/ti,omap-opp-supply.yaml
> > new file mode 100644
> > index 000000000000..ff1b3d8fea31
> > --- /dev/null
> > +++ b/Documentation/devicetree/bindings/opp/ti,omap-opp-supply.yaml
> > @@ -0,0 +1,108 @@
> > +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
> > +%YAML 1.2
> > +---
> > +$id: http://devicetree.org/schemas/opp/ti,omap-opp-supply.yaml#
> > +$schema: http://devicetree.org/meta-schemas/core.yaml#
> > +
> > +title: Texas Instruments OMAP compatible OPP supply description
>
> Drop "description"
OK.
>
> > +
> > +description: |
> > + OMAP5, DRA7, and AM57 family of SoCs have Class0 AVS eFuse registers which
> > + contain data that can be used to adjust voltages programmed for some of their
> > + supplies for more efficient operation. This binding provides the information
> > + needed to read these values and use them to program the main regulator during
> > + an OPP transitions.
> > +
> > + Also, some supplies may have an associated vbb-supply which is an Adaptive Body
> > + Bias regulator which much be transitioned in a specific sequence with regards
> > + to the vdd-supply and clk when making an OPP transition. By supplying two
> > + regulators to the device that will undergo OPP transitions we can make use
> > + of the multi regulator binding that is part of the OPP core described
> > + to describe both regulators needed by the platform.
> > +
> > +maintainers:
> > + - Nishanth Menon <nm@ti.com>
> > +
> > +properties:
> > + $nodename:
> > + pattern: '^opp-supply(@[0-9a-f]+)?$'
> > +
> > + compatible:
> > + oneOf:
> > + - description: Basic OPP supply controlling VDD and VBB
> > + items:
> > + - const: ti,omap-opp-supply
> > + - description: OMAP5+ optimized voltages in efuse(Class 0) VDD along with
> > + VBB.
> > + items:
> > + - const: ti,omap5-opp-supply
> > + - description: OMAP5+ optimized voltages in efuse(class0) VDD but no VBB
> > + items:
> > + - const: ti,omap5-core-opp-supply
> > +
> > + reg:
> > + description: Address and length of the efuse register set for the device
>
> Drop
Ack.
>
> > + maxItems: 1
> > +
> > + ti,absolute-max-voltage-uv:
> > + $ref: /schemas/types.yaml#/definitions/uint32
> > + description: Absolute maximum voltage for the OPP supply
> > +
> > + ti,efuse-settings:
> > + $ref: /schemas/types.yaml#/definitions/uint32-matrix
> > + description: An array of u32 tuple items providing information about
> > + optimized efuse configuration. Each item consists of the following
> > + voltage_in_uV - reference voltage (OPP Voltage)
> > + efuse_offset - efuse offset fromr eg where the optimized voltage is
> > + stored.
> > + items:
> > + minItems: 2
> > + maxItems: 2
>
> Constraints on the values?
As I recollect (been a while), it was variant per device. Did you have
something in mind or a reference for me to look at?
>
> > + minItems: 1
> > +
> > +required:
> > + - compatible
> > + - ti,absolute-max-voltage-uv
> > +
> > +allOf:
> > + - if:
> > + not:
> > + properties:
> > + compatible:
> > + contains:
> > + const: ti,omap-opp-supply
> > + then:
> > + required:
> > + - reg
> > + - ti,efuse-settings
> > +
> > +additionalProperties: false
> > +
> > +examples:
> > + - |
> > + opp_supply_mpu_iva_hd: opp-supply {
>
> Drop unused labels.
Will do.
>
> > + compatible = "ti,omap-opp-supply";
> > + ti,absolute-max-voltage-uv = <1375000>;
> > + };
> > + - |
> > + opp_supply_mpu: opp-supply@4a003b20 {
> > + compatible = "ti,omap5-opp-supply";
> > + reg = <0x4a003b20 0x8>;
> > + ti,efuse-settings =
> > + /* uV offset */
> > + <1060000 0x0>,
> > + <1160000 0x4>,
> > + <1210000 0x8>;
> > + ti,absolute-max-voltage-uv = <1500000>;
> > + };
> > + - |
> > + opp_supply_mpu2: opp-supply@4a003b00 {
> > + compatible = "ti,omap5-core-opp-supply";
> > + reg = <0x4a003b00 0x8>;
> > + ti,efuse-settings =
> > + /* uV offset */
> > + <1060000 0x0>,
> > + <1160000 0x4>,
> > + <1210000 0x8>;
> > + ti,absolute-max-voltage-uv = <1500000>;
> > + };
>
> The 3rd example doesn't add anything. It's just different values.
True, Thanks for catching.
--
Regards,
Nishanth Menon
Key (0xDDB5849D1736249D) / Fingerprint: F8A2 8693 54EB 8232 17A3 1A34 DDB5 849D 1736 249D
^ permalink raw reply [flat|nested] 12+ messages in thread
* [PATCH 5/5] dt-bindings: cpufreq: Convert ti-cpufreq.txt to yaml binding
2023-07-24 15:39 [PATCH 0/5] dt-bindings: opp/cpufreq: Convert ti-cpufreq to Nishanth Menon
` (3 preceding siblings ...)
2023-07-24 15:39 ` [PATCH 4/5] dt-bindings: opp: Convert ti-omap5-opp-supply.txt to yaml binding Nishanth Menon
@ 2023-07-24 15:39 ` Nishanth Menon
2023-07-26 17:14 ` Rob Herring
4 siblings, 1 reply; 12+ messages in thread
From: Nishanth Menon @ 2023-07-24 15:39 UTC (permalink / raw)
To: Tony Lindgren, Benoît Cousson, Stephen Boyd, Nishanth Menon,
Conor Dooley, Krzysztof Kozlowski, Rob Herring, Viresh Kumar,
Rafael J. Wysocki
Cc: Vibhore Vardhan, Dhruva Gole, linux-omap, linux-kernel,
devicetree, linux-pm, linux-arm-kernel
Move the ti-cpufreq binding over to opp and convert to yaml
Signed-off-by: Nishanth Menon <nm@ti.com>
---
.../bindings/cpufreq/ti-cpufreq.txt | 132 ------------------
.../bindings/opp/opp-v2-ti-cpu.yaml | 88 ++++++++++++
2 files changed, 88 insertions(+), 132 deletions(-)
delete mode 100644 Documentation/devicetree/bindings/cpufreq/ti-cpufreq.txt
create mode 100644 Documentation/devicetree/bindings/opp/opp-v2-ti-cpu.yaml
diff --git a/Documentation/devicetree/bindings/cpufreq/ti-cpufreq.txt b/Documentation/devicetree/bindings/cpufreq/ti-cpufreq.txt
deleted file mode 100644
index 1758051798fe..000000000000
--- a/Documentation/devicetree/bindings/cpufreq/ti-cpufreq.txt
+++ /dev/null
@@ -1,132 +0,0 @@
-TI CPUFreq and OPP bindings
-================================
-
-Certain TI SoCs, like those in the am335x, am437x, am57xx, and dra7xx
-families support different OPPs depending on the silicon variant in use.
-The ti-cpufreq driver can use revision and an efuse value from the SoC to
-provide the OPP framework with supported hardware information. This is
-used to determine which OPPs from the operating-points-v2 table get enabled
-when it is parsed by the OPP framework.
-
-Required properties:
---------------------
-In 'cpus' nodes:
-- operating-points-v2: Phandle to the operating-points-v2 table to use.
-
-In 'operating-points-v2' table:
-- compatible: Should be
- - 'operating-points-v2-ti-cpu' for am335x, am43xx, and dra7xx/am57xx,
- omap34xx, omap36xx and am3517 SoCs
-- syscon: A phandle pointing to a syscon node representing the control module
- register space of the SoC.
-
-Optional properties:
---------------------
-- "vdd-supply", "vbb-supply": to define two regulators for dra7xx
-- "cpu0-supply", "vbb-supply": to define two regulators for omap36xx
-
-For each opp entry in 'operating-points-v2' table:
-- opp-supported-hw: Two bitfields indicating:
- 1. Which revision of the SoC the OPP is supported by
- 2. Which eFuse bits indicate this OPP is available
-
- A bitwise AND is performed against these values and if any bit
- matches, the OPP gets enabled.
-
-Example:
---------
-
-/* From arch/arm/boot/dts/am33xx.dtsi */
-cpus {
- #address-cells = <1>;
- #size-cells = <0>;
- cpu@0 {
- compatible = "arm,cortex-a8";
- device_type = "cpu";
- reg = <0>;
-
- operating-points-v2 = <&cpu0_opp_table>;
-
- clocks = <&dpll_mpu_ck>;
- clock-names = "cpu";
-
- clock-latency = <300000>; /* From omap-cpufreq driver */
- };
-};
-
-/*
- * cpu0 has different OPPs depending on SoC revision and some on revisions
- * 0x2 and 0x4 have eFuse bits that indicate if they are available or not
- */
-cpu0_opp_table: opp-table {
- compatible = "operating-points-v2-ti-cpu";
- syscon = <&scm_conf>;
-
- /*
- * The three following nodes are marked with opp-suspend
- * because they can not be enabled simultaneously on a
- * single SoC.
- */
- opp50-300000000 {
- opp-hz = /bits/ 64 <300000000>;
- opp-microvolt = <950000 931000 969000>;
- opp-supported-hw = <0x06 0x0010>;
- opp-suspend;
- };
-
- opp100-275000000 {
- opp-hz = /bits/ 64 <275000000>;
- opp-microvolt = <1100000 1078000 1122000>;
- opp-supported-hw = <0x01 0x00FF>;
- opp-suspend;
- };
-
- opp100-300000000 {
- opp-hz = /bits/ 64 <300000000>;
- opp-microvolt = <1100000 1078000 1122000>;
- opp-supported-hw = <0x06 0x0020>;
- opp-suspend;
- };
-
- opp100-500000000 {
- opp-hz = /bits/ 64 <500000000>;
- opp-microvolt = <1100000 1078000 1122000>;
- opp-supported-hw = <0x01 0xFFFF>;
- };
-
- opp100-600000000 {
- opp-hz = /bits/ 64 <600000000>;
- opp-microvolt = <1100000 1078000 1122000>;
- opp-supported-hw = <0x06 0x0040>;
- };
-
- opp120-600000000 {
- opp-hz = /bits/ 64 <600000000>;
- opp-microvolt = <1200000 1176000 1224000>;
- opp-supported-hw = <0x01 0xFFFF>;
- };
-
- opp120-720000000 {
- opp-hz = /bits/ 64 <720000000>;
- opp-microvolt = <1200000 1176000 1224000>;
- opp-supported-hw = <0x06 0x0080>;
- };
-
- oppturbo-720000000 {
- opp-hz = /bits/ 64 <720000000>;
- opp-microvolt = <1260000 1234800 1285200>;
- opp-supported-hw = <0x01 0xFFFF>;
- };
-
- oppturbo-800000000 {
- opp-hz = /bits/ 64 <800000000>;
- opp-microvolt = <1260000 1234800 1285200>;
- opp-supported-hw = <0x06 0x0100>;
- };
-
- oppnitro-1000000000 {
- opp-hz = /bits/ 64 <1000000000>;
- opp-microvolt = <1325000 1298500 1351500>;
- opp-supported-hw = <0x04 0x0200>;
- };
-};
diff --git a/Documentation/devicetree/bindings/opp/opp-v2-ti-cpu.yaml b/Documentation/devicetree/bindings/opp/opp-v2-ti-cpu.yaml
new file mode 100644
index 000000000000..758f6da619a8
--- /dev/null
+++ b/Documentation/devicetree/bindings/opp/opp-v2-ti-cpu.yaml
@@ -0,0 +1,88 @@
+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/opp/opp-v2-ti-cpu.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: TI CPU OPP
+
+description: |
+ Certain TI SoCs, like those in the am335x, am437x, am57xx, am62x and dra7xx
+ families support different OPPs depending on the silicon variant in use.
+ The ti-cpufreq driver can use revision and an efuse value from the SoC to
+ provide the OPP framework with supported hardware information. This is
+ used to determine which OPPs from the operating-points-v2 table get enabled
+ when it is parsed by the OPP framework.
+
+maintainers:
+ - Nishanth Menon <nm@ti.com>
+
+allOf:
+ - $ref: opp-v2-base.yaml#
+
+properties:
+ compatible:
+ const: operating-points-v2-ti-cpu
+
+ syscon:
+ $ref: /schemas/types.yaml#/definitions/phandle
+ description: |
+ points to syscon node representing the control module
+ register space of the SoC.
+
+ opp-shared: true
+
+patternProperties:
+ '^opp(-?[0-9]+)*$':
+ type: object
+ additionalProperties: false
+
+ properties:
+ clock-latency-ns: true
+ opp-hz: true
+ opp-microvolt: true
+ opp-supported-hw: true
+ opp-suspend: true
+ turbo-mode: true
+
+ required:
+ - opp-hz
+ - opp-supported-hw
+
+required:
+ - compatible
+ - syscon
+
+additionalProperties: false
+
+examples:
+ - |
+ cpu0_opp_table: opp-table {
+ compatible = "operating-points-v2-ti-cpu";
+ syscon = <&scm_conf>;
+
+ opp-300000000 {
+ opp-hz = /bits/ 64 <300000000>;
+ opp-microvolt = <1100000 1078000 1122000>;
+ opp-supported-hw = <0x06 0x0020>;
+ opp-suspend;
+ };
+
+ opp-500000000 {
+ opp-hz = /bits/ 64 <500000000>;
+ opp-microvolt = <1100000 1078000 1122000>;
+ opp-supported-hw = <0x01 0xFFFF>;
+ };
+
+ opp-600000000 {
+ opp-hz = /bits/ 64 <600000000>;
+ opp-microvolt = <1100000 1078000 1122000>;
+ opp-supported-hw = <0x06 0x0040>;
+ };
+
+ opp-1000000000 {
+ opp-hz = /bits/ 64 <1000000000>;
+ opp-microvolt = <1325000 1298500 1351500>;
+ opp-supported-hw = <0x04 0x0200>;
+ };
+ };
--
2.40.0
^ permalink raw reply related [flat|nested] 12+ messages in thread* Re: [PATCH 5/5] dt-bindings: cpufreq: Convert ti-cpufreq.txt to yaml binding
2023-07-24 15:39 ` [PATCH 5/5] dt-bindings: cpufreq: Convert ti-cpufreq.txt " Nishanth Menon
@ 2023-07-26 17:14 ` Rob Herring
2023-07-26 19:17 ` Nishanth Menon
0 siblings, 1 reply; 12+ messages in thread
From: Rob Herring @ 2023-07-26 17:14 UTC (permalink / raw)
To: Nishanth Menon
Cc: Tony Lindgren, Benoît Cousson, Stephen Boyd, Conor Dooley,
Krzysztof Kozlowski, Viresh Kumar, Rafael J. Wysocki,
Vibhore Vardhan, Dhruva Gole, linux-omap, linux-kernel,
devicetree, linux-pm, linux-arm-kernel
On Mon, Jul 24, 2023 at 10:39:11AM -0500, Nishanth Menon wrote:
> Move the ti-cpufreq binding over to opp and convert to yaml
>
> Signed-off-by: Nishanth Menon <nm@ti.com>
> ---
> .../bindings/cpufreq/ti-cpufreq.txt | 132 ------------------
> .../bindings/opp/opp-v2-ti-cpu.yaml | 88 ++++++++++++
> 2 files changed, 88 insertions(+), 132 deletions(-)
> delete mode 100644 Documentation/devicetree/bindings/cpufreq/ti-cpufreq.txt
> create mode 100644 Documentation/devicetree/bindings/opp/opp-v2-ti-cpu.yaml
> diff --git a/Documentation/devicetree/bindings/opp/opp-v2-ti-cpu.yaml b/Documentation/devicetree/bindings/opp/opp-v2-ti-cpu.yaml
> new file mode 100644
> index 000000000000..758f6da619a8
> --- /dev/null
> +++ b/Documentation/devicetree/bindings/opp/opp-v2-ti-cpu.yaml
Filename matching the compatible.
> @@ -0,0 +1,88 @@
> +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
> +%YAML 1.2
> +---
> +$id: http://devicetree.org/schemas/opp/opp-v2-ti-cpu.yaml#
> +$schema: http://devicetree.org/meta-schemas/core.yaml#
> +
> +title: TI CPU OPP
> +
> +description: |
Don't need '|'.
> + Certain TI SoCs, like those in the am335x, am437x, am57xx, am62x and dra7xx
> + families support different OPPs depending on the silicon variant in use.
> + The ti-cpufreq driver can use revision and an efuse value from the SoC to
> + provide the OPP framework with supported hardware information. This is
> + used to determine which OPPs from the operating-points-v2 table get enabled
> + when it is parsed by the OPP framework.
> +
> +maintainers:
> + - Nishanth Menon <nm@ti.com>
> +
> +allOf:
> + - $ref: opp-v2-base.yaml#
> +
> +properties:
> + compatible:
> + const: operating-points-v2-ti-cpu
> +
> + syscon:
> + $ref: /schemas/types.yaml#/definitions/phandle
> + description: |
> + points to syscon node representing the control module
> + register space of the SoC.
> +
> + opp-shared: true
> +
> +patternProperties:
> + '^opp(-?[0-9]+)*$':
> + type: object
> + additionalProperties: false
> +
> + properties:
> + clock-latency-ns: true
> + opp-hz: true
> + opp-microvolt: true
> + opp-supported-hw: true
> + opp-suspend: true
> + turbo-mode: true
> +
> + required:
> + - opp-hz
> + - opp-supported-hw
> +
> +required:
> + - compatible
> + - syscon
> +
> +additionalProperties: false
> +
> +examples:
> + - |
> + cpu0_opp_table: opp-table {
Drop unused labels
> + compatible = "operating-points-v2-ti-cpu";
> + syscon = <&scm_conf>;
> +
> + opp-300000000 {
> + opp-hz = /bits/ 64 <300000000>;
> + opp-microvolt = <1100000 1078000 1122000>;
> + opp-supported-hw = <0x06 0x0020>;
> + opp-suspend;
> + };
> +
> + opp-500000000 {
> + opp-hz = /bits/ 64 <500000000>;
> + opp-microvolt = <1100000 1078000 1122000>;
> + opp-supported-hw = <0x01 0xFFFF>;
> + };
> +
> + opp-600000000 {
> + opp-hz = /bits/ 64 <600000000>;
> + opp-microvolt = <1100000 1078000 1122000>;
> + opp-supported-hw = <0x06 0x0040>;
> + };
> +
> + opp-1000000000 {
> + opp-hz = /bits/ 64 <1000000000>;
> + opp-microvolt = <1325000 1298500 1351500>;
> + opp-supported-hw = <0x04 0x0200>;
> + };
> + };
> --
> 2.40.0
>
^ permalink raw reply [flat|nested] 12+ messages in thread* Re: [PATCH 5/5] dt-bindings: cpufreq: Convert ti-cpufreq.txt to yaml binding
2023-07-26 17:14 ` Rob Herring
@ 2023-07-26 19:17 ` Nishanth Menon
0 siblings, 0 replies; 12+ messages in thread
From: Nishanth Menon @ 2023-07-26 19:17 UTC (permalink / raw)
To: Rob Herring
Cc: Tony Lindgren, Benoît Cousson, Stephen Boyd, Conor Dooley,
Krzysztof Kozlowski, Viresh Kumar, Rafael J. Wysocki,
Vibhore Vardhan, Dhruva Gole, linux-omap, linux-kernel,
devicetree, linux-pm, linux-arm-kernel
On 11:14-20230726, Rob Herring wrote:
> > diff --git a/Documentation/devicetree/bindings/opp/opp-v2-ti-cpu.yaml b/Documentation/devicetree/bindings/opp/opp-v2-ti-cpu.yaml
> > new file mode 100644
> > index 000000000000..758f6da619a8
> > --- /dev/null
> > +++ b/Documentation/devicetree/bindings/opp/opp-v2-ti-cpu.yaml
>
> Filename matching the compatible.
operating-points-v2-ti-cpu.yaml, OK
>
> > @@ -0,0 +1,88 @@
> > +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
> > +%YAML 1.2
> > +---
> > +$id: http://devicetree.org/schemas/opp/opp-v2-ti-cpu.yaml#
> > +$schema: http://devicetree.org/meta-schemas/core.yaml#
> > +
> > +title: TI CPU OPP
> > +
> > +description: |
>
> Don't need '|'.
OK
>
[..]
> > +
> > +examples:
> > + - |
> > + cpu0_opp_table: opp-table {
>
> Drop unused labels
Uggh.. yep, thanks.
[...]
--
Regards,
Nishanth Menon
Key (0xDDB5849D1736249D) / Fingerprint: F8A2 8693 54EB 8232 17A3 1A34 DDB5 849D 1736 249D
^ permalink raw reply [flat|nested] 12+ messages in thread