From: Jagan Teki <jagan@edgeble.ai>
To: Heiko Stuebner <heiko@sntech.de>,
linux-arm-kernel@lists.infradead.org,
linux-rockchip@lists.infradead.org
Cc: Jagan Teki <jagan@edgeble.ai>,
devicetree@vger.kernel.org, Rob Herring <robh+dt@kernel.org>,
Krzysztof Kozlowski <krzysztof.kozlowski+dt@linaro.org>,
Conor Dooley <conor+dt@kernel.org>
Subject: [PATCH 11/14] ARM: dts: rockchip: rv1126: Add MIPI DSI pipeline
Date: Mon, 31 Jul 2023 16:30:09 +0530 [thread overview]
Message-ID: <20230731110012.2913742-12-jagan@edgeble.ai> (raw)
In-Reply-To: <20230731110012.2913742-1-jagan@edgeble.ai>
MIPI DSI controller in RV1126 has integrated MIPI D-PHY V1.2
that supports up to 4 lanes with a 4Gbps transfer rate.
Add MIPI DSI pipeline for Rockchip RV1126.
Signed-off-by: Jagan Teki <jagan@edgeble.ai>
---
Cc: devicetree@vger.kernel.org
Cc: Rob Herring <robh+dt@kernel.org>
Cc: Krzysztof Kozlowski <krzysztof.kozlowski+dt@linaro.org>
Cc: Conor Dooley <conor+dt@kernel.org>
arch/arm/boot/dts/rockchip/rv1126.dtsi | 49 ++++++++++++++++++++++++++
1 file changed, 49 insertions(+)
diff --git a/arch/arm/boot/dts/rockchip/rv1126.dtsi b/arch/arm/boot/dts/rockchip/rv1126.dtsi
index 9ccd1bad6229..512cc18762b6 100644
--- a/arch/arm/boot/dts/rockchip/rv1126.dtsi
+++ b/arch/arm/boot/dts/rockchip/rv1126.dtsi
@@ -276,6 +276,20 @@ cru: clock-controller@ff490000 {
#reset-cells = <1>;
};
+ dsi_dphy: mipi-dphy@ff4d0000 {
+ compatible = "rockchip,rv1126-dsi-dphy";
+ reg = <0xff4d0000 0x500>;
+ assigned-clocks = <&pmucru CLK_MIPIDSIPHY_REF>;
+ assigned-clock-rates = <24000000>;
+ clock-names = "ref", "pclk";
+ clocks = <&pmucru CLK_MIPIDSIPHY_REF>, <&cru PCLK_DSIPHY>;
+ #phy-cells = <0>;
+ power-domains = <&power RV1126_PD_VO>;
+ reset-names = "apb";
+ resets = <&cru SRST_DSIPHY_P>;
+ status = "disabled";
+ };
+
dmac: dma-controller@ff4e0000 {
compatible = "arm,pl330", "arm,primecell";
reg = <0xff4e0000 0x4000>;
@@ -420,6 +434,7 @@ vop_out_rgb: endpoint@0 {
vop_out_dsi: endpoint@1 {
reg = <1>;
+ remote-endpoint = <&dsi_in_vop>;
};
};
};
@@ -435,6 +450,40 @@ vop_mmu: iommu@ffb00f00 {
status = "disabled";
};
+ dsi: dsi@ffb30000 {
+ compatible = "rockchip,rv1126-mipi-dsi", "snps,dw-mipi-dsi";
+ reg = <0xffb30000 0x500>;
+ interrupts = <GIC_SPI 61 IRQ_TYPE_LEVEL_HIGH>;
+ clock-names = "pclk";
+ clocks = <&cru PCLK_DSIHOST>;
+ phy-names = "dphy";
+ phys = <&dsi_dphy>;
+ power-domains = <&power RV1126_PD_VO>;
+ reset-names = "apb";
+ resets = <&cru SRST_DSIHOST_P>;
+ rockchip,grf = <&grf>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+ status = "disabled";
+
+ ports {
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ port@0 {
+ reg = <0>;
+
+ dsi_in_vop: endpoint {
+ remote-endpoint = <&vop_out_dsi>;
+ };
+ };
+
+ port@1 {
+ reg = <1>;
+ };
+ };
+ };
+
gmac: ethernet@ffc40000 {
compatible = "rockchip,rv1126-gmac", "snps,dwmac-4.20a";
reg = <0xffc40000 0x4000>;
--
2.25.1
next prev parent reply other threads:[~2023-07-31 11:01 UTC|newest]
Thread overview: 15+ messages / expand[flat|nested] mbox.gz Atom feed top
[not found] <20230731110012.2913742-1-jagan@edgeble.ai>
2023-07-31 11:00 ` [PATCH 03/14] dt-bindings: phy: rockchip-inno-dsidphy: Document rv1126 Jagan Teki
2023-07-31 20:49 ` Heiko Stübner
2023-08-11 17:52 ` Rob Herring
2023-07-31 11:00 ` [PATCH 05/14] dt-bindings: display: rockchip-vop: Document rv1126 vop Jagan Teki
2023-08-01 21:07 ` Conor Dooley
2023-08-02 14:37 ` Jagan Teki
2023-08-02 15:12 ` Conor Dooley
2023-07-31 11:00 ` [PATCH 07/14] dt-bindings: display: rockchip-dw-mipi-dsi: Document rv1126 DSI Jagan Teki
2023-08-01 21:05 ` Conor Dooley
2023-07-31 11:00 ` [PATCH 09/14] ARM: dts: rockchip: rv1126: Add PD_VO entry Jagan Teki
2023-07-31 11:00 ` [PATCH 10/14] ARM: dts: rockchip: rv1126: Add VOP_LITE support Jagan Teki
2023-07-31 11:00 ` Jagan Teki [this message]
2023-07-31 11:00 ` [PATCH 12/14] ARM: dts: rockchip: rv1126: Add Edgeble Neu2 IO DSI overlay Jagan Teki
2023-07-31 11:00 ` [PATCH 13/14] ARM: dts: rockchip: Add Radxa Display 10HD overlay Jagan Teki
2023-07-31 11:00 ` [PATCH 14/14] ARM: dts: rockchip: Add Radxa Display 8HD overlay Jagan Teki
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