From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 71B9EC00528 for ; Mon, 31 Jul 2023 16:36:11 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S233483AbjGaQgK (ORCPT ); Mon, 31 Jul 2023 12:36:10 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:38862 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S232185AbjGaQfp (ORCPT ); Mon, 31 Jul 2023 12:35:45 -0400 Received: from mail-pl1-x62e.google.com (mail-pl1-x62e.google.com [IPv6:2607:f8b0:4864:20::62e]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id D41CC1FDD for ; Mon, 31 Jul 2023 09:35:28 -0700 (PDT) Received: by mail-pl1-x62e.google.com with SMTP id d9443c01a7336-1bbff6b2679so11293545ad.1 for ; Mon, 31 Jul 2023 09:35:28 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; t=1690821328; x=1691426128; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=tI6Pcdke+ZCMScqm6RYMcPg5JywhhOVA13YJD5+toLE=; b=zXrVsvwTJ3+pGGuqE/7flCHo6Xx+j/ZDqbYgpKGO/zuCp5ZGl/BtP4u5aRwmGNPa60 AuJKPAOYmWdAaTErP5a5T4S7GUmWymUKfnq9mxJbp0qJd+/zwZ2RFokJjONAL5n6t9fP +ewuXXzPhvOGGekNjPWwGF0VdxjUEJdBZA3DlVN7zFZHU9AvELbLm7bFxTzeV5SlytcR rssEMyA3BCxnXQAZSiHYs2V0PTcGNF8kryqf4Rt2Xe0JSJiJgq75cWT+UnNz/sL7+Sxd tmHSx3pty+OHUcpSMvPWczqBQQjNgTpkmxrDbF+P/TmQAtuLAFTUx2N9hK4okOao9+61 +OFQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20221208; t=1690821328; x=1691426128; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=tI6Pcdke+ZCMScqm6RYMcPg5JywhhOVA13YJD5+toLE=; b=i32/1iCfyml0MjwE+bprZkzlzqFfR3qrJ2Wjbj1Bis6JzVzqvpEWS7BCZlpm3xoivF xUDgjfYW+OI6T/qlqi4vZATjpNF5RD8cPERfSyQatRPHoApSKS97gzjduiNR7f69dPB4 Eb2ZEvLfKC/jFTcG7gOkPIsJ1anuDi11DIWyX7MLPq0kcRyAqdBiZ25LwWsqcV5J1TNW TvVTyc2wqhMHYPx++ETjvuB78BeV1mxoxFGJ5ERu1F6u3bbTFeEc63JO9IJsSvVk8b2d ZlHyRMQhKNONWbCzIKvByV20YqTPCAIQwKUK64XWnQXrSdmrZ47ZYtK9VxP6lAKJBbEP JIpQ== X-Gm-Message-State: ABy/qLbQNnr1yQAmFxUbJTHoXrLyPZHmKzL+VZt88/vespalomsK7Sed dvoHY5Jsj6D9cdP4Z6/3P0VK X-Google-Smtp-Source: APBJJlECRRb7wZ72jiKm5hmPggPWblHU3ezrzbmnCp6oMkK1mFJfOgAMLQR+wr7EbC2qWSwOUOQhgw== X-Received: by 2002:a17:902:d489:b0:1b9:e9b2:124b with SMTP id c9-20020a170902d48900b001b9e9b2124bmr9457690plg.64.1690821328262; Mon, 31 Jul 2023 09:35:28 -0700 (PDT) Received: from localhost.localdomain ([117.193.209.129]) by smtp.gmail.com with ESMTPSA id w8-20020a170902e88800b001bb1f09189bsm8779541plg.221.2023.07.31.09.35.21 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 31 Jul 2023 09:35:27 -0700 (PDT) From: Manivannan Sadhasivam To: vireshk@kernel.org, nm@ti.com, sboyd@kernel.org, myungjoo.ham@samsung.com, kyungmin.park@samsung.com, cw00.choi@samsung.com, andersson@kernel.org, konrad.dybcio@linaro.org, robh+dt@kernel.org, krzysztof.kozlowski+dt@linaro.org, conor+dt@kernel.org, jejb@linux.ibm.com, martin.petersen@oracle.com Cc: alim.akhtar@samsung.com, avri.altman@wdc.com, bvanassche@acm.org, linux-scsi@vger.kernel.org, linux-pm@vger.kernel.org, linux-arm-msm@vger.kernel.org, devicetree@vger.kernel.org, quic_asutoshd@quicinc.com, quic_cang@quicinc.com, quic_nitirawa@quicinc.com, quic_narepall@quicinc.com, quic_bhaskarv@quicinc.com, quic_richardp@quicinc.com, quic_nguyenb@quicinc.com, quic_ziqichen@quicinc.com, bmasney@redhat.com, krzysztof.kozlowski@linaro.org, linux-kernel@vger.kernel.org, Manivannan Sadhasivam Subject: [PATCH v3 6/6] arm64: dts: qcom: sm8250: Add OPP table support to UFSHC Date: Mon, 31 Jul 2023 22:03:57 +0530 Message-Id: <20230731163357.49045-7-manivannan.sadhasivam@linaro.org> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20230731163357.49045-1-manivannan.sadhasivam@linaro.org> References: <20230731163357.49045-1-manivannan.sadhasivam@linaro.org> MIME-Version: 1.0 Content-Transfer-Encoding: 8bit Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org UFS host controller, when scaling gears, should choose appropriate performance state of RPMh power domain controller along with clock frequency. So let's add the OPP table support to specify both clock frequency and RPMh performance states replacing the old "freq-table-hz" property. Signed-off-by: Manivannan Sadhasivam --- arch/arm64/boot/dts/qcom/sm8250.dtsi | 39 +++++++++++++++++++++------- 1 file changed, 30 insertions(+), 9 deletions(-) diff --git a/arch/arm64/boot/dts/qcom/sm8250.dtsi b/arch/arm64/boot/dts/qcom/sm8250.dtsi index a4e58ad731c3..33abd84aae53 100644 --- a/arch/arm64/boot/dts/qcom/sm8250.dtsi +++ b/arch/arm64/boot/dts/qcom/sm8250.dtsi @@ -2198,21 +2198,42 @@ ufs_mem_hc: ufshc@1d84000 { <&gcc GCC_UFS_PHY_TX_SYMBOL_0_CLK>, <&gcc GCC_UFS_PHY_RX_SYMBOL_0_CLK>, <&gcc GCC_UFS_PHY_RX_SYMBOL_1_CLK>; - freq-table-hz = - <37500000 300000000>, - <0 0>, - <0 0>, - <37500000 300000000>, - <0 0>, - <0 0>, - <0 0>, - <0 0>; + + operating-points-v2 = <&ufs_opp_table>; interconnects = <&aggre1_noc MASTER_UFS_MEM 0 &mc_virt SLAVE_EBI_CH0 0>, <&gem_noc MASTER_AMPSS_M0 0 &config_noc SLAVE_UFS_MEM_CFG 0>; interconnect-names = "ufs-ddr", "cpu-ufs"; status = "disabled"; + + ufs_opp_table: opp-table { + compatible = "operating-points-v2"; + + opp-37500000 { + opp-hz = /bits/ 64 <37500000>, + /bits/ 64 <0>, + /bits/ 64 <0>, + /bits/ 64 <37500000>, + /bits/ 64 <0>, + /bits/ 64 <0>, + /bits/ 64 <0>, + /bits/ 64 <0>; + required-opps = <&rpmhpd_opp_low_svs>; + }; + + opp-300000000 { + opp-hz = /bits/ 64 <300000000>, + /bits/ 64 <0>, + /bits/ 64 <0>, + /bits/ 64 <300000000>, + /bits/ 64 <0>, + /bits/ 64 <0>, + /bits/ 64 <0>, + /bits/ 64 <0>; + required-opps = <&rpmhpd_opp_nom>; + }; + }; }; ufs_mem_phy: phy@1d87000 { -- 2.25.1