From: Nishanth Menon <nm@ti.com>
To: Udit Kumar <u-kumar1@ti.com>
Cc: <vigneshr@ti.com>, <kristo@kernel.org>, <robh+dt@kernel.org>,
<krzysztof.kozlowski+dt@linaro.org>, <conor+dt@kernel.org>,
<sinthu.raja@ti.com>, <t-konduru@ti.com>,
<linux-arm-kernel@lists.infradead.org>,
<devicetree@vger.kernel.org>, <linux-kernel@vger.kernel.org>
Subject: Re: [PATCH] arm64: dts: ti: k3-j721s2-som-p0: Correct pinmux offset for ospi0
Date: Tue, 1 Aug 2023 15:38:34 -0500 [thread overview]
Message-ID: <20230801203834.kpshdyiml4vysgi4@swaddling> (raw)
In-Reply-To: <20230801125626.3287306-1-u-kumar1@ti.com>
On 18:26-20230801, Udit Kumar wrote:
> Due to non-addressable regions in J721S2 SOC wkup_pmx was split
> into four regions from wkup_pmx0 to wkup_pmx3.
>
> After split while updating the pin mux references to newly defined
> four wkup_pmx, pin mux for OSPI0 was left.
>
> Pin mux for OSPI0 is spread over two range wkup_pmx0
> and wkup_pmx1, along with correcting pin mux for ospi
> adding correct pin mux setting within ospi node.
>
> Fixes: 6bc829ceea41 ("arm64: dts: ti: k3-j721s2: Fix wkup pinmux range")
>
> Signed-off-by: Udit Kumar <u-kumar1@ti.com>
> ---
> Test log without patch
> https://gist.github.com/uditkumarti/41d3d7ccf278d4e00e6da349478e58aa
> (line 1192) reports pin mux is out of range for ospi
>
> Test log with patch
> https://gist.github.com/uditkumarti/46999c99911c9ff3777493fbaea243c6
>
> arch/arm64/boot/dts/ti/k3-j721s2-som-p0.dtsi | 13 ++++++++++---
> 1 file changed, 10 insertions(+), 3 deletions(-)
>
> diff --git a/arch/arm64/boot/dts/ti/k3-j721s2-som-p0.dtsi b/arch/arm64/boot/dts/ti/k3-j721s2-som-p0.dtsi
> index d57dd43da0ef..1a9d13237c2d 100644
> --- a/arch/arm64/boot/dts/ti/k3-j721s2-som-p0.dtsi
> +++ b/arch/arm64/boot/dts/ti/k3-j721s2-som-p0.dtsi
> @@ -45,8 +45,6 @@ mcu_fss0_ospi0_pins_default: mcu-fss0-ospi0-default-pins {
> J721S2_WKUP_IOPAD(0x000, PIN_OUTPUT, 0) /* (D19) MCU_OSPI0_CLK */
> J721S2_WKUP_IOPAD(0x02c, PIN_OUTPUT, 0) /* (F15) MCU_OSPI0_CSn0 */
> J721S2_WKUP_IOPAD(0x030, PIN_OUTPUT, 0) /* (G17) MCU_OSPI0_CSn1 */
> - J721S2_WKUP_IOPAD(0x038, PIN_OUTPUT, 0) /* (F14) MCU_OSPI0_CSn2 */
> - J721S2_WKUP_IOPAD(0x03c, PIN_OUTPUT, 0) /* (F17) MCU_OSPI0_CSn3 */
> J721S2_WKUP_IOPAD(0x00c, PIN_INPUT, 0) /* (C19) MCU_OSPI0_D0 */
> J721S2_WKUP_IOPAD(0x010, PIN_INPUT, 0) /* (F16) MCU_OSPI0_D1 */
> J721S2_WKUP_IOPAD(0x014, PIN_INPUT, 0) /* (G15) MCU_OSPI0_D2 */
> @@ -61,6 +59,15 @@ J721S2_WKUP_IOPAD(0x004, PIN_INPUT, 0) /* (E20) MCU_OSPI0_LBCLKO */
> };
> };
>
> +&wkup_pmx1 {
> + mcu_fss0_ospi0_pins1_default: mcu-fss0-ospi0-default-pins1 {
patternProperties:
'-pins(-[0-9]+)?$|-pin$':
Unless we have a strong reason, I'd leave it as
mcu-fss0-ospi0-1-default-pins or something
But, please ensure we dont get warnings with:
https://lore.kernel.org/all/20230721082654.27036-1-tony@atomide.com/
(Side note: Linus W is on vacation, so it might be a few days for this
to hit next)
> + pinctrl-single,pins = <
> + J721S2_WKUP_IOPAD(0x000, PIN_OUTPUT, 0) /* (F14) MCU_OSPI0_CSn2 */
> + J721S2_WKUP_IOPAD(0x004, PIN_OUTPUT, 0) /* (F17) MCU_OSPI0_CSn3 */
> + >;
> + };
> +};
> +
> &wkup_pmx2 {
> wkup_i2c0_pins_default: wkup-i2c0-default-pins {
> pinctrl-single,pins = <
> @@ -127,7 +134,7 @@ &main_mcan16 {
> &ospi0 {
> status = "okay";
> pinctrl-names = "default";
> - pinctrl-0 = <&mcu_fss0_ospi0_pins_default>;
> + pinctrl-0 = <&mcu_fss0_ospi0_pins_default>, <&mcu_fss0_ospi0_pins1_default>;
>
> flash@0 {
> compatible = "jedec,spi-nor";
> --
> 2.34.1
>
--
Regards,
Nishanth Menon
Key (0xDDB5849D1736249D) / Fingerprint: F8A2 8693 54EB 8232 17A3 1A34 DDB5 849D 1736 249D
prev parent reply other threads:[~2023-08-01 20:38 UTC|newest]
Thread overview: 2+ messages / expand[flat|nested] mbox.gz Atom feed top
2023-08-01 12:56 [PATCH] arm64: dts: ti: k3-j721s2-som-p0: Correct pinmux offset for ospi0 Udit Kumar
2023-08-01 20:38 ` Nishanth Menon [this message]
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