From: Conor Dooley <conor@kernel.org>
To: Anup Patel <apatel@ventanamicro.com>
Cc: Palmer Dabbelt <palmer@dabbelt.com>,
Paul Walmsley <paul.walmsley@sifive.com>,
Thomas Gleixner <tglx@linutronix.de>,
Marc Zyngier <maz@kernel.org>, Rob Herring <robh+dt@kernel.org>,
Krzysztof Kozlowski <krzysztof.kozlowski+dt@linaro.org>,
Frank Rowand <frowand.list@gmail.com>,
Conor Dooley <conor+dt@kernel.org>,
Atish Patra <atishp@atishpatra.org>,
Andrew Jones <ajones@ventanamicro.com>,
Sunil V L <sunilvl@ventanamicro.com>,
Saravana Kannan <saravanak@google.com>,
Anup Patel <anup@brainfault.org>,
linux-riscv@lists.infradead.org, linux-kernel@vger.kernel.org,
devicetree@vger.kernel.org
Subject: Re: [PATCH v7 01/15] RISC-V: Add riscv_get_intc_hartid() function
Date: Wed, 2 Aug 2023 18:20:59 +0100 [thread overview]
Message-ID: <20230802-deviancy-vengeful-cbecf4350526@spud> (raw)
In-Reply-To: <20230802150018.327079-2-apatel@ventanamicro.com>
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On Wed, Aug 02, 2023 at 08:30:04PM +0530, Anup Patel wrote:
> +/* Find hart ID of the INTC fwnode. */
> +int riscv_get_intc_hartid(struct fwnode_handle *node, unsigned long *hartid)
> +{
> + int rc;
> + u64 temp;
> +
> + if (!is_of_node(node)) {
> + rc = fwnode_property_read_u64_array(node, "hartid", &temp, 1);
> + if (!rc)
> + *hartid = temp;
> + } else
> + rc = riscv_of_parent_hartid(to_of_node(node), hartid);
This branch needs to be enclosed in braces too.
> +
> + return rc;
> +}
> +
> DEFINE_PER_CPU(struct riscv_cpuinfo, riscv_cpuinfo);
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next prev parent reply other threads:[~2023-08-02 17:21 UTC|newest]
Thread overview: 27+ messages / expand[flat|nested] mbox.gz Atom feed top
2023-08-02 15:00 [PATCH v7 00/15] Linux RISC-V AIA Support Anup Patel
2023-08-02 15:00 ` [PATCH v7 01/15] RISC-V: Add riscv_get_intc_hartid() function Anup Patel
2023-08-02 17:09 ` Andrew Jones
2023-08-02 17:18 ` Conor Dooley
2023-08-03 4:12 ` Anup Patel
2023-08-02 17:20 ` Conor Dooley [this message]
2023-08-03 4:35 ` Anup Patel
2023-08-02 15:00 ` [PATCH v7 02/15] of: property: Add fw_devlink support for msi-parent Anup Patel
2023-08-11 19:39 ` Rob Herring
2023-08-11 20:59 ` Saravana Kannan
2023-08-12 2:49 ` Anup Patel
2023-08-02 15:00 ` [PATCH v7 03/15] drivers: irqchip/riscv-intc: Mark all INTC nodes as initialized Anup Patel
2023-08-02 15:00 ` [PATCH v7 04/15] irqchip/sifive-plic: Fix syscore registration for multi-socket systems Anup Patel
2023-08-02 15:00 ` [PATCH v7 05/15] irqchip/sifive-plic: Convert PLIC driver into a platform driver Anup Patel
2023-08-02 15:00 ` [PATCH v7 06/15] irqchip/riscv-intc: Add support for RISC-V AIA Anup Patel
2023-08-02 15:00 ` [PATCH v7 07/15] dt-bindings: interrupt-controller: Add RISC-V incoming MSI controller Anup Patel
2023-08-02 15:00 ` [PATCH v7 08/15] irqchip: Add RISC-V incoming MSI controller early driver Anup Patel
2023-08-02 15:00 ` [PATCH v7 09/15] irqchip/riscv-imsic: Add support for platform MSI irqdomain Anup Patel
2023-08-02 15:00 ` [PATCH v7 10/15] irqchip/riscv-imsic: Add support for PCI " Anup Patel
2023-08-02 15:00 ` [PATCH v7 11/15] dt-bindings: interrupt-controller: Add RISC-V advanced PLIC Anup Patel
[not found] ` <CABvJ_xi5r-NL=22tJWfyQQSti4XgUwsx94B8mQ3LJU29kiQC8w@mail.gmail.com>
2023-08-10 8:08 ` Anup Patel
[not found] ` <CABvJ_xiZY5RGMXOq0bWKRdkzD=b4ar6cFiujmPbUYmHUzSW5Qw@mail.gmail.com>
2023-08-12 2:59 ` Anup Patel
2023-08-14 6:43 ` Vincent Chen
2023-08-02 15:00 ` [PATCH v7 12/15] irqchip: Add RISC-V advanced PLIC driver for direct-mode Anup Patel
2023-08-02 15:00 ` [PATCH v7 13/15] irqchip/riscv-aplic: Add support for MSI-mode Anup Patel
2023-08-02 15:00 ` [PATCH v7 14/15] RISC-V: Select APLIC and IMSIC drivers Anup Patel
2023-08-02 15:00 ` [PATCH v7 15/15] MAINTAINERS: Add entry for RISC-V AIA drivers Anup Patel
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