From: Conor Dooley <conor.dooley@microchip.com>
To: "Rabara, Niravkumar L" <niravkumar.l.rabara@intel.com>
Cc: Conor Dooley <conor@kernel.org>,
"Ng, Adrian Ho Yin" <adrian.ho.yin.ng@intel.com>,
"andrew@lunn.ch" <andrew@lunn.ch>,
"conor+dt@kernel.org" <conor+dt@kernel.org>,
"devicetree@vger.kernel.org" <devicetree@vger.kernel.org>,
"dinguyen@kernel.org" <dinguyen@kernel.org>,
"krzysztof.kozlowski+dt@linaro.org"
<krzysztof.kozlowski+dt@linaro.org>,
"linux-clk@vger.kernel.org" <linux-clk@vger.kernel.org>,
"linux-kernel@vger.kernel.org" <linux-kernel@vger.kernel.org>,
"Turquette, Mike" <mturquette@baylibre.com>,
"netdev@vger.kernel.org" <netdev@vger.kernel.org>,
"p.zabel@pengutronix.de" <p.zabel@pengutronix.de>,
"richardcochran@gmail.com" <richardcochran@gmail.com>,
"robh+dt@kernel.org" <robh+dt@kernel.org>,
"sboyd@kernel.org" <sboyd@kernel.org>,
"wen.ping.teh@intel.com" <wen.ping.teh@intel.com>
Subject: Re: [PATCH v2 3/5] dt-bindings: clock: add Intel Agilex5 clock manager
Date: Wed, 2 Aug 2023 07:58:12 +0100 [thread overview]
Message-ID: <20230802-untreated-twice-932a7afbacfc@wendy> (raw)
In-Reply-To: <DM6PR11MB3291BD9E538528059D199EBCA20BA@DM6PR11MB3291.namprd11.prod.outlook.com>
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On Wed, Aug 02, 2023 at 03:06:51AM +0000, Rabara, Niravkumar L wrote:
> > From: Conor Dooley <conor@kernel.org>
> > On Tue, Aug 01, 2023 at 09:02:32AM +0800, niravkumar.l.rabara@intel.com
> > wrote:
> > > +examples:
> >
> > > + # Clock controller node:
> >
> > This comment seems utterly pointless.
> > Otherwise this looks okay to me.
> >
> > Reviewed-by: Conor Dooley <conor.dooley@microchip.com>
> >
> > Thanks,
> > Conor.
> >
>
> Removed in [PATCH v3 3/5].
To be clear, you don't need to send a v3 just for that - I gave you the
reviewed-by after all.
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next prev parent reply other threads:[~2023-08-02 6:59 UTC|newest]
Thread overview: 39+ messages / expand[flat|nested] mbox.gz Atom feed top
2023-06-18 13:22 [PATCH 0/4] Add support for Agilex5 SoCFPGA platform niravkumar.l.rabara
2023-06-18 13:22 ` [PATCH 1/4] dt-bindings: intel: Add Intel Agilex5 compatible niravkumar.l.rabara
2023-06-18 18:47 ` Krzysztof Kozlowski
2023-06-20 14:12 ` niravkumar.l.rabara
2023-06-18 13:22 ` [PATCH 2/4] dt-bindings: clock: Add Intel Agilex5 clocks and resets niravkumar.l.rabara
2023-06-18 18:49 ` Krzysztof Kozlowski
2023-06-20 10:39 ` wen.ping.teh
2023-06-20 11:06 ` Krzysztof Kozlowski
2023-06-21 10:45 ` wen.ping.teh
2023-06-19 2:15 ` Rob Herring
2023-06-18 13:22 ` [PATCH 3/4] clk: socfpga: agilex5: Add clock driver for Agilex5 platform niravkumar.l.rabara
2023-06-20 14:42 ` Dinh Nguyen
2023-06-18 13:22 ` [PATCH 4/4] arm64: dts: agilex5: Add initial support for Intel's Agilex5 SoCFPGA niravkumar.l.rabara
2023-06-18 18:56 ` Krzysztof Kozlowski
2023-06-20 14:07 ` niravkumar.l.rabara
2023-08-01 1:02 ` [PATCH v2 0/5] Add support for Agilex5 SoCFPGA platform niravkumar.l.rabara
2023-08-01 1:02 ` [PATCH v2 1/5] dt-bindings: intel: Add Intel Agilex5 compatible niravkumar.l.rabara
2023-08-01 20:53 ` Conor Dooley
2023-08-01 1:02 ` [PATCH v2 2/5] dt-bindings: reset: add reset IDs for Agilex5 niravkumar.l.rabara
2023-08-01 20:55 ` Conor Dooley
2023-08-01 1:02 ` [PATCH v2 3/5] dt-bindings: clock: add Intel Agilex5 clock manager niravkumar.l.rabara
2023-08-01 20:57 ` Conor Dooley
2023-08-02 3:06 ` Rabara, Niravkumar L
2023-08-02 6:58 ` Conor Dooley [this message]
2023-08-02 2:58 ` [PATCH v3 " niravkumar.l.rabara
2023-08-02 7:02 ` Conor Dooley
2023-08-02 7:14 ` Rabara, Niravkumar L
2023-08-06 17:53 ` Dinh Nguyen
2023-08-06 19:35 ` [PATCH v2 " Krzysztof Kozlowski
2023-08-07 3:56 ` Rabara, Niravkumar L
2023-08-01 1:02 ` [PATCH v2 4/5] clk: socfpga: agilex: add clock driver for the Agilex5 niravkumar.l.rabara
2023-08-08 11:03 ` Dinh Nguyen
2023-08-09 21:28 ` Stephen Boyd
2023-08-10 10:56 ` Dinh Nguyen
2023-08-09 21:26 ` Stephen Boyd
2023-08-13 12:53 ` Rabara, Niravkumar L
2023-08-14 2:48 ` Dinh Nguyen
2023-08-14 2:59 ` Rabara, Niravkumar L
2023-08-01 1:02 ` [PATCH v2 5/5] arm64: dts: agilex5: add initial support for Intel Agilex5 SoCFPGA niravkumar.l.rabara
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