From: Apurva Nandan <a-nandan@ti.com>
To: Apurva Nandan <a-nandan@ti.com>, Nishanth Menon <nm@ti.com>,
Vignesh Raghavendra <vigneshr@ti.com>,
Tero Kristo <kristo@kernel.org>, Rob Herring <robh+dt@kernel.org>,
Krzysztof Kozlowski <krzysztof.kozlowski+dt@linaro.org>,
Conor Dooley <conor+dt@kernel.org>,
<linux-arm-kernel@lists.infradead.org>,
<devicetree@vger.kernel.org>, <linux-kernel@vger.kernel.org>,
Udit Kumar <u-kumar1@ti.com>, Hari Nagalla <hnagalla@ti.com>,
Dasnavis Sabiya <sabiya.d@mistralsolutions.com>
Subject: [PATCH v2 2/4] arm64: dts: ti: k3-j784s4-mcu-wakeup: Add bootph-pre-ram property for SPL nodes
Date: Tue, 8 Aug 2023 00:26:43 +0530 [thread overview]
Message-ID: <20230807185645.128751-3-a-nandan@ti.com> (raw)
In-Reply-To: <20230807185645.128751-1-a-nandan@ti.com>
Add bootph-pre-ram property for all the nodes used in SPL stage,
for syncing it later to u-boot j784s4 dts.
Signed-off-by: Apurva Nandan <a-nandan@ti.com>
---
arch/arm64/boot/dts/ti/k3-j784s4-mcu-wakeup.dtsi | 10 ++++++++++
1 file changed, 10 insertions(+)
diff --git a/arch/arm64/boot/dts/ti/k3-j784s4-mcu-wakeup.dtsi b/arch/arm64/boot/dts/ti/k3-j784s4-mcu-wakeup.dtsi
index 657fb1d72512..521d3cfd10c4 100644
--- a/arch/arm64/boot/dts/ti/k3-j784s4-mcu-wakeup.dtsi
+++ b/arch/arm64/boot/dts/ti/k3-j784s4-mcu-wakeup.dtsi
@@ -6,7 +6,9 @@
*/
&cbass_mcu_wakeup {
+ bootph-pre-ram;
sms: system-controller@44083000 {
+ bootph-pre-ram;
compatible = "ti,k2g-sci";
ti,host-id = <12>;
@@ -19,22 +21,26 @@ sms: system-controller@44083000 {
reg = <0x00 0x44083000 0x00 0x1000>;
k3_pds: power-controller {
+ bootph-pre-ram;
compatible = "ti,sci-pm-domain";
#power-domain-cells = <2>;
};
k3_clks: clock-controller {
+ bootph-pre-ram;
compatible = "ti,k2g-sci-clk";
#clock-cells = <2>;
};
k3_reset: reset-controller {
+ bootph-pre-ram;
compatible = "ti,sci-reset";
#reset-cells = <2>;
};
};
chipid@43000014 {
+ bootph-pre-ram;
compatible = "ti,am654-chipid";
reg = <0x00 0x43000014 0x00 0x4>;
};
@@ -161,6 +167,7 @@ mcu_timer0: timer@40400000 {
};
mcu_timer1: timer@40410000 {
+ bootph-pre-ram;
compatible = "ti,am654-timer";
reg = <0x00 0x40410000 0x00 0x400>;
interrupts = <GIC_SPI 817 IRQ_TYPE_LEVEL_HIGH>;
@@ -442,6 +449,7 @@ mcu_spi2: spi@40320000 {
};
mcu_navss: bus@28380000{
+ bootph-pre-ram;
compatible = "simple-bus";
#address-cells = <2>;
#size-cells = <2>;
@@ -451,6 +459,7 @@ mcu_navss: bus@28380000{
dma-ranges;
mcu_ringacc: ringacc@2b800000 {
+ bootph-pre-ram;
compatible = "ti,am654-navss-ringacc";
reg = <0x00 0x2b800000 0x00 0x400000>,
<0x00 0x2b000000 0x00 0x400000>,
@@ -465,6 +474,7 @@ mcu_ringacc: ringacc@2b800000 {
};
mcu_udmap: dma-controller@285c0000 {
+ bootph-pre-ram;
compatible = "ti,j721e-navss-mcu-udmap";
reg = <0x00 0x285c0000 0x00 0x100>,
<0x00 0x2a800000 0x00 0x40000>,
--
2.34.1
next prev parent reply other threads:[~2023-08-07 18:57 UTC|newest]
Thread overview: 7+ messages / expand[flat|nested] mbox.gz Atom feed top
2023-08-07 18:56 [PATCH v2 0/4] arm64: dts: ti: k3-j784s4: Add bootph-pre-ram property for SPL nodes Apurva Nandan
2023-08-07 18:56 ` [PATCH v2 1/4] arm64: dts: ti: k3-j784s4-main: " Apurva Nandan
2023-08-07 19:07 ` Nishanth Menon
2023-08-08 18:32 ` Apurva Nandan
2023-08-07 18:56 ` Apurva Nandan [this message]
2023-08-07 18:56 ` [PATCH v2 3/4] arm64: dts: ti: k3-j784s4-evm: " Apurva Nandan
2023-08-07 18:56 ` [PATCH v2 4/4] arm64: dts: ti: k3-am69-sk: " Apurva Nandan
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