From: Andrew Davis <afd@ti.com>
To: Nishanth Menon <nm@ti.com>, Vignesh Raghavendra <vigneshr@ti.com>,
Tero Kristo <kristo@kernel.org>, Rob Herring <robh+dt@kernel.org>,
Krzysztof Kozlowski <krzysztof.kozlowski+dt@linaro.org>,
Conor Dooley <conor+dt@kernel.org>, Dhruva Gole <d-gole@ti.com>
Cc: <linux-arm-kernel@lists.infradead.org>,
<devicetree@vger.kernel.org>, <linux-kernel@vger.kernel.org>,
Andrew Davis <afd@ti.com>
Subject: [PATCH v2 05/13] arm64: dts: ti: k3-j721e: Enable OSPI nodes at the board level
Date: Tue, 8 Aug 2023 08:34:49 -0500 [thread overview]
Message-ID: <20230808133457.25060-6-afd@ti.com> (raw)
In-Reply-To: <20230808133457.25060-1-afd@ti.com>
OSPI nodes defined in the top-level J721e SoC dtsi files are incomplete
and may not be functional unless they are extended with pinmux and
device information.
As the attached OSPI device is only known about at the board integration
level, these nodes should only be enabled when provided with this
information.
Disable the OSPI nodes in the dtsi files and only enable the ones that
are actually pinned out on a given board.
Signed-off-by: Andrew Davis <afd@ti.com>
---
arch/arm64/boot/dts/ti/k3-j721e-beagleboneai64.dts | 10 ----------
arch/arm64/boot/dts/ti/k3-j721e-mcu-wakeup.dtsi | 2 ++
arch/arm64/boot/dts/ti/k3-j721e-sk.dts | 6 +-----
arch/arm64/boot/dts/ti/k3-j721e-som-p0.dtsi | 1 +
4 files changed, 4 insertions(+), 15 deletions(-)
diff --git a/arch/arm64/boot/dts/ti/k3-j721e-beagleboneai64.dts b/arch/arm64/boot/dts/ti/k3-j721e-beagleboneai64.dts
index 64eed76bbb7a3..0b89977351c98 100644
--- a/arch/arm64/boot/dts/ti/k3-j721e-beagleboneai64.dts
+++ b/arch/arm64/boot/dts/ti/k3-j721e-beagleboneai64.dts
@@ -580,16 +580,6 @@ &main_sdhci1 {
disable-wp;
};
-&ospi0 {
- /* Unused */
- status = "disabled";
-};
-
-&ospi1 {
- /* Unused */
- status = "disabled";
-};
-
&main_i2c0 {
status = "okay";
pinctrl-names = "default";
diff --git a/arch/arm64/boot/dts/ti/k3-j721e-mcu-wakeup.dtsi b/arch/arm64/boot/dts/ti/k3-j721e-mcu-wakeup.dtsi
index c1b6f8d7d1898..0c01bdd9656f1 100644
--- a/arch/arm64/boot/dts/ti/k3-j721e-mcu-wakeup.dtsi
+++ b/arch/arm64/boot/dts/ti/k3-j721e-mcu-wakeup.dtsi
@@ -378,6 +378,7 @@ ospi0: spi@47040000 {
power-domains = <&k3_pds 103 TI_SCI_PD_EXCLUSIVE>;
#address-cells = <1>;
#size-cells = <0>;
+ status = "disabled";
};
ospi1: spi@47050000 {
@@ -392,6 +393,7 @@ ospi1: spi@47050000 {
power-domains = <&k3_pds 104 TI_SCI_PD_EXCLUSIVE>;
#address-cells = <1>;
#size-cells = <0>;
+ status = "disabled";
};
};
diff --git a/arch/arm64/boot/dts/ti/k3-j721e-sk.dts b/arch/arm64/boot/dts/ti/k3-j721e-sk.dts
index bd1bd1b746056..4cd5346f2dd59 100644
--- a/arch/arm64/boot/dts/ti/k3-j721e-sk.dts
+++ b/arch/arm64/boot/dts/ti/k3-j721e-sk.dts
@@ -594,6 +594,7 @@ &main_sdhci1 {
};
&ospi0 {
+ status = "okay";
pinctrl-names = "default";
pinctrl-0 = <&mcu_fss0_ospi0_pins_default>;
@@ -657,11 +658,6 @@ partition@3fc0000 {
};
};
-&ospi1 {
- /* Unused */
- status = "disabled";
-};
-
&main_i2c0 {
status = "okay";
pinctrl-names = "default";
diff --git a/arch/arm64/boot/dts/ti/k3-j721e-som-p0.dtsi b/arch/arm64/boot/dts/ti/k3-j721e-som-p0.dtsi
index e90e43202546e..928d3a8ad2d09 100644
--- a/arch/arm64/boot/dts/ti/k3-j721e-som-p0.dtsi
+++ b/arch/arm64/boot/dts/ti/k3-j721e-som-p0.dtsi
@@ -202,6 +202,7 @@ eeprom@50 {
};
&ospi0 {
+ status = "okay";
pinctrl-names = "default";
pinctrl-0 = <&mcu_fss0_ospi0_pins_default>;
--
2.39.2
next prev parent reply other threads:[~2023-08-08 20:45 UTC|newest]
Thread overview: 17+ messages / expand[flat|nested] mbox.gz Atom feed top
2023-08-08 13:34 [PATCH v2 00/13] Another round of K3 DTSI disables Andrew Davis
2023-08-08 13:34 ` [PATCH v2 01/13] arm64: dts: ti: k3-j721e: Enable SDHCI nodes at the board level Andrew Davis
2023-08-08 13:34 ` [PATCH v2 02/13] arm64: dts: ti: k3-j7200: " Andrew Davis
2023-08-08 13:34 ` [PATCH v2 03/13] arm64: dts: ti: k3-j721s2: " Andrew Davis
2023-08-08 13:34 ` [PATCH v2 04/13] arm64: dts: ti: k3-am65: Enable OSPI " Andrew Davis
2023-08-08 13:34 ` Andrew Davis [this message]
2023-08-08 13:34 ` [PATCH v2 06/13] arm64: dts: ti: k3-j7200: " Andrew Davis
2023-08-08 13:34 ` [PATCH v2 07/13] arm64: dts: ti: k3-am64: " Andrew Davis
2023-08-08 14:13 ` Andrew Davis
2023-08-08 14:17 ` Nishanth Menon
2023-08-08 14:19 ` Andrew Davis
2023-08-08 13:34 ` [PATCH v2 08/13] arm64: dts: ti: k3-j721e: Enable GPIO " Andrew Davis
2023-08-08 13:34 ` [PATCH v2 09/13] arm64: dts: ti: k3-j721s2: " Andrew Davis
2023-08-08 13:34 ` [PATCH v2 10/13] arm64: dts: ti: k3-j7200: " Andrew Davis
2023-08-08 13:34 ` [PATCH v2 11/13] arm64: dts: ti: k3-j721e: Enable TSCADC " Andrew Davis
2023-08-08 13:34 ` [PATCH v2 12/13] arm64: dts: ti: k3-am65: " Andrew Davis
2023-08-08 13:34 ` [PATCH v2 13/13] arm64: dts: ti: k3-am64: " Andrew Davis
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=20230808133457.25060-6-afd@ti.com \
--to=afd@ti.com \
--cc=conor+dt@kernel.org \
--cc=d-gole@ti.com \
--cc=devicetree@vger.kernel.org \
--cc=kristo@kernel.org \
--cc=krzysztof.kozlowski+dt@linaro.org \
--cc=linux-arm-kernel@lists.infradead.org \
--cc=linux-kernel@vger.kernel.org \
--cc=nm@ti.com \
--cc=robh+dt@kernel.org \
--cc=vigneshr@ti.com \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox;
as well as URLs for NNTP newsgroup(s).