* [PATCH 0/2] soc: ti: k3-ringacc: Add additional register regions
@ 2023-08-09 17:59 Vignesh Raghavendra
2023-08-09 17:59 ` [PATCH 1/2] dt-bindings: soc: ti: k3-ringacc: Describe cfg reg region Vignesh Raghavendra
` (3 more replies)
0 siblings, 4 replies; 6+ messages in thread
From: Vignesh Raghavendra @ 2023-08-09 17:59 UTC (permalink / raw)
To: Rob Herring, Krzysztof Kozlowski, Conor Dooley, Nishanth Menon,
Vignesh Raghavendra, Tero Kristo
Cc: Peter Ujfalusi, Santosh Shilimkar, devicetree, linux-kernel,
linux-arm-kernel
Ringacc on TI K3 SoCs have configuration registers region which is
usually hidden from Linux and configured via Device Manager Firmware
APIs. But certain early SWs like bootloader which run before Device
Manager is fully up would need to directly configure these registers and
thus require to be in DT description.
This add bindings for the cfg region and also adds them to DT files.
Backward compatibility is maintained to existing DT by only mandating
existing regions to be present and this new region as optional.
Nishanth: I am hoping its possible for you to take bindings and DT
via k3-dts-next once reviewed.
Vignesh Raghavendra (2):
dt-bindings: soc: ti: k3-ringacc: Describe cfg reg region
arm64: dts: ti: k3: Add cfg reg region to ringacc node
Documentation/devicetree/bindings/soc/ti/k3-ringacc.yaml | 9 +++++++--
arch/arm64/boot/dts/ti/k3-am65-main.dtsi | 5 +++--
arch/arm64/boot/dts/ti/k3-am65-mcu.dtsi | 6 ++++--
arch/arm64/boot/dts/ti/k3-j7200-main.dtsi | 5 +++--
arch/arm64/boot/dts/ti/k3-j7200-mcu-wakeup.dtsi | 6 ++++--
arch/arm64/boot/dts/ti/k3-j721e-main.dtsi | 5 +++--
arch/arm64/boot/dts/ti/k3-j721e-mcu-wakeup.dtsi | 5 +++--
arch/arm64/boot/dts/ti/k3-j721s2-main.dtsi | 5 +++--
arch/arm64/boot/dts/ti/k3-j721s2-mcu-wakeup.dtsi | 5 +++--
arch/arm64/boot/dts/ti/k3-j784s4-main.dtsi | 5 +++--
arch/arm64/boot/dts/ti/k3-j784s4-mcu-wakeup.dtsi | 5 +++--
11 files changed, 39 insertions(+), 22 deletions(-)
--
2.41.0
^ permalink raw reply [flat|nested] 6+ messages in thread* [PATCH 1/2] dt-bindings: soc: ti: k3-ringacc: Describe cfg reg region 2023-08-09 17:59 [PATCH 0/2] soc: ti: k3-ringacc: Add additional register regions Vignesh Raghavendra @ 2023-08-09 17:59 ` Vignesh Raghavendra 2023-08-09 21:27 ` Conor Dooley 2023-08-09 17:59 ` [PATCH 2/2] arm64: dts: ti: k3: Add cfg reg region to ringacc node Vignesh Raghavendra ` (2 subsequent siblings) 3 siblings, 1 reply; 6+ messages in thread From: Vignesh Raghavendra @ 2023-08-09 17:59 UTC (permalink / raw) To: Rob Herring, Krzysztof Kozlowski, Conor Dooley, Nishanth Menon, Vignesh Raghavendra, Tero Kristo Cc: Peter Ujfalusi, Santosh Shilimkar, devicetree, linux-kernel, linux-arm-kernel RINGACC module on K3 SoCs have CFG register region which is usually configured by a Device Management firmware. But certain entities such as bootloader (like U-Boot) may have to access them directly. Describe this region in the binding documentation for completeness of module description. Keep the binding compatible with existing DTS files by requiring first four regions to be present at least. Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com> --- Documentation/devicetree/bindings/soc/ti/k3-ringacc.yaml | 9 +++++++-- 1 file changed, 7 insertions(+), 2 deletions(-) diff --git a/Documentation/devicetree/bindings/soc/ti/k3-ringacc.yaml b/Documentation/devicetree/bindings/soc/ti/k3-ringacc.yaml index 22cf9002fee7..a08959c6e072 100644 --- a/Documentation/devicetree/bindings/soc/ti/k3-ringacc.yaml +++ b/Documentation/devicetree/bindings/soc/ti/k3-ringacc.yaml @@ -34,18 +34,22 @@ properties: - const: ti,am654-navss-ringacc reg: + minItems: 4 items: - description: real time registers regions - description: fifos registers regions - description: proxy gcfg registers regions - description: proxy target registers regions + - description: configuration registers region reg-names: + minItems: 4 items: - const: rt - const: fifos - const: proxy_gcfg - const: proxy_target + - const: cfg msi-parent: true @@ -80,8 +84,9 @@ examples: reg = <0x0 0x3c000000 0x0 0x400000>, <0x0 0x38000000 0x0 0x400000>, <0x0 0x31120000 0x0 0x100>, - <0x0 0x33000000 0x0 0x40000>; - reg-names = "rt", "fifos", "proxy_gcfg", "proxy_target"; + <0x0 0x33000000 0x0 0x40000>, + <0x0 0x31080000 0x0 0x40000>; + reg-names = "rt", "fifos", "proxy_gcfg", "proxy_target", "cfg"; ti,num-rings = <818>; ti,sci-rm-range-gp-rings = <0x2>; /* GP ring range */ ti,sci = <&dmsc>; -- 2.41.0 ^ permalink raw reply related [flat|nested] 6+ messages in thread
* Re: [PATCH 1/2] dt-bindings: soc: ti: k3-ringacc: Describe cfg reg region 2023-08-09 17:59 ` [PATCH 1/2] dt-bindings: soc: ti: k3-ringacc: Describe cfg reg region Vignesh Raghavendra @ 2023-08-09 21:27 ` Conor Dooley 0 siblings, 0 replies; 6+ messages in thread From: Conor Dooley @ 2023-08-09 21:27 UTC (permalink / raw) To: Vignesh Raghavendra Cc: Rob Herring, Krzysztof Kozlowski, Conor Dooley, Nishanth Menon, Tero Kristo, Peter Ujfalusi, Santosh Shilimkar, devicetree, linux-kernel, linux-arm-kernel [-- Attachment #1: Type: text/plain, Size: 627 bytes --] On Wed, Aug 09, 2023 at 11:29:31PM +0530, Vignesh Raghavendra wrote: > RINGACC module on K3 SoCs have CFG register region which is usually > configured by a Device Management firmware. But certain entities such as > bootloader (like U-Boot) may have to access them directly. Describe this > region in the binding documentation for completeness of module > description. > > Keep the binding compatible with existing DTS files by requiring first > four regions to be present at least. > > Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com> Acked-by: Conor Dooley <conor.dooley@microchip.com> Thanks, Conor. [-- Attachment #2: signature.asc --] [-- Type: application/pgp-signature, Size: 228 bytes --] ^ permalink raw reply [flat|nested] 6+ messages in thread
* [PATCH 2/2] arm64: dts: ti: k3: Add cfg reg region to ringacc node 2023-08-09 17:59 [PATCH 0/2] soc: ti: k3-ringacc: Add additional register regions Vignesh Raghavendra 2023-08-09 17:59 ` [PATCH 1/2] dt-bindings: soc: ti: k3-ringacc: Describe cfg reg region Vignesh Raghavendra @ 2023-08-09 17:59 ` Vignesh Raghavendra 2023-08-10 5:18 ` [PATCH 0/2] soc: ti: k3-ringacc: Add additional register regions Nishanth Menon 2023-08-11 15:20 ` Péter Ujfalusi 3 siblings, 0 replies; 6+ messages in thread From: Vignesh Raghavendra @ 2023-08-09 17:59 UTC (permalink / raw) To: Rob Herring, Krzysztof Kozlowski, Conor Dooley, Nishanth Menon, Vignesh Raghavendra, Tero Kristo Cc: Peter Ujfalusi, Santosh Shilimkar, devicetree, linux-kernel, linux-arm-kernel Add register range of ringacc cfg node to all k3 SoC dtsi files. This is normally under Device Management firmware control but some entities like bootloader have to access directly and thus required to be present in DT. Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com> --- arch/arm64/boot/dts/ti/k3-am65-main.dtsi | 5 +++-- arch/arm64/boot/dts/ti/k3-am65-mcu.dtsi | 6 ++++-- arch/arm64/boot/dts/ti/k3-j7200-main.dtsi | 5 +++-- arch/arm64/boot/dts/ti/k3-j7200-mcu-wakeup.dtsi | 6 ++++-- arch/arm64/boot/dts/ti/k3-j721e-main.dtsi | 5 +++-- arch/arm64/boot/dts/ti/k3-j721e-mcu-wakeup.dtsi | 5 +++-- arch/arm64/boot/dts/ti/k3-j721s2-main.dtsi | 5 +++-- arch/arm64/boot/dts/ti/k3-j721s2-mcu-wakeup.dtsi | 5 +++-- arch/arm64/boot/dts/ti/k3-j784s4-main.dtsi | 5 +++-- arch/arm64/boot/dts/ti/k3-j784s4-mcu-wakeup.dtsi | 5 +++-- 10 files changed, 32 insertions(+), 20 deletions(-) diff --git a/arch/arm64/boot/dts/ti/k3-am65-main.dtsi b/arch/arm64/boot/dts/ti/k3-am65-main.dtsi index d08f086d7d01..bc460033a37a 100644 --- a/arch/arm64/boot/dts/ti/k3-am65-main.dtsi +++ b/arch/arm64/boot/dts/ti/k3-am65-main.dtsi @@ -776,8 +776,9 @@ ringacc: ringacc@3c000000 { reg = <0x0 0x3c000000 0x0 0x400000>, <0x0 0x38000000 0x0 0x400000>, <0x0 0x31120000 0x0 0x100>, - <0x0 0x33000000 0x0 0x40000>; - reg-names = "rt", "fifos", "proxy_gcfg", "proxy_target"; + <0x0 0x33000000 0x0 0x40000>, + <0x0 0x31080000 0x0 0x40000>; + reg-names = "rt", "fifos", "proxy_gcfg", "proxy_target", "cfg"; ti,num-rings = <818>; ti,sci-rm-range-gp-rings = <0x1>; /* GP ring range */ ti,sci = <&dmsc>; diff --git a/arch/arm64/boot/dts/ti/k3-am65-mcu.dtsi b/arch/arm64/boot/dts/ti/k3-am65-mcu.dtsi index 7b1f94a89eca..1c16c3cac612 100644 --- a/arch/arm64/boot/dts/ti/k3-am65-mcu.dtsi +++ b/arch/arm64/boot/dts/ti/k3-am65-mcu.dtsi @@ -197,8 +197,10 @@ mcu_ringacc: ringacc@2b800000 { reg = <0x0 0x2b800000 0x0 0x400000>, <0x0 0x2b000000 0x0 0x400000>, <0x0 0x28590000 0x0 0x100>, - <0x0 0x2a500000 0x0 0x40000>; - reg-names = "rt", "fifos", "proxy_gcfg", "proxy_target"; + <0x0 0x2a500000 0x0 0x40000>, + <0x0 0x28440000 0x0 0x40000>; + reg-names = "rt", "fifos", "proxy_gcfg", + "proxy_target", "cfg"; ti,num-rings = <286>; ti,sci-rm-range-gp-rings = <0x1>; /* GP ring range */ ti,sci = <&dmsc>; diff --git a/arch/arm64/boot/dts/ti/k3-j7200-main.dtsi b/arch/arm64/boot/dts/ti/k3-j7200-main.dtsi index 6eaade5aeb42..e695f7881733 100644 --- a/arch/arm64/boot/dts/ti/k3-j7200-main.dtsi +++ b/arch/arm64/boot/dts/ti/k3-j7200-main.dtsi @@ -267,8 +267,9 @@ main_ringacc: ringacc@3c000000 { reg = <0x00 0x3c000000 0x00 0x400000>, <0x00 0x38000000 0x00 0x400000>, <0x00 0x31120000 0x00 0x100>, - <0x00 0x33000000 0x00 0x40000>; - reg-names = "rt", "fifos", "proxy_gcfg", "proxy_target"; + <0x00 0x33000000 0x00 0x40000>, + <0x00 0x31080000 0x00 0x40000>; + reg-names = "rt", "fifos", "proxy_gcfg", "proxy_target", "cfg"; ti,num-rings = <1024>; ti,sci-rm-range-gp-rings = <0x1>; /* GP ring range */ ti,sci = <&dmsc>; diff --git a/arch/arm64/boot/dts/ti/k3-j7200-mcu-wakeup.dtsi b/arch/arm64/boot/dts/ti/k3-j7200-mcu-wakeup.dtsi index ee7860913c38..04f39b081dc0 100644 --- a/arch/arm64/boot/dts/ti/k3-j7200-mcu-wakeup.dtsi +++ b/arch/arm64/boot/dts/ti/k3-j7200-mcu-wakeup.dtsi @@ -329,8 +329,10 @@ mcu_ringacc: ringacc@2b800000 { reg = <0x00 0x2b800000 0x00 0x400000>, <0x00 0x2b000000 0x00 0x400000>, <0x00 0x28590000 0x00 0x100>, - <0x00 0x2a500000 0x00 0x40000>; - reg-names = "rt", "fifos", "proxy_gcfg", "proxy_target"; + <0x00 0x2a500000 0x00 0x40000>, + <0x00 0x28440000 0x00 0x40000>; + reg-names = "rt", "fifos", "proxy_gcfg", + "proxy_target", "cfg"; ti,num-rings = <286>; ti,sci-rm-range-gp-rings = <0x1>; /* GP ring range */ ti,sci = <&dmsc>; diff --git a/arch/arm64/boot/dts/ti/k3-j721e-main.dtsi b/arch/arm64/boot/dts/ti/k3-j721e-main.dtsi index 3acd55ffd4ff..68a8abf59d24 100644 --- a/arch/arm64/boot/dts/ti/k3-j721e-main.dtsi +++ b/arch/arm64/boot/dts/ti/k3-j721e-main.dtsi @@ -368,8 +368,9 @@ main_ringacc: ringacc@3c000000 { reg = <0x0 0x3c000000 0x0 0x400000>, <0x0 0x38000000 0x0 0x400000>, <0x0 0x31120000 0x0 0x100>, - <0x0 0x33000000 0x0 0x40000>; - reg-names = "rt", "fifos", "proxy_gcfg", "proxy_target"; + <0x0 0x33000000 0x0 0x40000>, + <0x0 0x31080000 0x0 0x40000>; + reg-names = "rt", "fifos", "proxy_gcfg", "proxy_target", "cfg"; ti,num-rings = <1024>; ti,sci-rm-range-gp-rings = <0x1>; /* GP ring range */ ti,sci = <&dmsc>; diff --git a/arch/arm64/boot/dts/ti/k3-j721e-mcu-wakeup.dtsi b/arch/arm64/boot/dts/ti/k3-j721e-mcu-wakeup.dtsi index c1b6f8d7d189..c5ede7bbc263 100644 --- a/arch/arm64/boot/dts/ti/k3-j721e-mcu-wakeup.dtsi +++ b/arch/arm64/boot/dts/ti/k3-j721e-mcu-wakeup.dtsi @@ -448,8 +448,9 @@ mcu_ringacc: ringacc@2b800000 { reg = <0x0 0x2b800000 0x0 0x400000>, <0x0 0x2b000000 0x0 0x400000>, <0x0 0x28590000 0x0 0x100>, - <0x0 0x2a500000 0x0 0x40000>; - reg-names = "rt", "fifos", "proxy_gcfg", "proxy_target"; + <0x0 0x2a500000 0x0 0x40000>, + <0x0 0x28440000 0x0 0x40000>; + reg-names = "rt", "fifos", "proxy_gcfg", "proxy_target", "cfg"; ti,num-rings = <286>; ti,sci-rm-range-gp-rings = <0x1>; /* GP ring range */ ti,sci = <&dmsc>; diff --git a/arch/arm64/boot/dts/ti/k3-j721s2-main.dtsi b/arch/arm64/boot/dts/ti/k3-j721s2-main.dtsi index dc7920a35237..20548d95ab13 100644 --- a/arch/arm64/boot/dts/ti/k3-j721s2-main.dtsi +++ b/arch/arm64/boot/dts/ti/k3-j721s2-main.dtsi @@ -1065,8 +1065,9 @@ main_ringacc: ringacc@3c000000 { reg = <0x0 0x3c000000 0x0 0x400000>, <0x0 0x38000000 0x0 0x400000>, <0x0 0x31120000 0x0 0x100>, - <0x0 0x33000000 0x0 0x40000>; - reg-names = "rt", "fifos", "proxy_gcfg", "proxy_target"; + <0x0 0x33000000 0x0 0x40000>, + <0x0 0x31080000 0x0 0x40000>; + reg-names = "rt", "fifos", "proxy_gcfg", "proxy_target", "cfg"; ti,num-rings = <1024>; ti,sci-rm-range-gp-rings = <0x1>; ti,sci = <&sms>; diff --git a/arch/arm64/boot/dts/ti/k3-j721s2-mcu-wakeup.dtsi b/arch/arm64/boot/dts/ti/k3-j721s2-mcu-wakeup.dtsi index 736ec5fa0ea2..bba2d75324b8 100644 --- a/arch/arm64/boot/dts/ti/k3-j721s2-mcu-wakeup.dtsi +++ b/arch/arm64/boot/dts/ti/k3-j721s2-mcu-wakeup.dtsi @@ -455,8 +455,9 @@ mcu_ringacc: ringacc@2b800000 { reg = <0x0 0x2b800000 0x0 0x400000>, <0x0 0x2b000000 0x0 0x400000>, <0x0 0x28590000 0x0 0x100>, - <0x0 0x2a500000 0x0 0x40000>; - reg-names = "rt", "fifos", "proxy_gcfg", "proxy_target"; + <0x0 0x2a500000 0x0 0x40000>, + <0x0 0x28440000 0x0 0x40000>; + reg-names = "rt", "fifos", "proxy_gcfg", "proxy_target", "cfg"; ti,num-rings = <286>; ti,sci-rm-range-gp-rings = <0x1>; ti,sci = <&sms>; diff --git a/arch/arm64/boot/dts/ti/k3-j784s4-main.dtsi b/arch/arm64/boot/dts/ti/k3-j784s4-main.dtsi index a04c44708a09..29adf3c6a70d 100644 --- a/arch/arm64/boot/dts/ti/k3-j784s4-main.dtsi +++ b/arch/arm64/boot/dts/ti/k3-j784s4-main.dtsi @@ -966,8 +966,9 @@ main_ringacc: ringacc@3c000000 { reg = <0x00 0x3c000000 0x00 0x400000>, <0x00 0x38000000 0x00 0x400000>, <0x00 0x31120000 0x00 0x100>, - <0x00 0x33000000 0x00 0x40000>; - reg-names = "rt", "fifos", "proxy_gcfg", "proxy_target"; + <0x00 0x33000000 0x00 0x40000>, + <0x00 0x31080000 0x00 0x40000>; + reg-names = "rt", "fifos", "proxy_gcfg", "proxy_target", "cfg"; ti,num-rings = <1024>; ti,sci-rm-range-gp-rings = <0x1>; ti,sci = <&sms>; diff --git a/arch/arm64/boot/dts/ti/k3-j784s4-mcu-wakeup.dtsi b/arch/arm64/boot/dts/ti/k3-j784s4-mcu-wakeup.dtsi index 740ee794d7b9..42709489c5d1 100644 --- a/arch/arm64/boot/dts/ti/k3-j784s4-mcu-wakeup.dtsi +++ b/arch/arm64/boot/dts/ti/k3-j784s4-mcu-wakeup.dtsi @@ -455,8 +455,9 @@ mcu_ringacc: ringacc@2b800000 { reg = <0x00 0x2b800000 0x00 0x400000>, <0x00 0x2b000000 0x00 0x400000>, <0x00 0x28590000 0x00 0x100>, - <0x00 0x2a500000 0x00 0x40000>; - reg-names = "rt", "fifos", "proxy_gcfg", "proxy_target"; + <0x00 0x2a500000 0x00 0x40000>, + <0x00 0x28440000 0x00 0x40000>; + reg-names = "rt", "fifos", "proxy_gcfg", "proxy_target", "cfg"; ti,num-rings = <286>; ti,sci-rm-range-gp-rings = <0x1>; ti,sci = <&sms>; -- 2.41.0 ^ permalink raw reply related [flat|nested] 6+ messages in thread
* Re: [PATCH 0/2] soc: ti: k3-ringacc: Add additional register regions 2023-08-09 17:59 [PATCH 0/2] soc: ti: k3-ringacc: Add additional register regions Vignesh Raghavendra 2023-08-09 17:59 ` [PATCH 1/2] dt-bindings: soc: ti: k3-ringacc: Describe cfg reg region Vignesh Raghavendra 2023-08-09 17:59 ` [PATCH 2/2] arm64: dts: ti: k3: Add cfg reg region to ringacc node Vignesh Raghavendra @ 2023-08-10 5:18 ` Nishanth Menon 2023-08-11 15:20 ` Péter Ujfalusi 3 siblings, 0 replies; 6+ messages in thread From: Nishanth Menon @ 2023-08-10 5:18 UTC (permalink / raw) To: conor+dt, vigneshr, krzysztof.kozlowski+dt, robh+dt, kristo Cc: Nishanth Menon, devicetree, peter.ujfalusi, linux-arm-kernel, Santosh Shilimkar, linux-kernel Hi Vignesh Raghavendra, On Wed, 9 Aug 2023 23:29:30 +0530, Vignesh Raghavendra wrote: > Ringacc on TI K3 SoCs have configuration registers region which is > usually hidden from Linux and configured via Device Manager Firmware > APIs. But certain early SWs like bootloader which run before Device > Manager is fully up would need to directly configure these registers and > thus require to be in DT description. > > This add bindings for the cfg region and also adds them to DT files. > Backward compatibility is maintained to existing DT by only mandating > existing regions to be present and this new region as optional. > > [...] I have assumed here with Conor's ack that this will flow through TI SoC tree. Do let me know if that is not the case. I have applied the following to branch ti-k3-dts-next on [1]. Thank you! [1/2] dt-bindings: soc: ti: k3-ringacc: Describe cfg reg region commit: 4f1e869915b7a8c48a0501ad0b102002013a7b7a [2/2] arm64: dts: ti: k3: Add cfg reg region to ringacc node commit: 702110c2be999c1ad354ca6e14e8583ebcea2462 All being well this means that it will be integrated into the linux-next tree (usually sometime in the next 24 hours) and sent up the chain during the next merge window (or sooner if it is a relevant bug fix), however if problems are discovered then the patch may be dropped or reverted. You may get further e-mails resulting from automated or manual testing and review of the tree, please engage with people reporting problems and send followup patches addressing any issues that are reported if needed. If any updates are required or you are submitting further changes they should be sent as incremental updates against current git, existing patches will not be replaced. Please add any relevant lists and maintainers to the CCs when replying to this mail. [1] https://git.kernel.org/pub/scm/linux/kernel/git/ti/linux.git -- Regards, Nishanth Menon Key (0xDDB5849D1736249D) / Fingerprint: F8A2 8693 54EB 8232 17A3 1A34 DDB5 849D 1736 249D ^ permalink raw reply [flat|nested] 6+ messages in thread
* Re: [PATCH 0/2] soc: ti: k3-ringacc: Add additional register regions 2023-08-09 17:59 [PATCH 0/2] soc: ti: k3-ringacc: Add additional register regions Vignesh Raghavendra ` (2 preceding siblings ...) 2023-08-10 5:18 ` [PATCH 0/2] soc: ti: k3-ringacc: Add additional register regions Nishanth Menon @ 2023-08-11 15:20 ` Péter Ujfalusi 3 siblings, 0 replies; 6+ messages in thread From: Péter Ujfalusi @ 2023-08-11 15:20 UTC (permalink / raw) To: Vignesh Raghavendra, Rob Herring, Krzysztof Kozlowski, Conor Dooley, Nishanth Menon, Tero Kristo Cc: Santosh Shilimkar, devicetree, linux-kernel, linux-arm-kernel Hi Vignesh, On 09/08/2023 20:59, Vignesh Raghavendra wrote: > Ringacc on TI K3 SoCs have configuration registers region which is > usually hidden from Linux and configured via Device Manager Firmware > APIs. But certain early SWs like bootloader which run before Device > Manager is fully up would need to directly configure these registers and > thus require to be in DT description. > > This add bindings for the cfg region and also adds them to DT files. > Backward compatibility is maintained to existing DT by only mandating > existing regions to be present and this new region as optional. > > Nishanth: I am hoping its possible for you to take bindings and DT > via k3-dts-next once reviewed. I have similar concern/question as for the DMA side, let me copy that here as well: These regions were 'hidden' from Linux or other open coded access for a reason. If I recall the main reason is security and the need to make sure that the allocation of the channels not been violated. IMho the boot loader should be no exception and it should be using the DM firmware to configure the DMAs. Or has the security concern been dropped and SW can do whatever it wants? > > Vignesh Raghavendra (2): > dt-bindings: soc: ti: k3-ringacc: Describe cfg reg region > arm64: dts: ti: k3: Add cfg reg region to ringacc node > > Documentation/devicetree/bindings/soc/ti/k3-ringacc.yaml | 9 +++++++-- > arch/arm64/boot/dts/ti/k3-am65-main.dtsi | 5 +++-- > arch/arm64/boot/dts/ti/k3-am65-mcu.dtsi | 6 ++++-- > arch/arm64/boot/dts/ti/k3-j7200-main.dtsi | 5 +++-- > arch/arm64/boot/dts/ti/k3-j7200-mcu-wakeup.dtsi | 6 ++++-- > arch/arm64/boot/dts/ti/k3-j721e-main.dtsi | 5 +++-- > arch/arm64/boot/dts/ti/k3-j721e-mcu-wakeup.dtsi | 5 +++-- > arch/arm64/boot/dts/ti/k3-j721s2-main.dtsi | 5 +++-- > arch/arm64/boot/dts/ti/k3-j721s2-mcu-wakeup.dtsi | 5 +++-- > arch/arm64/boot/dts/ti/k3-j784s4-main.dtsi | 5 +++-- > arch/arm64/boot/dts/ti/k3-j784s4-mcu-wakeup.dtsi | 5 +++-- > 11 files changed, 39 insertions(+), 22 deletions(-) > -- Péter ^ permalink raw reply [flat|nested] 6+ messages in thread
end of thread, other threads:[~2023-08-11 15:18 UTC | newest] Thread overview: 6+ messages (download: mbox.gz follow: Atom feed -- links below jump to the message on this page -- 2023-08-09 17:59 [PATCH 0/2] soc: ti: k3-ringacc: Add additional register regions Vignesh Raghavendra 2023-08-09 17:59 ` [PATCH 1/2] dt-bindings: soc: ti: k3-ringacc: Describe cfg reg region Vignesh Raghavendra 2023-08-09 21:27 ` Conor Dooley 2023-08-09 17:59 ` [PATCH 2/2] arm64: dts: ti: k3: Add cfg reg region to ringacc node Vignesh Raghavendra 2023-08-10 5:18 ` [PATCH 0/2] soc: ti: k3-ringacc: Add additional register regions Nishanth Menon 2023-08-11 15:20 ` Péter Ujfalusi
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