From: Vignesh Raghavendra <vigneshr@ti.com>
To: Nishanth Menon <nm@ti.com>, Vignesh Raghavendra <vigneshr@ti.com>,
Tero Kristo <kristo@kernel.org>, Rob Herring <robh+dt@kernel.org>,
Krzysztof Kozlowski <krzysztof.kozlowski+dt@linaro.org>,
Conor Dooley <conor+dt@kernel.org>
Cc: <linux-arm-kernel@lists.infradead.org>,
<devicetree@vger.kernel.org>, <linux-kernel@vger.kernel.org>,
<afd@ti.com>
Subject: [PATCH v2 3/3] arm64: dts: ti: Add support for the AM62P5 Starter Kit
Date: Sat, 12 Aug 2023 00:14:32 +0530 [thread overview]
Message-ID: <20230811184432.732215-4-vigneshr@ti.com> (raw)
In-Reply-To: <20230811184432.732215-1-vigneshr@ti.com>
From: Bryan Brattlof <bb@ti.com>
Add basic support for the AM62P5 SK with UART console and
ramdisk as rootfs.
Schematics is at https://www.ti.com/lit/zip/sprr487
Signed-off-by: Bryan Brattlof <bb@ti.com>
Reviewed-by: Dhruva Gole <d-gole@ti.com>
Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>
---
arch/arm64/boot/dts/ti/Makefile | 3 +
arch/arm64/boot/dts/ti/k3-am62p5-sk.dts | 117 ++++++++++++++++++++++++
2 files changed, 120 insertions(+)
create mode 100644 arch/arm64/boot/dts/ti/k3-am62p5-sk.dts
diff --git a/arch/arm64/boot/dts/ti/Makefile b/arch/arm64/boot/dts/ti/Makefile
index 437a3d7e8e3a..5a09cad74c44 100644
--- a/arch/arm64/boot/dts/ti/Makefile
+++ b/arch/arm64/boot/dts/ti/Makefile
@@ -23,6 +23,9 @@ dtb-$(CONFIG_ARCH_K3) += k3-am62-lp-sk.dtb
# Boards with AM62Ax SoC
dtb-$(CONFIG_ARCH_K3) += k3-am62a7-sk.dtb
+# Boards with AM62Px SoC
+dtb-$(CONFIG_ARCH_K3) += k3-am62p5-sk.dtb
+
# Boards with AM64x SoC
dtb-$(CONFIG_ARCH_K3) += k3-am642-evm.dtb
dtb-$(CONFIG_ARCH_K3) += k3-am642-phyboard-electra-rdk.dtb
diff --git a/arch/arm64/boot/dts/ti/k3-am62p5-sk.dts b/arch/arm64/boot/dts/ti/k3-am62p5-sk.dts
new file mode 100644
index 000000000000..17edfb19e819
--- /dev/null
+++ b/arch/arm64/boot/dts/ti/k3-am62p5-sk.dts
@@ -0,0 +1,117 @@
+// SPDX-License-Identifier: GPL-2.0
+/*
+ * Device Tree file for the AM62P5-SK
+ * Copyright (C) 2023 Texas Instruments Incorporated - https://www.ti.com/
+ *
+ * Schematics: https://www.ti.com/lit/zip/sprr487
+ */
+
+/dts-v1/;
+
+#include "k3-am62p5.dtsi"
+
+/ {
+ compatible = "ti,am62p5-sk", "ti,am62p5";
+ model = "Texas Instruments AM62P5 SK";
+
+ aliases {
+ serial0 = &wkup_uart0;
+ serial2 = &main_uart0;
+ serial3 = &main_uart1;
+ };
+
+ chosen {
+ stdout-path = &main_uart0;
+ };
+
+ memory@80000000 {
+ /* 8G RAM */
+ reg = <0x00000000 0x80000000 0x00000000 0x80000000>,
+ <0x00000008 0x80000000 0x00000001 0x80000000>;
+ device_type = "memory";
+ };
+
+ reserved-memory {
+ #address-cells = <2>;
+ #size-cells = <2>;
+ ranges;
+
+ secure_tfa_ddr: tfa@9e780000 {
+ reg = <0x00 0x9e780000 0x00 0x80000>;
+ no-map;
+ };
+
+ secure_ddr: optee@9e800000 {
+ reg = <0x00 0x9e800000 0x00 0x01800000>; /* for OP-TEE */
+ no-map;
+ };
+
+ wkup_r5fss0_core0_memory_region: r5f-dma-memory@9c900000 {
+ compatible = "shared-dma-pool";
+ reg = <0x00 0x9c900000 0x00 0x01e00000>;
+ no-map;
+ };
+ };
+};
+
+&main_pmx0 {
+ main_uart0_pins_default: main-uart0-default-pins {
+ bootph-all;
+ pinctrl-single,pins = <
+ AM62PX_IOPAD(0x1c8, PIN_INPUT, 0) /* (A22) UART0_RXD */
+ AM62PX_IOPAD(0x1cc, PIN_OUTPUT, 0) /* (B22) UART0_TXD */
+ AM62PX_IOPAD(0x1d0, PIN_INPUT, 0) /* (A23) UART0_CTSn */
+ AM62PX_IOPAD(0x1d4, PIN_OUTPUT, 0) /* (C22) UART0_RTSn */
+ >;
+ };
+
+ main_uart1_pins_default: main-uart1-default-pins {
+ bootph-all;
+ pinctrl-single,pins = <
+ AM62PX_IOPAD(0x194, PIN_INPUT, 2) /* (D25) MCASP0_AXR3 */
+ AM62PX_IOPAD(0x198, PIN_OUTPUT, 2) /* (E25) MCASP0_AXR2 */
+ AM62PX_IOPAD(0x1ac, PIN_INPUT, 2) /* (G23) MCASP0_AFSR */
+ AM62PX_IOPAD(0x1b0, PIN_OUTPUT, 2) /* (G20) MCASP0_ACLKR */
+ >;
+ };
+};
+
+&main_uart0 {
+ bootph-all;
+ pinctrl-names = "default";
+ pinctrl-0 = <&main_uart0_pins_default>;
+ status = "okay";
+};
+
+&main_uart1 {
+ /* Main UART1 is used by TIFS firmware */
+ bootph-all;
+ pinctrl-names = "default";
+ pinctrl-0 = <&main_uart1_pins_default>;
+ status = "reserved";
+};
+
+&cbass_mcu {
+ bootph-all;
+};
+
+&mcu_pmx0 {
+ bootph-all;
+ wkup_uart0_pins_default: wkup-uart0-default-pins {
+ bootph-all;
+ pinctrl-single,pins = <
+ AM62PX_MCU_IOPAD(0x02c, PIN_INPUT, 0) /* (C7) WKUP_UART0_CTSn */
+ AM62PX_MCU_IOPAD(0x030, PIN_OUTPUT, 0) /* (C6) WKUP_UART0_RTSn */
+ AM62PX_MCU_IOPAD(0x024, PIN_INPUT, 0) /* (D8) WKUP_UART0_RXD */
+ AM62PX_MCU_IOPAD(0x028, PIN_OUTPUT, 0) /* (D7) WKUP_UART0_TXD */
+ >;
+ };
+};
+
+&wkup_uart0 {
+ /* WKUP UART0 is used by DM firmware */
+ bootph-all;
+ pinctrl-names = "default";
+ pinctrl-0 = <&wkup_uart0_pins_default>;
+ status = "reserved";
+};
--
2.41.0
next prev parent reply other threads:[~2023-08-11 18:45 UTC|newest]
Thread overview: 13+ messages / expand[flat|nested] mbox.gz Atom feed top
2023-08-11 18:44 [PATCH v2 0/3] arm64: dts: ti: Introduce AM62P5 SoC and board Vignesh Raghavendra
2023-08-11 18:44 ` [PATCH v2 1/3] dt-bindings: arm: ti: Add bindings for AM62P5 SoCs Vignesh Raghavendra
2023-08-11 18:44 ` [PATCH v2 2/3] arm64: dts: ti: Introduce AM62P5 family of SoCs Vignesh Raghavendra
2023-08-14 19:24 ` Krzysztof Kozlowski
2023-08-11 18:44 ` Vignesh Raghavendra [this message]
2023-08-11 18:53 ` [PATCH v2 3/3] arm64: dts: ti: Add support for the AM62P5 Starter Kit Andrew Davis
2023-08-11 22:49 ` [PATCH v2 0/3] arm64: dts: ti: Introduce AM62P5 SoC and board Nishanth Menon
2023-08-14 19:26 ` Krzysztof Kozlowski
2023-08-14 20:33 ` Nishanth Menon
2023-08-14 20:54 ` Andrew Davis
2023-08-15 6:59 ` Vignesh Raghavendra
2023-08-15 13:56 ` Andrew Davis
2023-08-16 4:00 ` Vignesh Raghavendra
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=20230811184432.732215-4-vigneshr@ti.com \
--to=vigneshr@ti.com \
--cc=afd@ti.com \
--cc=conor+dt@kernel.org \
--cc=devicetree@vger.kernel.org \
--cc=kristo@kernel.org \
--cc=krzysztof.kozlowski+dt@linaro.org \
--cc=linux-arm-kernel@lists.infradead.org \
--cc=linux-kernel@vger.kernel.org \
--cc=nm@ti.com \
--cc=robh+dt@kernel.org \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox;
as well as URLs for NNTP newsgroup(s).