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From: Conor Dooley <conor.dooley@microchip.com>
To: Minda Chen <minda.chen@starfivetech.com>
Cc: "Daire McNamara" <daire.mcnamara@microchip.com>,
	"Conor Dooley" <conor@kernel.org>,
	"Rob Herring" <robh+dt@kernel.org>,
	"Krzysztof Kozlowski" <krzysztof.kozlowski+dt@linaro.org>,
	"Bjorn Helgaas" <bhelgaas@google.com>,
	"Lorenzo Pieralisi" <lpieralisi@kernel.org>,
	"Krzysztof Wilczyński" <kw@linux.com>,
	"Emil Renner Berthing" <emil.renner.berthing@canonical.com>,
	devicetree@vger.kernel.org, linux-kernel@vger.kernel.org,
	linux-riscv@lists.infradead.org, linux-pci@vger.kernel.org,
	"Pali Rohár" <pali@kernel.org>,
	"Paul Walmsley" <paul.walmsley@sifive.com>,
	"Palmer Dabbelt" <palmer@dabbelt.com>,
	"Albert Ou" <aou@eecs.berkeley.edu>,
	"Philipp Zabel" <p.zabel@pengutronix.de>,
	"Mason Huo" <mason.huo@starfivetech.com>,
	"Leyfoon Tan" <leyfoon.tan@starfivetech.com>,
	"Kevin Xie" <kevin.xie@starfivetech.com>
Subject: Re: [PATCH v3 07/11] PCI: microchip: Rename IRQ init function
Date: Mon, 14 Aug 2023 14:55:40 +0100	[thread overview]
Message-ID: <20230814-vividness-disgrace-115283ea6f9a@wendy> (raw)
In-Reply-To: <20230814082016.104181-8-minda.chen@starfivetech.com>

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On Mon, Aug 14, 2023 at 04:20:12PM +0800, Minda Chen wrote:
> Rename IRQ init function and prepare for re-use
> IRQ init function.
> 
> rename list:
> mc_init_interrupts -> plda_init_interrupts
> mc_pcie_init_irq_domain-> plda_pcie_init_irq_domains
> 
> Signed-off-by: Minda Chen <minda.chen@starfivetech.com>
> ---
>  .../pci/controller/plda/pcie-microchip-host.c | 37 +++++++++++++------
>  drivers/pci/controller/plda/pcie-plda.h       |  7 ++++
>  2 files changed, 33 insertions(+), 11 deletions(-)
> 
> diff --git a/drivers/pci/controller/plda/pcie-microchip-host.c b/drivers/pci/controller/plda/pcie-microchip-host.c
> index b42f1aac3ec3..140e7ca1a5cb 100644
> --- a/drivers/pci/controller/plda/pcie-microchip-host.c
> +++ b/drivers/pci/controller/plda/pcie-microchip-host.c
> @@ -559,7 +559,7 @@ static int mc_pcie_init_clks(struct device *dev)
>  	return 0;
>  }
>  
> -static int mc_pcie_init_irq_domains(struct plda_pcie_rp *port)
> +static int plda_pcie_init_irq_domains(struct plda_pcie_rp *port, struct plda_evt *evt)
>  {
>  	struct device *dev = port->dev;
>  	struct device_node *node = dev->of_node;
> @@ -572,8 +572,8 @@ static int mc_pcie_init_irq_domains(struct plda_pcie_rp *port)
>  		return -EINVAL;
>  	}
>  
> -	port->event_domain = irq_domain_add_linear(pcie_intc_node, NUM_EVENTS,
> -						   &event_domain_ops, port);
> +	port->event_domain = irq_domain_add_linear(pcie_intc_node, port->num_events,
> +						   evt->domain_ops, port);
>  	if (!port->event_domain) {
>  		dev_err(dev, "failed to get event domain\n");
>  		of_node_put(pcie_intc_node);
> @@ -658,14 +658,15 @@ static void mc_disable_interrupts(struct mc_pcie *port)
>  	writel_relaxed(GENMASK(31, 0), bridge_base_addr + ISTATUS_HOST);
>  }
>  
> -static int mc_init_interrupts(struct platform_device *pdev, struct plda_pcie_rp *port)
> +static int plda_init_interrupts(struct platform_device *pdev,
> +				struct plda_pcie_rp *port, struct plda_evt *evt)
>  {
>  	struct device *dev = &pdev->dev;
>  	int irq;
>  	int i, intx_irq, msi_irq, event_irq;
>  	int ret;
>  
> -	ret = mc_pcie_init_irq_domains(port);
> +	ret = plda_pcie_init_irq_domains(port, evt);
>  	if (ret) {
>  		dev_err(dev, "failed creating IRQ domains\n");
>  		return ret;
> @@ -675,15 +676,18 @@ static int mc_init_interrupts(struct platform_device *pdev, struct plda_pcie_rp
>  	if (irq < 0)
>  		return -ENODEV;
>  
> -	for (i = 0; i < NUM_EVENTS; i++) {
> +	for (i = 0; i < port->num_events; i++) {
>  		event_irq = irq_create_mapping(port->event_domain, i);
>  		if (!event_irq) {
>  			dev_err(dev, "failed to map hwirq %d\n", i);
>  			return -ENXIO;
>  		}
>  
> -		ret = devm_request_irq(dev, event_irq, mc_event_handler,
> -				       0, event_cause[i].sym, port);
> +		if (evt->request_evt_irq)
> +			ret = evt->request_evt_irq(port, event_irq, i);
> +		else
> +			ret = devm_request_irq(dev, event_irq, plda_event_handler,
> +					       0, NULL, port);

Is there a particular reason this if/else addition ended up in this
patch, but the if/else addition in plda_handle_event() ended up in the
next one?

Otherwise, this looks fine to me.

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  reply	other threads:[~2023-08-14 13:57 UTC|newest]

Thread overview: 29+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2023-08-14  8:20 [PATCH v3 0/11] Refactoring Microchip PCIe driver and add StarFive PCIe Minda Chen
2023-08-14  8:20 ` [PATCH v3 01/11] dt-bindings: PCI: Add PLDA XpressRICH PCIe host common properties Minda Chen
2023-08-17 15:40   ` Rob Herring
2023-08-14  8:20 ` [PATCH v3 02/11] PCI: microchip: Move pcie-microchip-host.c to plda directory Minda Chen
2023-08-14 13:33   ` Conor Dooley
2023-08-14  8:20 ` [PATCH v3 03/11] PCI: microchip: Move PLDA IP register macros to pcie-plda.h Minda Chen
2023-08-14 13:32   ` Conor Dooley
2023-08-14  8:20 ` [PATCH v3 04/11] PCI: microchip: Rename data structure and functions Minda Chen
2023-08-14 13:42   ` Conor Dooley
2023-08-14  8:20 ` [PATCH v3 05/11] PCI: plda: Move the common functions to pcie-plda-host.c Minda Chen
2023-08-14 13:46   ` Conor Dooley
2023-08-14  8:20 ` [PATCH v3 06/11] PCI: plda: Add event interrupt codes and IRQ domain ops Minda Chen
2023-08-14 13:52   ` Conor Dooley
2023-08-15 10:12     ` Minda Chen
2023-08-15 13:11       ` Conor Dooley
2023-08-18 10:15         ` Minda Chen
2023-08-14  8:20 ` [PATCH v3 07/11] PCI: microchip: Rename IRQ init function Minda Chen
2023-08-14 13:55   ` Conor Dooley [this message]
2023-08-15 10:43     ` Minda Chen
2023-08-14  8:20 ` [PATCH v3 08/11] PCI: microchip: Move IRQ init functions to pcie-plda-host.c Minda Chen
2023-08-14 13:57   ` Conor Dooley
2023-08-15 10:15     ` Minda Chen
2023-08-14  8:20 ` [PATCH v3 09/11] dt-bindings: PCI: Add StarFive JH7110 PCIe controller Minda Chen
2023-08-14 13:18   ` Conor Dooley
2023-08-17 15:40   ` Rob Herring
2023-08-25  9:06     ` Minda Chen
2023-08-25  9:21       ` Krzysztof Kozlowski
2023-08-14  8:20 ` [PATCH v3 10/11] PCI: starfive: Add " Minda Chen
2023-08-14  8:20 ` [PATCH v3 11/11] riscv: dts: starfive: add PCIe dts configuration for JH7110 Minda Chen

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