From: Xingyu Wu <xingyu.wu@starfivetech.com>
To: Daniel Lezcano <daniel.lezcano@linaro.org>,
Thomas Gleixner <tglx@linutronix.de>,
Emil Renner Berthing <emil.renner.berthing@canonical.com>
Cc: <linux-riscv@lists.infradead.org>, <devicetree@vger.kernel.org>,
"Rob Herring" <robh+dt@kernel.org>,
Krzysztof Kozlowski <krzysztof.kozlowski+dt@linaro.org>,
Paul Walmsley <paul.walmsley@sifive.com>,
Palmer Dabbelt <palmer@dabbelt.com>,
Albert Ou <aou@eecs.berkeley.edu>,
Philipp Zabel <p.zabel@pengutronix.de>,
Xingyu Wu <xingyu.wu@starfivetech.com>,
Samin Guo <samin.guo@starfivetech.com>,
<linux-kernel@vger.kernel.org>, Conor Dooley <conor@kernel.org>
Subject: [PATCH v4 3/3] riscv: dts: jh7110: starfive: Add timer node
Date: Mon, 14 Aug 2023 18:16:03 +0800 [thread overview]
Message-ID: <20230814101603.166951-4-xingyu.wu@starfivetech.com> (raw)
In-Reply-To: <20230814101603.166951-1-xingyu.wu@starfivetech.com>
Add the timer node for the Starfive JH7110 SoC.
Signed-off-by: Xingyu Wu <xingyu.wu@starfivetech.com>
---
arch/riscv/boot/dts/starfive/jh7110.dtsi | 20 ++++++++++++++++++++
1 file changed, 20 insertions(+)
diff --git a/arch/riscv/boot/dts/starfive/jh7110.dtsi b/arch/riscv/boot/dts/starfive/jh7110.dtsi
index ec2e70011a73..84bb9717be13 100644
--- a/arch/riscv/boot/dts/starfive/jh7110.dtsi
+++ b/arch/riscv/boot/dts/starfive/jh7110.dtsi
@@ -502,6 +502,26 @@ sysgpio: pinctrl@13040000 {
#gpio-cells = <2>;
};
+ timer@13050000 {
+ compatible = "starfive,jh7110-timer";
+ reg = <0x0 0x13050000 0x0 0x10000>;
+ interrupts = <69>, <70>, <71> ,<72>;
+ clocks = <&syscrg JH7110_SYSCLK_TIMER_APB>,
+ <&syscrg JH7110_SYSCLK_TIMER0>,
+ <&syscrg JH7110_SYSCLK_TIMER1>,
+ <&syscrg JH7110_SYSCLK_TIMER2>,
+ <&syscrg JH7110_SYSCLK_TIMER3>;
+ clock-names = "apb", "ch0", "ch1",
+ "ch2", "ch3";
+ resets = <&syscrg JH7110_SYSRST_TIMER_APB>,
+ <&syscrg JH7110_SYSRST_TIMER0>,
+ <&syscrg JH7110_SYSRST_TIMER1>,
+ <&syscrg JH7110_SYSRST_TIMER2>,
+ <&syscrg JH7110_SYSRST_TIMER3>;
+ reset-names = "apb", "ch0", "ch1",
+ "ch2", "ch3";
+ };
+
watchdog@13070000 {
compatible = "starfive,jh7110-wdt";
reg = <0x0 0x13070000 0x0 0x10000>;
--
2.25.1
next prev parent reply other threads:[~2023-08-14 10:17 UTC|newest]
Thread overview: 7+ messages / expand[flat|nested] mbox.gz Atom feed top
2023-08-14 10:16 [PATCH v4 0/3] Add timer driver for StarFive JH7110 RISC-V SoC Xingyu Wu
2023-08-14 10:16 ` [PATCH v4 1/3] dt-bindings: timer: Add timer for StarFive JH7110 SoC Xingyu Wu
2023-08-14 10:16 ` [PATCH v4 2/3] clocksource: Add JH7110 timer driver Xingyu Wu
2023-08-17 8:20 ` Walker Chen
2023-09-01 3:07 ` Xingyu Wu
2023-08-14 10:16 ` Xingyu Wu [this message]
2023-08-17 8:27 ` [PATCH v4 3/3] riscv: dts: jh7110: starfive: Add timer node Walker Chen
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