* [PATCH 1/2] dt-bindings: mfd: syscon: Add ti,dss-oldi-io-ctrl compatible
@ 2023-08-09 16:57 Andrew Davis
2023-08-09 16:57 ` [PATCH 2/2] arm64: dts: ti: k3-am65: Add full compatible to dss-oldi-io-ctrl node Andrew Davis
` (2 more replies)
0 siblings, 3 replies; 8+ messages in thread
From: Andrew Davis @ 2023-08-09 16:57 UTC (permalink / raw)
To: Lee Jones, Rob Herring, Krzysztof Kozlowski, Conor Dooley,
Nishanth Menon, Vignesh Raghavendra, Tero Kristo, Aradhya Bhatia
Cc: devicetree, linux-arm-kernel, linux-kernel, Andrew Davis
Add TI DSS OLDI-IO control registers compatible. This is a region of 5
32bit registers found in the TI AM65 CTRL_MMR0 register space[0]. They
are used to control the characteristics of the OLDI DATA/CLK IO as needed
by the DSS display controller node.
[0] https://www.ti.com/lit/pdf/spruid7
Signed-off-by: Andrew Davis <afd@ti.com>
---
Documentation/devicetree/bindings/mfd/syscon.yaml | 1 +
1 file changed, 1 insertion(+)
diff --git a/Documentation/devicetree/bindings/mfd/syscon.yaml b/Documentation/devicetree/bindings/mfd/syscon.yaml
index 8103154bbb529..5029abd6d6411 100644
--- a/Documentation/devicetree/bindings/mfd/syscon.yaml
+++ b/Documentation/devicetree/bindings/mfd/syscon.yaml
@@ -69,6 +69,7 @@ properties:
- rockchip,rk3588-qos
- rockchip,rv1126-qos
- starfive,jh7100-sysmain
+ - ti,dss-oldi-io-ctrl
- const: syscon
--
2.39.2
^ permalink raw reply related [flat|nested] 8+ messages in thread
* [PATCH 2/2] arm64: dts: ti: k3-am65: Add full compatible to dss-oldi-io-ctrl node
2023-08-09 16:57 [PATCH 1/2] dt-bindings: mfd: syscon: Add ti,dss-oldi-io-ctrl compatible Andrew Davis
@ 2023-08-09 16:57 ` Andrew Davis
2023-08-09 17:39 ` [PATCH 1/2] dt-bindings: mfd: syscon: Add ti,dss-oldi-io-ctrl compatible Aradhya Bhatia
2023-08-17 17:07 ` Lee Jones
2 siblings, 0 replies; 8+ messages in thread
From: Andrew Davis @ 2023-08-09 16:57 UTC (permalink / raw)
To: Lee Jones, Rob Herring, Krzysztof Kozlowski, Conor Dooley,
Nishanth Menon, Vignesh Raghavendra, Tero Kristo, Aradhya Bhatia
Cc: devicetree, linux-arm-kernel, linux-kernel, Andrew Davis
This matches the binding for this register region which fixes a couple
DTS check warnings.
While here trim the leading 0s from the "reg" definition.
Signed-off-by: Andrew Davis <afd@ti.com>
---
arch/arm64/boot/dts/ti/k3-am65-main.dtsi | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/arch/arm64/boot/dts/ti/k3-am65-main.dtsi b/arch/arm64/boot/dts/ti/k3-am65-main.dtsi
index d08f086d7d013..603adc1790515 100644
--- a/arch/arm64/boot/dts/ti/k3-am65-main.dtsi
+++ b/arch/arm64/boot/dts/ti/k3-am65-main.dtsi
@@ -498,8 +498,8 @@ serdes_mux: mux-controller {
};
dss_oldi_io_ctrl: dss-oldi-io-ctrl@41e0 {
- compatible = "syscon";
- reg = <0x000041e0 0x14>;
+ compatible = "ti,dss-oldi-io-ctrl", "syscon";
+ reg = <0x41e0 0x14>;
};
ehrpwm_tbclk: clock-controller@4140 {
--
2.39.2
^ permalink raw reply related [flat|nested] 8+ messages in thread
* Re: [PATCH 1/2] dt-bindings: mfd: syscon: Add ti,dss-oldi-io-ctrl compatible
2023-08-09 16:57 [PATCH 1/2] dt-bindings: mfd: syscon: Add ti,dss-oldi-io-ctrl compatible Andrew Davis
2023-08-09 16:57 ` [PATCH 2/2] arm64: dts: ti: k3-am65: Add full compatible to dss-oldi-io-ctrl node Andrew Davis
@ 2023-08-09 17:39 ` Aradhya Bhatia
2023-08-09 17:59 ` Andrew Davis
2023-08-17 17:07 ` Lee Jones
2 siblings, 1 reply; 8+ messages in thread
From: Aradhya Bhatia @ 2023-08-09 17:39 UTC (permalink / raw)
To: Andrew Davis, Lee Jones, Rob Herring, Krzysztof Kozlowski,
Conor Dooley, Nishanth Menon, Vignesh Raghavendra, Tero Kristo
Cc: devicetree, linux-arm-kernel, linux-kernel
Hi Andrew,
Thank you for quickly whipping up these patches! =)
On 09-Aug-23 22:27, Andrew Davis wrote:
> Add TI DSS OLDI-IO control registers compatible. This is a region of 5
> 32bit registers found in the TI AM65 CTRL_MMR0 register space[0]. They
> are used to control the characteristics of the OLDI DATA/CLK IO as needed
> by the DSS display controller node.
As long as the driver takes care of it, we can reuse the same compatible
even when OLDI IO Ctrl registers change from SoC to SoC, (in this case,
AM65 to AM62), right?
Regards
Aradhya
>
> [0] https://www.ti.com/lit/pdf/spruid7
>
> Signed-off-by: Andrew Davis <afd@ti.com>
> ---
> Documentation/devicetree/bindings/mfd/syscon.yaml | 1 +
> 1 file changed, 1 insertion(+)
>
> diff --git a/Documentation/devicetree/bindings/mfd/syscon.yaml b/Documentation/devicetree/bindings/mfd/syscon.yaml
> index 8103154bbb529..5029abd6d6411 100644
> --- a/Documentation/devicetree/bindings/mfd/syscon.yaml
> +++ b/Documentation/devicetree/bindings/mfd/syscon.yaml
> @@ -69,6 +69,7 @@ properties:
> - rockchip,rk3588-qos
> - rockchip,rv1126-qos
> - starfive,jh7100-sysmain
> + - ti,dss-oldi-io-ctrl
>
> - const: syscon
>
^ permalink raw reply [flat|nested] 8+ messages in thread
* Re: [PATCH 1/2] dt-bindings: mfd: syscon: Add ti,dss-oldi-io-ctrl compatible
2023-08-09 17:39 ` [PATCH 1/2] dt-bindings: mfd: syscon: Add ti,dss-oldi-io-ctrl compatible Aradhya Bhatia
@ 2023-08-09 17:59 ` Andrew Davis
2023-08-09 19:00 ` Aradhya Bhatia
0 siblings, 1 reply; 8+ messages in thread
From: Andrew Davis @ 2023-08-09 17:59 UTC (permalink / raw)
To: Aradhya Bhatia, Lee Jones, Rob Herring, Krzysztof Kozlowski,
Conor Dooley, Nishanth Menon, Vignesh Raghavendra, Tero Kristo
Cc: devicetree, linux-arm-kernel, linux-kernel
On 8/9/23 12:39 PM, Aradhya Bhatia wrote:
> Hi Andrew,
>
> Thank you for quickly whipping up these patches! =)
>
> On 09-Aug-23 22:27, Andrew Davis wrote:
>> Add TI DSS OLDI-IO control registers compatible. This is a region of 5
>> 32bit registers found in the TI AM65 CTRL_MMR0 register space[0]. They
>> are used to control the characteristics of the OLDI DATA/CLK IO as needed
>> by the DSS display controller node.
>
> As long as the driver takes care of it, we can reuse the same compatible
> even when OLDI IO Ctrl registers change from SoC to SoC, (in this case,
> AM65 to AM62), right?
>
That depends, is the register space still "compatible" with the AM65
version of this space? If not then we would want to qualify these
with their SoC versions.
A quick check of the documentation shows the register space is still
5 registers, 4 DATA and 1 CLK. The contents are different though, but
since this compatible string is not used to match with a driver that
would care (that is handled by the DSS node which does have different
compatibles for each device), I'm actually not sure. Guess we can leave
that decision to the DT binding maintainers..
Andrew
> Regards
> Aradhya
>
>>
>> [0] https://www.ti.com/lit/pdf/spruid7
>>
>> Signed-off-by: Andrew Davis <afd@ti.com>
>> ---
>> Documentation/devicetree/bindings/mfd/syscon.yaml | 1 +
>> 1 file changed, 1 insertion(+)
>>
>> diff --git a/Documentation/devicetree/bindings/mfd/syscon.yaml b/Documentation/devicetree/bindings/mfd/syscon.yaml
>> index 8103154bbb529..5029abd6d6411 100644
>> --- a/Documentation/devicetree/bindings/mfd/syscon.yaml
>> +++ b/Documentation/devicetree/bindings/mfd/syscon.yaml
>> @@ -69,6 +69,7 @@ properties:
>> - rockchip,rk3588-qos
>> - rockchip,rv1126-qos
>> - starfive,jh7100-sysmain
>> + - ti,dss-oldi-io-ctrl
>>
>> - const: syscon
>>
^ permalink raw reply [flat|nested] 8+ messages in thread
* Re: [PATCH 1/2] dt-bindings: mfd: syscon: Add ti,dss-oldi-io-ctrl compatible
2023-08-09 17:59 ` Andrew Davis
@ 2023-08-09 19:00 ` Aradhya Bhatia
2023-08-09 21:31 ` Conor Dooley
0 siblings, 1 reply; 8+ messages in thread
From: Aradhya Bhatia @ 2023-08-09 19:00 UTC (permalink / raw)
To: Andrew Davis, Lee Jones, Rob Herring, Krzysztof Kozlowski,
Conor Dooley, Nishanth Menon, Vignesh Raghavendra, Tero Kristo
Cc: devicetree, linux-arm-kernel, linux-kernel
On 09-Aug-23 23:29, Andrew Davis wrote:
> On 8/9/23 12:39 PM, Aradhya Bhatia wrote:
>> Hi Andrew,
>>
>> Thank you for quickly whipping up these patches! =)
>>
>> On 09-Aug-23 22:27, Andrew Davis wrote:
>>> Add TI DSS OLDI-IO control registers compatible. This is a region of 5
>>> 32bit registers found in the TI AM65 CTRL_MMR0 register space[0]. They
>>> are used to control the characteristics of the OLDI DATA/CLK IO as
>>> needed
>>> by the DSS display controller node.
>>
>> As long as the driver takes care of it, we can reuse the same compatible
>> even when OLDI IO Ctrl registers change from SoC to SoC, (in this case,
>> AM65 to AM62), right?
>>
>
> That depends, is the register space still "compatible" with the AM65
> version of this space? If not then we would want to qualify these
> with their SoC versions.
It is certainly not compatible. More on this below.
>
> A quick check of the documentation shows the register space is still
> 5 registers, 4 DATA and 1 CLK. The contents are different though, but
> since this compatible string is not used to match with a driver that
> would care (that is handled by the DSS node which does have different
> compatibles for each device), I'm actually not sure. Guess we can leave
> that decision to the DT binding maintainers..
Exactly. The DSS driver in our, as you like to call, evil-vendor-tree
uses the compatible information to decide which register offsets to
write to, and what to write.
On the register compatibility situation...
AM62 OLDI IO Ctrl has, in total, 12 registers (as opposed to 5 in AM65).
There are 4 Data and 1 Clk registers (per OLDI). And there are 2 OLDI
transmitters in AM62. However, their contents are different as you
noted.
There are 2 more registers in AM62 (unlike AM65), that control
power-down and loop-back. And it is the power-down register, that will
be primarily used by the driver.
Regards
Aradhya
>
> Andrew
>
>> Regards
>> Aradhya
>>
>>>
>>> [0] https://www.ti.com/lit/pdf/spruid7
>>>
>>> Signed-off-by: Andrew Davis <afd@ti.com>
>>> ---
>>> Documentation/devicetree/bindings/mfd/syscon.yaml | 1 +
>>> 1 file changed, 1 insertion(+)
>>>
>>> diff --git a/Documentation/devicetree/bindings/mfd/syscon.yaml
>>> b/Documentation/devicetree/bindings/mfd/syscon.yaml
>>> index 8103154bbb529..5029abd6d6411 100644
>>> --- a/Documentation/devicetree/bindings/mfd/syscon.yaml
>>> +++ b/Documentation/devicetree/bindings/mfd/syscon.yaml
>>> @@ -69,6 +69,7 @@ properties:
>>> - rockchip,rk3588-qos
>>> - rockchip,rv1126-qos
>>> - starfive,jh7100-sysmain
>>> + - ti,dss-oldi-io-ctrl
>>> - const: syscon
>>>
^ permalink raw reply [flat|nested] 8+ messages in thread
* Re: [PATCH 1/2] dt-bindings: mfd: syscon: Add ti,dss-oldi-io-ctrl compatible
2023-08-09 19:00 ` Aradhya Bhatia
@ 2023-08-09 21:31 ` Conor Dooley
2023-08-09 21:38 ` Andrew Davis
0 siblings, 1 reply; 8+ messages in thread
From: Conor Dooley @ 2023-08-09 21:31 UTC (permalink / raw)
To: Aradhya Bhatia
Cc: Andrew Davis, Lee Jones, Rob Herring, Krzysztof Kozlowski,
Conor Dooley, Nishanth Menon, Vignesh Raghavendra, Tero Kristo,
devicetree, linux-arm-kernel, linux-kernel
[-- Attachment #1: Type: text/plain, Size: 3381 bytes --]
On Thu, Aug 10, 2023 at 12:30:03AM +0530, Aradhya Bhatia wrote:
>
>
> On 09-Aug-23 23:29, Andrew Davis wrote:
> > On 8/9/23 12:39 PM, Aradhya Bhatia wrote:
> >> Hi Andrew,
> >>
> >> Thank you for quickly whipping up these patches! =)
> >>
> >> On 09-Aug-23 22:27, Andrew Davis wrote:
> >>> Add TI DSS OLDI-IO control registers compatible. This is a region of 5
> >>> 32bit registers found in the TI AM65 CTRL_MMR0 register space[0]. They
> >>> are used to control the characteristics of the OLDI DATA/CLK IO as
> >>> needed
> >>> by the DSS display controller node.
> >>
> >> As long as the driver takes care of it, we can reuse the same compatible
> >> even when OLDI IO Ctrl registers change from SoC to SoC, (in this case,
> >> AM65 to AM62), right?
> >>
> >
> > That depends, is the register space still "compatible" with the AM65
> > version of this space? If not then we would want to qualify these
> > with their SoC versions.
Even if they are compatible, having soc-specific compatibles with a
fallback to the common oldi compatible string would be ideal.
> It is certainly not compatible. More on this below.
But as they're not compatible, that's kinda moot anyway.
> > A quick check of the documentation shows the register space is still
> > 5 registers, 4 DATA and 1 CLK. The contents are different though, but
> > since this compatible string is not used to match with a driver that
> > would care (that is handled by the DSS node which does have different
> > compatibles for each device), I'm actually not sure.
> > Guess we can leave
> > that decision to the DT binding maintainers..
I'm not 100% sure what this decision actually is. Could you elaborate?
> Exactly. The DSS driver in our, as you like to call, evil-vendor-tree
> uses the compatible information to decide which register offsets to
> write to, and what to write.
>
>
> On the register compatibility situation...
>
> AM62 OLDI IO Ctrl has, in total, 12 registers (as opposed to 5 in AM65).
>
> There are 4 Data and 1 Clk registers (per OLDI). And there are 2 OLDI
> transmitters in AM62. However, their contents are different as you
> noted.
>
> There are 2 more registers in AM62 (unlike AM65), that control
> power-down and loop-back. And it is the power-down register, that will
> be primarily used by the driver.
> >>> [0] https://www.ti.com/lit/pdf/spruid7
> >>>
> >>> Signed-off-by: Andrew Davis <afd@ti.com>
> >>> ---
> >>> Documentation/devicetree/bindings/mfd/syscon.yaml | 1 +
> >>> 1 file changed, 1 insertion(+)
> >>>
> >>> diff --git a/Documentation/devicetree/bindings/mfd/syscon.yaml
> >>> b/Documentation/devicetree/bindings/mfd/syscon.yaml
> >>> index 8103154bbb529..5029abd6d6411 100644
> >>> --- a/Documentation/devicetree/bindings/mfd/syscon.yaml
> >>> +++ b/Documentation/devicetree/bindings/mfd/syscon.yaml
> >>> @@ -69,6 +69,7 @@ properties:
> >>> - rockchip,rk3588-qos
> >>> - rockchip,rv1126-qos
> >>> - starfive,jh7100-sysmain
> >>> + - ti,dss-oldi-io-ctrl
So it sounds like this compatible, that appears to be generic, should
instead be soc-specific as the register layout is different between
SoCs?
Apologies if I have misunderstood.
Thanks,
Conor.
> >>> - const: syscon
> >>>
>
[-- Attachment #2: signature.asc --]
[-- Type: application/pgp-signature, Size: 228 bytes --]
^ permalink raw reply [flat|nested] 8+ messages in thread
* Re: [PATCH 1/2] dt-bindings: mfd: syscon: Add ti,dss-oldi-io-ctrl compatible
2023-08-09 21:31 ` Conor Dooley
@ 2023-08-09 21:38 ` Andrew Davis
0 siblings, 0 replies; 8+ messages in thread
From: Andrew Davis @ 2023-08-09 21:38 UTC (permalink / raw)
To: Conor Dooley, Aradhya Bhatia
Cc: Lee Jones, Rob Herring, Krzysztof Kozlowski, Conor Dooley,
Nishanth Menon, Vignesh Raghavendra, Tero Kristo, devicetree,
linux-arm-kernel, linux-kernel
On 8/9/23 4:31 PM, Conor Dooley wrote:
> On Thu, Aug 10, 2023 at 12:30:03AM +0530, Aradhya Bhatia wrote:
>>
>>
>> On 09-Aug-23 23:29, Andrew Davis wrote:
>>> On 8/9/23 12:39 PM, Aradhya Bhatia wrote:
>>>> Hi Andrew,
>>>>
>>>> Thank you for quickly whipping up these patches! =)
>>>>
>>>> On 09-Aug-23 22:27, Andrew Davis wrote:
>>>>> Add TI DSS OLDI-IO control registers compatible. This is a region of 5
>>>>> 32bit registers found in the TI AM65 CTRL_MMR0 register space[0]. They
>>>>> are used to control the characteristics of the OLDI DATA/CLK IO as
>>>>> needed
>>>>> by the DSS display controller node.
>>>>
>>>> As long as the driver takes care of it, we can reuse the same compatible
>>>> even when OLDI IO Ctrl registers change from SoC to SoC, (in this case,
>>>> AM65 to AM62), right?
>>>>
>>>
>>> That depends, is the register space still "compatible" with the AM65
>>> version of this space? If not then we would want to qualify these
>>> with their SoC versions.
>
> Even if they are compatible, having soc-specific compatibles with a
> fallback to the common oldi compatible string would be ideal.
>
>> It is certainly not compatible. More on this below.
>
> But as they're not compatible, that's kinda moot anyway.
>
>>> A quick check of the documentation shows the register space is still
>>> 5 registers, 4 DATA and 1 CLK. The contents are different though, but
>>> since this compatible string is not used to match with a driver that
>>> would care (that is handled by the DSS node which does have different
>>> compatibles for each device), I'm actually not sure.
>
>>> Guess we can leave
>>> that decision to the DT binding maintainers..
>
> I'm not 100% sure what this decision actually is. Could you elaborate?
>
I was not exactly aware of the extent of the incompatibilities.
If they are not compatible, then there is really no decision needed,
they must have different strings.
>
>> Exactly. The DSS driver in our, as you like to call, evil-vendor-tree
>> uses the compatible information to decide which register offsets to
>> write to, and what to write.
>>
>>
>> On the register compatibility situation...
>>
>> AM62 OLDI IO Ctrl has, in total, 12 registers (as opposed to 5 in AM65).
>>
>> There are 4 Data and 1 Clk registers (per OLDI). And there are 2 OLDI
>> transmitters in AM62. However, their contents are different as you
>> noted.
>>
>> There are 2 more registers in AM62 (unlike AM65), that control
>> power-down and loop-back. And it is the power-down register, that will
>> be primarily used by the driver.
>
>>>>> [0] https://www.ti.com/lit/pdf/spruid7
>>>>>
>>>>> Signed-off-by: Andrew Davis <afd@ti.com>
>>>>> ---
>>>>> Documentation/devicetree/bindings/mfd/syscon.yaml | 1 +
>>>>> 1 file changed, 1 insertion(+)
>>>>>
>>>>> diff --git a/Documentation/devicetree/bindings/mfd/syscon.yaml
>>>>> b/Documentation/devicetree/bindings/mfd/syscon.yaml
>>>>> index 8103154bbb529..5029abd6d6411 100644
>>>>> --- a/Documentation/devicetree/bindings/mfd/syscon.yaml
>>>>> +++ b/Documentation/devicetree/bindings/mfd/syscon.yaml
>>>>> @@ -69,6 +69,7 @@ properties:
>>>>> - rockchip,rk3588-qos
>>>>> - rockchip,rv1126-qos
>>>>> - starfive,jh7100-sysmain
>>>>> + - ti,dss-oldi-io-ctrl
>
> So it sounds like this compatible, that appears to be generic, should
> instead be soc-specific as the register layout is different between
> SoCs?
>
Sounds like it, I'll go and make this soc-specific.
Thanks,
Andrew
> Apologies if I have misunderstood.
>
> Thanks,
> Conor.
>
>>>>> - const: syscon
>>>>>
>>
^ permalink raw reply [flat|nested] 8+ messages in thread
* Re: [PATCH 1/2] dt-bindings: mfd: syscon: Add ti,dss-oldi-io-ctrl compatible
2023-08-09 16:57 [PATCH 1/2] dt-bindings: mfd: syscon: Add ti,dss-oldi-io-ctrl compatible Andrew Davis
2023-08-09 16:57 ` [PATCH 2/2] arm64: dts: ti: k3-am65: Add full compatible to dss-oldi-io-ctrl node Andrew Davis
2023-08-09 17:39 ` [PATCH 1/2] dt-bindings: mfd: syscon: Add ti,dss-oldi-io-ctrl compatible Aradhya Bhatia
@ 2023-08-17 17:07 ` Lee Jones
2 siblings, 0 replies; 8+ messages in thread
From: Lee Jones @ 2023-08-17 17:07 UTC (permalink / raw)
To: Andrew Davis
Cc: Rob Herring, Krzysztof Kozlowski, Conor Dooley, Nishanth Menon,
Vignesh Raghavendra, Tero Kristo, Aradhya Bhatia, devicetree,
linux-arm-kernel, linux-kernel
On Wed, 09 Aug 2023, Andrew Davis wrote:
> Add TI DSS OLDI-IO control registers compatible. This is a region of 5
> 32bit registers found in the TI AM65 CTRL_MMR0 register space[0]. They
> are used to control the characteristics of the OLDI DATA/CLK IO as needed
> by the DSS display controller node.
>
> [0] https://www.ti.com/lit/pdf/spruid7
>
> Signed-off-by: Andrew Davis <afd@ti.com>
> ---
> Documentation/devicetree/bindings/mfd/syscon.yaml | 1 +
> 1 file changed, 1 insertion(+)
Dropping. Please resubmit once the discussion is over.
> diff --git a/Documentation/devicetree/bindings/mfd/syscon.yaml b/Documentation/devicetree/bindings/mfd/syscon.yaml
> index 8103154bbb529..5029abd6d6411 100644
> --- a/Documentation/devicetree/bindings/mfd/syscon.yaml
> +++ b/Documentation/devicetree/bindings/mfd/syscon.yaml
> @@ -69,6 +69,7 @@ properties:
> - rockchip,rk3588-qos
> - rockchip,rv1126-qos
> - starfive,jh7100-sysmain
> + - ti,dss-oldi-io-ctrl
>
> - const: syscon
>
> --
> 2.39.2
>
--
Lee Jones [李琼斯]
^ permalink raw reply [flat|nested] 8+ messages in thread
end of thread, other threads:[~2023-08-17 17:08 UTC | newest]
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2023-08-09 16:57 [PATCH 1/2] dt-bindings: mfd: syscon: Add ti,dss-oldi-io-ctrl compatible Andrew Davis
2023-08-09 16:57 ` [PATCH 2/2] arm64: dts: ti: k3-am65: Add full compatible to dss-oldi-io-ctrl node Andrew Davis
2023-08-09 17:39 ` [PATCH 1/2] dt-bindings: mfd: syscon: Add ti,dss-oldi-io-ctrl compatible Aradhya Bhatia
2023-08-09 17:59 ` Andrew Davis
2023-08-09 19:00 ` Aradhya Bhatia
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