* [PATCH v2 01/16] dt-bindings: phy: migrate QMP USB PHY bindings to qcom,sc8280xp-qmp-usb3-uni-phy.yaml
2023-08-21 0:25 [PATCH v2 00/16] phy: qcom-qmp-usb: convert to newer style of bindings Dmitry Baryshkov
@ 2023-08-21 0:25 ` Dmitry Baryshkov
2023-08-21 6:16 ` Krzysztof Kozlowski
2023-08-21 0:25 ` [PATCH v2 02/16] phy: qcom-qmp-usb: simplify clock handling Dmitry Baryshkov
` (14 subsequent siblings)
15 siblings, 1 reply; 19+ messages in thread
From: Dmitry Baryshkov @ 2023-08-21 0:25 UTC (permalink / raw)
To: Andy Gross, Bjorn Andersson, Konrad Dybcio, Vinod Koul,
Kishon Vijay Abraham I, Rob Herring, Krzysztof Kozlowski,
Conor Dooley
Cc: Philipp Zabel, Johan Hovold, linux-arm-msm, linux-phy, devicetree
Migrate legacy bindings (described in qcom,msm8996-qmp-usb3-phy.yaml)
to qcom,sc8280xp-qmp-usb3-uni-phy.yaml. This removes a need to declare
the child PHY node or split resource regions.
Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
---
.../phy/qcom,msm8996-qmp-usb3-phy.yaml | 287 ------------------
.../phy/qcom,sc8280xp-qmp-usb3-uni-phy.yaml | 53 +++-
2 files changed, 51 insertions(+), 289 deletions(-)
delete mode 100644 Documentation/devicetree/bindings/phy/qcom,msm8996-qmp-usb3-phy.yaml
diff --git a/Documentation/devicetree/bindings/phy/qcom,msm8996-qmp-usb3-phy.yaml b/Documentation/devicetree/bindings/phy/qcom,msm8996-qmp-usb3-phy.yaml
deleted file mode 100644
index 827109d37041..000000000000
--- a/Documentation/devicetree/bindings/phy/qcom,msm8996-qmp-usb3-phy.yaml
+++ /dev/null
@@ -1,287 +0,0 @@
-# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
-%YAML 1.2
----
-$id: http://devicetree.org/schemas/phy/qcom,msm8996-qmp-usb3-phy.yaml#
-$schema: http://devicetree.org/meta-schemas/core.yaml#
-
-title: Qualcomm QMP PHY controller (USB, MSM8996)
-
-maintainers:
- - Vinod Koul <vkoul@kernel.org>
-
-description:
- QMP PHY controller supports physical layer functionality for a number of
- controllers on Qualcomm chipsets, such as, PCIe, UFS, and USB.
-
- Note that these bindings are for SoCs up to SC8180X. For newer SoCs, see
- qcom,sc8280xp-qmp-usb3-uni-phy.yaml.
-
-properties:
- compatible:
- enum:
- - qcom,ipq6018-qmp-usb3-phy
- - qcom,ipq8074-qmp-usb3-phy
- - qcom,msm8996-qmp-usb3-phy
- - qcom,msm8998-qmp-usb3-phy
- - qcom,sdm845-qmp-usb3-uni-phy
- - qcom,sdx55-qmp-usb3-uni-phy
- - qcom,sdx65-qmp-usb3-uni-phy
- - qcom,sm8150-qmp-usb3-uni-phy
- - qcom,sm8250-qmp-usb3-uni-phy
- - qcom,sm8350-qmp-usb3-uni-phy
-
- reg:
- items:
- - description: serdes
-
- "#address-cells":
- enum: [ 1, 2 ]
-
- "#size-cells":
- enum: [ 1, 2 ]
-
- ranges: true
-
- clocks:
- minItems: 3
- maxItems: 4
-
- clock-names:
- minItems: 3
- maxItems: 4
-
- power-domains:
- maxItems: 1
-
- resets:
- maxItems: 2
-
- reset-names:
- maxItems: 2
-
- vdda-phy-supply: true
-
- vdda-pll-supply: true
-
- vddp-ref-clk-supply: true
-
-patternProperties:
- "^phy@[0-9a-f]+$":
- type: object
- description: single PHY-provider child node
- properties:
- reg:
- minItems: 3
- maxItems: 6
-
- clocks:
- items:
- - description: PIPE clock
-
- clock-names:
- deprecated: true
- items:
- - const: pipe0
-
- "#clock-cells":
- const: 0
-
- clock-output-names:
- maxItems: 1
-
- "#phy-cells":
- const: 0
-
- required:
- - reg
- - clocks
- - "#clock-cells"
- - clock-output-names
- - "#phy-cells"
-
- additionalProperties: false
-
-required:
- - compatible
- - reg
- - "#address-cells"
- - "#size-cells"
- - ranges
- - clocks
- - clock-names
- - resets
- - reset-names
- - vdda-phy-supply
- - vdda-pll-supply
-
-additionalProperties: false
-
-allOf:
- - if:
- properties:
- compatible:
- contains:
- enum:
- - qcom,sdm845-qmp-usb3-uni-phy
- then:
- properties:
- clocks:
- maxItems: 4
- clock-names:
- items:
- - const: aux
- - const: cfg_ahb
- - const: ref
- - const: com_aux
- resets:
- maxItems: 2
- reset-names:
- items:
- - const: phy
- - const: common
-
- - if:
- properties:
- compatible:
- contains:
- enum:
- - qcom,ipq8074-qmp-usb3-phy
- - qcom,msm8996-qmp-usb3-phy
- - qcom,msm8998-qmp-usb3-phy
- - qcom,sdx55-qmp-usb3-uni-phy
- - qcom,sdx65-qmp-usb3-uni-phy
- then:
- properties:
- clocks:
- maxItems: 3
- clock-names:
- items:
- - const: aux
- - const: cfg_ahb
- - const: ref
- resets:
- maxItems: 2
- reset-names:
- items:
- - const: phy
- - const: common
-
- - if:
- properties:
- compatible:
- contains:
- enum:
- - qcom,sm8150-qmp-usb3-uni-phy
- - qcom,sm8250-qmp-usb3-uni-phy
- - qcom,sm8350-qmp-usb3-uni-phy
- then:
- properties:
- clocks:
- maxItems: 4
- clock-names:
- items:
- - const: aux
- - const: ref_clk_src
- - const: ref
- - const: com_aux
- resets:
- maxItems: 2
- reset-names:
- items:
- - const: phy
- - const: common
-
- - if:
- properties:
- compatible:
- contains:
- enum:
- - qcom,msm8998-qmp-usb3-phy
- then:
- patternProperties:
- "^phy@[0-9a-f]+$":
- properties:
- reg:
- items:
- - description: TX lane 1
- - description: RX lane 1
- - description: PCS
- - description: TX lane 2
- - description: RX lane 2
-
- - if:
- properties:
- compatible:
- contains:
- enum:
- - qcom,ipq6018-qmp-usb3-phy
- - qcom,ipq8074-qmp-usb3-phy
- - qcom,sdx55-qmp-usb3-uni-phy
- - qcom,sdx65-qmp-usb3-uni-phy
- - qcom,sm8150-qmp-usb3-uni-phy
- then:
- patternProperties:
- "^phy@[0-9a-f]+$":
- properties:
- reg:
- items:
- - description: TX
- - description: RX
- - description: PCS
- - description: PCS_MISC
-
- - if:
- properties:
- compatible:
- contains:
- enum:
- - qcom,msm8996-qmp-usb3-phy
- - qcom,sm8250-qmp-usb3-uni-phy
- - qcom,sm8350-qmp-usb3-uni-phy
- then:
- patternProperties:
- "^phy@[0-9a-f]+$":
- properties:
- reg:
- items:
- - description: TX
- - description: RX
- - description: PCS
-
-examples:
- - |
- #include <dt-bindings/clock/qcom,gcc-sdm845.h>
- usb_2_qmpphy: phy-wrapper@88eb000 {
- compatible = "qcom,sdm845-qmp-usb3-uni-phy";
- reg = <0x088eb000 0x18c>;
- #address-cells = <1>;
- #size-cells = <1>;
- ranges = <0x0 0x088eb000 0x2000>;
-
- clocks = <&gcc GCC_USB3_SEC_PHY_AUX_CLK >,
- <&gcc GCC_USB_PHY_CFG_AHB2PHY_CLK>,
- <&gcc GCC_USB3_SEC_CLKREF_CLK>,
- <&gcc GCC_USB3_SEC_PHY_COM_AUX_CLK>;
- clock-names = "aux", "cfg_ahb", "ref", "com_aux";
-
- resets = <&gcc GCC_USB3PHY_PHY_SEC_BCR>,
- <&gcc GCC_USB3_PHY_SEC_BCR>;
- reset-names = "phy", "common";
-
- vdda-phy-supply = <&vdda_usb2_ss_1p2>;
- vdda-pll-supply = <&vdda_usb2_ss_core>;
-
- usb_2_ssphy: phy@200 {
- reg = <0x200 0x128>,
- <0x400 0x1fc>,
- <0x800 0x218>,
- <0x600 0x70>;
-
- clocks = <&gcc GCC_USB3_SEC_PHY_PIPE_CLK>;
-
- #clock-cells = <0>;
- clock-output-names = "usb3_uni_phy_pipe_clk_src";
-
- #phy-cells = <0>;
- };
- };
diff --git a/Documentation/devicetree/bindings/phy/qcom,sc8280xp-qmp-usb3-uni-phy.yaml b/Documentation/devicetree/bindings/phy/qcom,sc8280xp-qmp-usb3-uni-phy.yaml
index f99fbbcd68fb..60cbcf3c19b3 100644
--- a/Documentation/devicetree/bindings/phy/qcom,sc8280xp-qmp-usb3-uni-phy.yaml
+++ b/Documentation/devicetree/bindings/phy/qcom,sc8280xp-qmp-usb3-uni-phy.yaml
@@ -16,20 +16,33 @@ description:
properties:
compatible:
enum:
+ - qcom,ipq6018-qmp-usb3-phy
+ - qcom,ipq8074-qmp-usb3-phy
- qcom,ipq9574-qmp-usb3-phy
+ - qcom,msm8996-qmp-usb3-phy
+ - qcom,msm8998-qmp-usb3-phy
- qcom,qcm2290-qmp-usb3-phy
- qcom,sa8775p-qmp-usb3-uni-phy
- qcom,sc8280xp-qmp-usb3-uni-phy
+ - qcom,sdm845-qmp-usb3-uni-phy
+ - qcom,sdx55-qmp-usb3-uni-phy
+ - qcom,sdx65-qmp-usb3-uni-phy
- qcom,sm6115-qmp-usb3-phy
+ - qcom,sm8150-qmp-usb3-uni-phy
+ - qcom,sm8250-qmp-usb3-uni-phy
+ - qcom,sm8350-qmp-usb3-uni-phy
+
reg:
maxItems: 1
clocks:
- maxItems: 4
+ minItems: 4
+ maxItems: 5
clock-names:
- maxItems: 4
+ minItems: 4
+ maxItems: 5
power-domains:
maxItems: 1
@@ -74,7 +87,13 @@ allOf:
compatible:
contains:
enum:
+ - qcom,ipq6018-qmp-usb3-phy
+ - qcom,ipq8074-qmp-usb3-phy
- qcom,ipq9574-qmp-usb3-phy
+ - qcom,msm8996-qmp-usb3-phy
+ - qcom,msm8998-qmp-usb3-phy
+ - qcom,sdx55-qmp-usb3-uni-phy
+ - qcom,sdx65-qmp-usb3-uni-phy
then:
properties:
clock-names:
@@ -109,6 +128,9 @@ allOf:
enum:
- qcom,sa8775p-qmp-usb3-uni-phy
- qcom,sc8280xp-qmp-usb3-uni-phy
+ - qcom,sm8150-qmp-usb3-uni-phy
+ - qcom,sm8250-qmp-usb3-uni-phy
+ - qcom,sm8350-qmp-usb3-uni-phy
then:
properties:
clocks:
@@ -119,6 +141,33 @@ allOf:
- const: ref
- const: com_aux
- const: pipe
+
+ - if:
+ properties:
+ compatible:
+ contains:
+ enum:
+ - qcom,sdm845-qmp-usb3-uni-phy
+ then:
+ properties:
+ clocks:
+ maxItems: 5
+ clock-names:
+ items:
+ - const: aux
+ - const: cfg_ahb
+ - const: ref
+ - const: com_aux
+ - const: pipe
+
+ - if:
+ properties:
+ compatible:
+ contains:
+ enum:
+ - qcom,sa8775p-qmp-usb3-uni-phy
+ - qcom,sc8280xp-qmp-usb3-uni-phy
+ then:
required:
- power-domains
--
2.39.2
^ permalink raw reply related [flat|nested] 19+ messages in thread* Re: [PATCH v2 01/16] dt-bindings: phy: migrate QMP USB PHY bindings to qcom,sc8280xp-qmp-usb3-uni-phy.yaml
2023-08-21 0:25 ` [PATCH v2 01/16] dt-bindings: phy: migrate QMP USB PHY bindings to qcom,sc8280xp-qmp-usb3-uni-phy.yaml Dmitry Baryshkov
@ 2023-08-21 6:16 ` Krzysztof Kozlowski
0 siblings, 0 replies; 19+ messages in thread
From: Krzysztof Kozlowski @ 2023-08-21 6:16 UTC (permalink / raw)
To: Dmitry Baryshkov, Andy Gross, Bjorn Andersson, Konrad Dybcio,
Vinod Koul, Kishon Vijay Abraham I, Rob Herring,
Krzysztof Kozlowski, Conor Dooley
Cc: Philipp Zabel, Johan Hovold, linux-arm-msm, linux-phy, devicetree
On 21/08/2023 02:25, Dmitry Baryshkov wrote:
> Migrate legacy bindings (described in qcom,msm8996-qmp-usb3-phy.yaml)
> to qcom,sc8280xp-qmp-usb3-uni-phy.yaml. This removes a need to declare
> the child PHY node or split resource regions.
>
> Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
> diff --git a/Documentation/devicetree/bindings/phy/qcom,sc8280xp-qmp-usb3-uni-phy.yaml b/Documentation/devicetree/bindings/phy/qcom,sc8280xp-qmp-usb3-uni-phy.yaml
> index f99fbbcd68fb..60cbcf3c19b3 100644
> --- a/Documentation/devicetree/bindings/phy/qcom,sc8280xp-qmp-usb3-uni-phy.yaml
> +++ b/Documentation/devicetree/bindings/phy/qcom,sc8280xp-qmp-usb3-uni-phy.yaml
> @@ -16,20 +16,33 @@ description:
> properties:
> compatible:
> enum:
> + - qcom,ipq6018-qmp-usb3-phy
> + - qcom,ipq8074-qmp-usb3-phy
> - qcom,ipq9574-qmp-usb3-phy
> + - qcom,msm8996-qmp-usb3-phy
> + - qcom,msm8998-qmp-usb3-phy
> - qcom,qcm2290-qmp-usb3-phy
> - qcom,sa8775p-qmp-usb3-uni-phy
> - qcom,sc8280xp-qmp-usb3-uni-phy
> + - qcom,sdm845-qmp-usb3-uni-phy
> + - qcom,sdx55-qmp-usb3-uni-phy
> + - qcom,sdx65-qmp-usb3-uni-phy
> - qcom,sm6115-qmp-usb3-phy
> + - qcom,sm8150-qmp-usb3-uni-phy
> + - qcom,sm8250-qmp-usb3-uni-phy
> + - qcom,sm8350-qmp-usb3-uni-phy
> +
>
Just one blank line
> reg:
> maxItems: 1
>
> clocks:
> - maxItems: 4
> + minItems: 4
> + maxItems: 5
The clocks become now variable, so you need to constrain the number in
allOf:if:then per each variant. At least one if: cases lack such
constrains (qcom,ipq9574-qmp-usb3-phy, if I am looking at correct revision)
Best regards,
Krzysztof
^ permalink raw reply [flat|nested] 19+ messages in thread
* [PATCH v2 02/16] phy: qcom-qmp-usb: simplify clock handling
2023-08-21 0:25 [PATCH v2 00/16] phy: qcom-qmp-usb: convert to newer style of bindings Dmitry Baryshkov
2023-08-21 0:25 ` [PATCH v2 01/16] dt-bindings: phy: migrate QMP USB PHY bindings to qcom,sc8280xp-qmp-usb3-uni-phy.yaml Dmitry Baryshkov
@ 2023-08-21 0:25 ` Dmitry Baryshkov
2023-08-21 0:25 ` [PATCH v2 03/16] phy: qcom-qmp-usb: rework reset handling Dmitry Baryshkov
` (13 subsequent siblings)
15 siblings, 0 replies; 19+ messages in thread
From: Dmitry Baryshkov @ 2023-08-21 0:25 UTC (permalink / raw)
To: Andy Gross, Bjorn Andersson, Konrad Dybcio, Vinod Koul,
Kishon Vijay Abraham I, Rob Herring, Krzysztof Kozlowski,
Conor Dooley
Cc: Philipp Zabel, Johan Hovold, linux-arm-msm, linux-phy, devicetree
For the existing PHYs for new binding we are going to drop ref_clk_src
clock and always use ref clock. Rather than introducing additional code
to handle legacy vs current bindings (and clock names), use
devm_clk_bulk_get_optional() when new bindings are used and
devm_clk_bulk_get_all() when legacy bindings are in place.
Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
---
drivers/phy/qualcomm/phy-qcom-qmp-usb.c | 90 +++++++------------------
1 file changed, 24 insertions(+), 66 deletions(-)
diff --git a/drivers/phy/qualcomm/phy-qcom-qmp-usb.c b/drivers/phy/qualcomm/phy-qcom-qmp-usb.c
index 0130bb8e809a..626cf4bf396b 100644
--- a/drivers/phy/qualcomm/phy-qcom-qmp-usb.c
+++ b/drivers/phy/qualcomm/phy-qcom-qmp-usb.c
@@ -1172,9 +1172,6 @@ struct qmp_phy_cfg {
const struct qmp_phy_init_tbl *pcs_usb_tbl;
int pcs_usb_tbl_num;
- /* clock ids to be requested */
- const char * const *clk_list;
- int num_clks;
/* resets to be requested */
const char * const *reset_list;
int num_resets;
@@ -1208,6 +1205,7 @@ struct qmp_usb {
struct clk *pipe_clk;
struct clk_bulk_data *clks;
+ int num_clks;
struct reset_control_bulk_data *resets;
struct regulator_bulk_data *vregs;
@@ -1243,31 +1241,10 @@ static inline void qphy_clrbits(void __iomem *base, u32 offset, u32 val)
}
/* list of clocks required by phy */
-static const char * const msm8996_phy_clk_l[] = {
- "aux", "cfg_ahb", "ref",
-};
-
-static const char * const qmp_v3_phy_clk_l[] = {
+static const char * const qmp_usb_phy_clk_l[] = {
"aux", "cfg_ahb", "ref", "com_aux",
};
-static const char * const qmp_v4_phy_clk_l[] = {
- "aux", "ref", "com_aux",
-};
-
-static const char * const qmp_v4_ref_phy_clk_l[] = {
- "aux", "ref_clk_src", "ref", "com_aux",
-};
-
-/* usb3 phy on sdx55 doesn't have com_aux clock */
-static const char * const qmp_v4_sdx55_usbphy_clk_l[] = {
- "aux", "cfg_ahb", "ref"
-};
-
-static const char * const qcm2290_usb3phy_clk_l[] = {
- "cfg_ahb", "ref", "com_aux",
-};
-
/* list of resets */
static const char * const msm8996_usb3phy_reset_l[] = {
"phy", "common",
@@ -1319,8 +1296,6 @@ static const struct qmp_phy_cfg ipq8074_usb3phy_cfg = {
.rx_tbl_num = ARRAY_SIZE(ipq8074_usb3_rx_tbl),
.pcs_tbl = ipq8074_usb3_pcs_tbl,
.pcs_tbl_num = ARRAY_SIZE(ipq8074_usb3_pcs_tbl),
- .clk_list = msm8996_phy_clk_l,
- .num_clks = ARRAY_SIZE(msm8996_phy_clk_l),
.reset_list = msm8996_usb3phy_reset_l,
.num_resets = ARRAY_SIZE(msm8996_usb3phy_reset_l),
.vreg_list = qmp_phy_vreg_l,
@@ -1341,8 +1316,6 @@ static const struct qmp_phy_cfg ipq9574_usb3phy_cfg = {
.rx_tbl_num = ARRAY_SIZE(ipq9574_usb3_rx_tbl),
.pcs_tbl = ipq9574_usb3_pcs_tbl,
.pcs_tbl_num = ARRAY_SIZE(ipq9574_usb3_pcs_tbl),
- .clk_list = msm8996_phy_clk_l,
- .num_clks = ARRAY_SIZE(msm8996_phy_clk_l),
.reset_list = qcm2290_usb3phy_reset_l,
.num_resets = ARRAY_SIZE(qcm2290_usb3phy_reset_l),
.vreg_list = qmp_phy_vreg_l,
@@ -1361,8 +1334,6 @@ static const struct qmp_phy_cfg msm8996_usb3phy_cfg = {
.rx_tbl_num = ARRAY_SIZE(msm8996_usb3_rx_tbl),
.pcs_tbl = msm8996_usb3_pcs_tbl,
.pcs_tbl_num = ARRAY_SIZE(msm8996_usb3_pcs_tbl),
- .clk_list = msm8996_phy_clk_l,
- .num_clks = ARRAY_SIZE(msm8996_phy_clk_l),
.reset_list = msm8996_usb3phy_reset_l,
.num_resets = ARRAY_SIZE(msm8996_usb3phy_reset_l),
.vreg_list = qmp_phy_vreg_l,
@@ -1383,8 +1354,6 @@ static const struct qmp_phy_cfg sa8775p_usb3_uniphy_cfg = {
.rx_tbl_num = ARRAY_SIZE(sc8280xp_usb3_uniphy_rx_tbl),
.pcs_tbl = sa8775p_usb3_uniphy_pcs_tbl,
.pcs_tbl_num = ARRAY_SIZE(sa8775p_usb3_uniphy_pcs_tbl),
- .clk_list = qmp_v4_phy_clk_l,
- .num_clks = ARRAY_SIZE(qmp_v4_phy_clk_l),
.reset_list = qcm2290_usb3phy_reset_l,
.num_resets = ARRAY_SIZE(qcm2290_usb3phy_reset_l),
.vreg_list = qmp_phy_vreg_l,
@@ -1405,8 +1374,6 @@ static const struct qmp_phy_cfg sc8280xp_usb3_uniphy_cfg = {
.rx_tbl_num = ARRAY_SIZE(sc8280xp_usb3_uniphy_rx_tbl),
.pcs_tbl = sc8280xp_usb3_uniphy_pcs_tbl,
.pcs_tbl_num = ARRAY_SIZE(sc8280xp_usb3_uniphy_pcs_tbl),
- .clk_list = qmp_v4_phy_clk_l,
- .num_clks = ARRAY_SIZE(qmp_v4_phy_clk_l),
.reset_list = qcm2290_usb3phy_reset_l,
.num_resets = ARRAY_SIZE(qcm2290_usb3phy_reset_l),
.vreg_list = qmp_phy_vreg_l,
@@ -1425,8 +1392,6 @@ static const struct qmp_phy_cfg qmp_v3_usb3_uniphy_cfg = {
.rx_tbl_num = ARRAY_SIZE(qmp_v3_usb3_uniphy_rx_tbl),
.pcs_tbl = qmp_v3_usb3_uniphy_pcs_tbl,
.pcs_tbl_num = ARRAY_SIZE(qmp_v3_usb3_uniphy_pcs_tbl),
- .clk_list = qmp_v3_phy_clk_l,
- .num_clks = ARRAY_SIZE(qmp_v3_phy_clk_l),
.reset_list = msm8996_usb3phy_reset_l,
.num_resets = ARRAY_SIZE(msm8996_usb3phy_reset_l),
.vreg_list = qmp_phy_vreg_l,
@@ -1447,8 +1412,6 @@ static const struct qmp_phy_cfg msm8998_usb3phy_cfg = {
.rx_tbl_num = ARRAY_SIZE(msm8998_usb3_rx_tbl),
.pcs_tbl = msm8998_usb3_pcs_tbl,
.pcs_tbl_num = ARRAY_SIZE(msm8998_usb3_pcs_tbl),
- .clk_list = msm8996_phy_clk_l,
- .num_clks = ARRAY_SIZE(msm8996_phy_clk_l),
.reset_list = msm8996_usb3phy_reset_l,
.num_resets = ARRAY_SIZE(msm8996_usb3phy_reset_l),
.vreg_list = qmp_phy_vreg_l,
@@ -1469,8 +1432,6 @@ static const struct qmp_phy_cfg sm8150_usb3_uniphy_cfg = {
.pcs_tbl_num = ARRAY_SIZE(sm8150_usb3_uniphy_pcs_tbl),
.pcs_usb_tbl = sm8150_usb3_uniphy_pcs_usb_tbl,
.pcs_usb_tbl_num = ARRAY_SIZE(sm8150_usb3_uniphy_pcs_usb_tbl),
- .clk_list = qmp_v4_ref_phy_clk_l,
- .num_clks = ARRAY_SIZE(qmp_v4_ref_phy_clk_l),
.reset_list = msm8996_usb3phy_reset_l,
.num_resets = ARRAY_SIZE(msm8996_usb3phy_reset_l),
.vreg_list = qmp_phy_vreg_l,
@@ -1494,8 +1455,6 @@ static const struct qmp_phy_cfg sm8250_usb3_uniphy_cfg = {
.pcs_tbl_num = ARRAY_SIZE(sm8250_usb3_uniphy_pcs_tbl),
.pcs_usb_tbl = sm8250_usb3_uniphy_pcs_usb_tbl,
.pcs_usb_tbl_num = ARRAY_SIZE(sm8250_usb3_uniphy_pcs_usb_tbl),
- .clk_list = qmp_v4_ref_phy_clk_l,
- .num_clks = ARRAY_SIZE(qmp_v4_ref_phy_clk_l),
.reset_list = msm8996_usb3phy_reset_l,
.num_resets = ARRAY_SIZE(msm8996_usb3phy_reset_l),
.vreg_list = qmp_phy_vreg_l,
@@ -1519,8 +1478,6 @@ static const struct qmp_phy_cfg sdx55_usb3_uniphy_cfg = {
.pcs_tbl_num = ARRAY_SIZE(sm8250_usb3_uniphy_pcs_tbl),
.pcs_usb_tbl = sm8250_usb3_uniphy_pcs_usb_tbl,
.pcs_usb_tbl_num = ARRAY_SIZE(sm8250_usb3_uniphy_pcs_usb_tbl),
- .clk_list = qmp_v4_sdx55_usbphy_clk_l,
- .num_clks = ARRAY_SIZE(qmp_v4_sdx55_usbphy_clk_l),
.reset_list = msm8996_usb3phy_reset_l,
.num_resets = ARRAY_SIZE(msm8996_usb3phy_reset_l),
.vreg_list = qmp_phy_vreg_l,
@@ -1544,8 +1501,6 @@ static const struct qmp_phy_cfg sdx65_usb3_uniphy_cfg = {
.pcs_tbl_num = ARRAY_SIZE(sm8350_usb3_uniphy_pcs_tbl),
.pcs_usb_tbl = sm8350_usb3_uniphy_pcs_usb_tbl,
.pcs_usb_tbl_num = ARRAY_SIZE(sm8350_usb3_uniphy_pcs_usb_tbl),
- .clk_list = qmp_v4_sdx55_usbphy_clk_l,
- .num_clks = ARRAY_SIZE(qmp_v4_sdx55_usbphy_clk_l),
.reset_list = msm8996_usb3phy_reset_l,
.num_resets = ARRAY_SIZE(msm8996_usb3phy_reset_l),
.vreg_list = qmp_phy_vreg_l,
@@ -1569,8 +1524,6 @@ static const struct qmp_phy_cfg sm8350_usb3_uniphy_cfg = {
.pcs_tbl_num = ARRAY_SIZE(sm8350_usb3_uniphy_pcs_tbl),
.pcs_usb_tbl = sm8350_usb3_uniphy_pcs_usb_tbl,
.pcs_usb_tbl_num = ARRAY_SIZE(sm8350_usb3_uniphy_pcs_usb_tbl),
- .clk_list = qmp_v4_ref_phy_clk_l,
- .num_clks = ARRAY_SIZE(qmp_v4_ref_phy_clk_l),
.reset_list = msm8996_usb3phy_reset_l,
.num_resets = ARRAY_SIZE(msm8996_usb3phy_reset_l),
.vreg_list = qmp_phy_vreg_l,
@@ -1594,8 +1547,6 @@ static const struct qmp_phy_cfg qcm2290_usb3phy_cfg = {
.rx_tbl_num = ARRAY_SIZE(qcm2290_usb3_rx_tbl),
.pcs_tbl = qcm2290_usb3_pcs_tbl,
.pcs_tbl_num = ARRAY_SIZE(qcm2290_usb3_pcs_tbl),
- .clk_list = qcm2290_usb3phy_clk_l,
- .num_clks = ARRAY_SIZE(qcm2290_usb3phy_clk_l),
.reset_list = qcm2290_usb3phy_reset_l,
.num_resets = ARRAY_SIZE(qcm2290_usb3phy_reset_l),
.vreg_list = qmp_phy_vreg_l,
@@ -1666,7 +1617,7 @@ static int qmp_usb_init(struct phy *phy)
goto err_disable_regulators;
}
- ret = clk_bulk_prepare_enable(cfg->num_clks, qmp->clks);
+ ret = clk_bulk_prepare_enable(qmp->num_clks, qmp->clks);
if (ret)
goto err_assert_reset;
@@ -1689,7 +1640,7 @@ static int qmp_usb_exit(struct phy *phy)
reset_control_bulk_assert(cfg->num_resets, qmp->resets);
- clk_bulk_disable_unprepare(cfg->num_clks, qmp->clks);
+ clk_bulk_disable_unprepare(qmp->num_clks, qmp->clks);
regulator_bulk_disable(cfg->num_vregs, qmp->vregs);
@@ -1863,7 +1814,6 @@ static void qmp_usb_disable_autonomous_mode(struct qmp_usb *qmp)
static int __maybe_unused qmp_usb_runtime_suspend(struct device *dev)
{
struct qmp_usb *qmp = dev_get_drvdata(dev);
- const struct qmp_phy_cfg *cfg = qmp->cfg;
dev_vdbg(dev, "Suspending QMP phy, mode:%d\n", qmp->mode);
@@ -1875,7 +1825,7 @@ static int __maybe_unused qmp_usb_runtime_suspend(struct device *dev)
qmp_usb_enable_autonomous_mode(qmp);
clk_disable_unprepare(qmp->pipe_clk);
- clk_bulk_disable_unprepare(cfg->num_clks, qmp->clks);
+ clk_bulk_disable_unprepare(qmp->num_clks, qmp->clks);
return 0;
}
@@ -1883,7 +1833,6 @@ static int __maybe_unused qmp_usb_runtime_suspend(struct device *dev)
static int __maybe_unused qmp_usb_runtime_resume(struct device *dev)
{
struct qmp_usb *qmp = dev_get_drvdata(dev);
- const struct qmp_phy_cfg *cfg = qmp->cfg;
int ret = 0;
dev_vdbg(dev, "Resuming QMP phy, mode:%d\n", qmp->mode);
@@ -1893,14 +1842,14 @@ static int __maybe_unused qmp_usb_runtime_resume(struct device *dev)
return 0;
}
- ret = clk_bulk_prepare_enable(cfg->num_clks, qmp->clks);
+ ret = clk_bulk_prepare_enable(qmp->num_clks, qmp->clks);
if (ret)
return ret;
ret = clk_prepare_enable(qmp->pipe_clk);
if (ret) {
dev_err(dev, "pipe_clk enable failed, err=%d\n", ret);
- clk_bulk_disable_unprepare(cfg->num_clks, qmp->clks);
+ clk_bulk_disable_unprepare(qmp->num_clks, qmp->clks);
return ret;
}
@@ -1955,9 +1904,8 @@ static int qmp_usb_reset_init(struct qmp_usb *qmp)
static int qmp_usb_clk_init(struct qmp_usb *qmp)
{
- const struct qmp_phy_cfg *cfg = qmp->cfg;
struct device *dev = qmp->dev;
- int num = cfg->num_clks;
+ int num = ARRAY_SIZE(qmp_usb_phy_clk_l);
int i;
qmp->clks = devm_kcalloc(dev, num, sizeof(*qmp->clks), GFP_KERNEL);
@@ -1965,9 +1913,11 @@ static int qmp_usb_clk_init(struct qmp_usb *qmp)
return -ENOMEM;
for (i = 0; i < num; i++)
- qmp->clks[i].id = cfg->clk_list[i];
+ qmp->clks[i].id = qmp_usb_phy_clk_l[i];
- return devm_clk_bulk_get(dev, num, qmp->clks);
+ qmp->num_clks = num;
+
+ return devm_clk_bulk_get_optional(dev, num, qmp->clks);
}
static void phy_clk_release_provider(void *res)
@@ -2047,6 +1997,7 @@ static int qmp_usb_parse_dt_legacy(struct qmp_usb *qmp, struct device_node *np)
const struct qmp_phy_cfg *cfg = qmp->cfg;
struct device *dev = qmp->dev;
bool exclusive = true;
+ int ret;
qmp->serdes = devm_platform_ioremap_resource(pdev, 0);
if (IS_ERR(qmp->serdes))
@@ -2107,6 +2058,12 @@ static int qmp_usb_parse_dt_legacy(struct qmp_usb *qmp, struct device_node *np)
"failed to get pipe clock\n");
}
+ ret = devm_clk_bulk_get_all(qmp->dev, &qmp->clks);
+ if (ret < 0)
+ return ret;
+
+ qmp->num_clks = ret;
+
return 0;
}
@@ -2117,6 +2074,7 @@ static int qmp_usb_parse_dt(struct qmp_usb *qmp)
const struct qmp_usb_offsets *offs = cfg->offsets;
struct device *dev = qmp->dev;
void __iomem *base;
+ int ret;
if (!offs)
return -EINVAL;
@@ -2137,6 +2095,10 @@ static int qmp_usb_parse_dt(struct qmp_usb *qmp)
qmp->rx2 = base + offs->rx2;
}
+ ret = qmp_usb_clk_init(qmp);
+ if (ret)
+ return ret;
+
qmp->pipe_clk = devm_clk_get(dev, "pipe");
if (IS_ERR(qmp->pipe_clk)) {
return dev_err_probe(dev, PTR_ERR(qmp->pipe_clk),
@@ -2164,10 +2126,6 @@ static int qmp_usb_probe(struct platform_device *pdev)
if (!qmp->cfg)
return -EINVAL;
- ret = qmp_usb_clk_init(qmp);
- if (ret)
- return ret;
-
ret = qmp_usb_reset_init(qmp);
if (ret)
return ret;
--
2.39.2
^ permalink raw reply related [flat|nested] 19+ messages in thread* [PATCH v2 03/16] phy: qcom-qmp-usb: rework reset handling
2023-08-21 0:25 [PATCH v2 00/16] phy: qcom-qmp-usb: convert to newer style of bindings Dmitry Baryshkov
2023-08-21 0:25 ` [PATCH v2 01/16] dt-bindings: phy: migrate QMP USB PHY bindings to qcom,sc8280xp-qmp-usb3-uni-phy.yaml Dmitry Baryshkov
2023-08-21 0:25 ` [PATCH v2 02/16] phy: qcom-qmp-usb: simplify clock handling Dmitry Baryshkov
@ 2023-08-21 0:25 ` Dmitry Baryshkov
2023-08-21 0:25 ` [PATCH v2 04/16] phy: qcom-qmp-usb: make QPHY_PCS_MISC_CLAMP_ENABLE access conditional Dmitry Baryshkov
` (12 subsequent siblings)
15 siblings, 0 replies; 19+ messages in thread
From: Dmitry Baryshkov @ 2023-08-21 0:25 UTC (permalink / raw)
To: Andy Gross, Bjorn Andersson, Konrad Dybcio, Vinod Koul,
Kishon Vijay Abraham I, Rob Herring, Krzysztof Kozlowski,
Conor Dooley
Cc: Philipp Zabel, Johan Hovold, linux-arm-msm, linux-phy, devicetree
All legacy bindings of USB PHYs use "phy", "common" resets, while newer
style bindings use "phy", "phy_phy" resets. In preparation for
converting existing legacy PHY bindings to use newer scheme, drop reset
lists from configuration struture and reference reset lists directly.
Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
---
drivers/phy/qualcomm/phy-qcom-qmp-usb.c | 71 +++++++++----------------
1 file changed, 26 insertions(+), 45 deletions(-)
diff --git a/drivers/phy/qualcomm/phy-qcom-qmp-usb.c b/drivers/phy/qualcomm/phy-qcom-qmp-usb.c
index 626cf4bf396b..8f43de20fb8c 100644
--- a/drivers/phy/qualcomm/phy-qcom-qmp-usb.c
+++ b/drivers/phy/qualcomm/phy-qcom-qmp-usb.c
@@ -1172,9 +1172,6 @@ struct qmp_phy_cfg {
const struct qmp_phy_init_tbl *pcs_usb_tbl;
int pcs_usb_tbl_num;
- /* resets to be requested */
- const char * const *reset_list;
- int num_resets;
/* regulators to be requested */
const char * const *vreg_list;
int num_vregs;
@@ -1206,6 +1203,7 @@ struct qmp_usb {
struct clk *pipe_clk;
struct clk_bulk_data *clks;
int num_clks;
+ int num_resets;
struct reset_control_bulk_data *resets;
struct regulator_bulk_data *vregs;
@@ -1246,11 +1244,11 @@ static const char * const qmp_usb_phy_clk_l[] = {
};
/* list of resets */
-static const char * const msm8996_usb3phy_reset_l[] = {
+static const char * const usb3phy_legacy_reset_l[] = {
"phy", "common",
};
-static const char * const qcm2290_usb3phy_reset_l[] = {
+static const char * const usb3phy_reset_l[] = {
"phy_phy", "phy",
};
@@ -1296,8 +1294,6 @@ static const struct qmp_phy_cfg ipq8074_usb3phy_cfg = {
.rx_tbl_num = ARRAY_SIZE(ipq8074_usb3_rx_tbl),
.pcs_tbl = ipq8074_usb3_pcs_tbl,
.pcs_tbl_num = ARRAY_SIZE(ipq8074_usb3_pcs_tbl),
- .reset_list = msm8996_usb3phy_reset_l,
- .num_resets = ARRAY_SIZE(msm8996_usb3phy_reset_l),
.vreg_list = qmp_phy_vreg_l,
.num_vregs = ARRAY_SIZE(qmp_phy_vreg_l),
.regs = qmp_v3_usb3phy_regs_layout,
@@ -1316,8 +1312,6 @@ static const struct qmp_phy_cfg ipq9574_usb3phy_cfg = {
.rx_tbl_num = ARRAY_SIZE(ipq9574_usb3_rx_tbl),
.pcs_tbl = ipq9574_usb3_pcs_tbl,
.pcs_tbl_num = ARRAY_SIZE(ipq9574_usb3_pcs_tbl),
- .reset_list = qcm2290_usb3phy_reset_l,
- .num_resets = ARRAY_SIZE(qcm2290_usb3phy_reset_l),
.vreg_list = qmp_phy_vreg_l,
.num_vregs = ARRAY_SIZE(qmp_phy_vreg_l),
.regs = qmp_v3_usb3phy_regs_layout,
@@ -1334,8 +1328,6 @@ static const struct qmp_phy_cfg msm8996_usb3phy_cfg = {
.rx_tbl_num = ARRAY_SIZE(msm8996_usb3_rx_tbl),
.pcs_tbl = msm8996_usb3_pcs_tbl,
.pcs_tbl_num = ARRAY_SIZE(msm8996_usb3_pcs_tbl),
- .reset_list = msm8996_usb3phy_reset_l,
- .num_resets = ARRAY_SIZE(msm8996_usb3phy_reset_l),
.vreg_list = qmp_phy_vreg_l,
.num_vregs = ARRAY_SIZE(qmp_phy_vreg_l),
.regs = qmp_v2_usb3phy_regs_layout,
@@ -1354,8 +1346,6 @@ static const struct qmp_phy_cfg sa8775p_usb3_uniphy_cfg = {
.rx_tbl_num = ARRAY_SIZE(sc8280xp_usb3_uniphy_rx_tbl),
.pcs_tbl = sa8775p_usb3_uniphy_pcs_tbl,
.pcs_tbl_num = ARRAY_SIZE(sa8775p_usb3_uniphy_pcs_tbl),
- .reset_list = qcm2290_usb3phy_reset_l,
- .num_resets = ARRAY_SIZE(qcm2290_usb3phy_reset_l),
.vreg_list = qmp_phy_vreg_l,
.num_vregs = ARRAY_SIZE(qmp_phy_vreg_l),
.regs = qmp_v5_usb3phy_regs_layout,
@@ -1374,8 +1364,6 @@ static const struct qmp_phy_cfg sc8280xp_usb3_uniphy_cfg = {
.rx_tbl_num = ARRAY_SIZE(sc8280xp_usb3_uniphy_rx_tbl),
.pcs_tbl = sc8280xp_usb3_uniphy_pcs_tbl,
.pcs_tbl_num = ARRAY_SIZE(sc8280xp_usb3_uniphy_pcs_tbl),
- .reset_list = qcm2290_usb3phy_reset_l,
- .num_resets = ARRAY_SIZE(qcm2290_usb3phy_reset_l),
.vreg_list = qmp_phy_vreg_l,
.num_vregs = ARRAY_SIZE(qmp_phy_vreg_l),
.regs = qmp_v5_usb3phy_regs_layout,
@@ -1392,8 +1380,6 @@ static const struct qmp_phy_cfg qmp_v3_usb3_uniphy_cfg = {
.rx_tbl_num = ARRAY_SIZE(qmp_v3_usb3_uniphy_rx_tbl),
.pcs_tbl = qmp_v3_usb3_uniphy_pcs_tbl,
.pcs_tbl_num = ARRAY_SIZE(qmp_v3_usb3_uniphy_pcs_tbl),
- .reset_list = msm8996_usb3phy_reset_l,
- .num_resets = ARRAY_SIZE(msm8996_usb3phy_reset_l),
.vreg_list = qmp_phy_vreg_l,
.num_vregs = ARRAY_SIZE(qmp_phy_vreg_l),
.regs = qmp_v3_usb3phy_regs_layout,
@@ -1412,8 +1398,6 @@ static const struct qmp_phy_cfg msm8998_usb3phy_cfg = {
.rx_tbl_num = ARRAY_SIZE(msm8998_usb3_rx_tbl),
.pcs_tbl = msm8998_usb3_pcs_tbl,
.pcs_tbl_num = ARRAY_SIZE(msm8998_usb3_pcs_tbl),
- .reset_list = msm8996_usb3phy_reset_l,
- .num_resets = ARRAY_SIZE(msm8996_usb3phy_reset_l),
.vreg_list = qmp_phy_vreg_l,
.num_vregs = ARRAY_SIZE(qmp_phy_vreg_l),
.regs = qmp_v3_usb3phy_regs_layout,
@@ -1432,8 +1416,6 @@ static const struct qmp_phy_cfg sm8150_usb3_uniphy_cfg = {
.pcs_tbl_num = ARRAY_SIZE(sm8150_usb3_uniphy_pcs_tbl),
.pcs_usb_tbl = sm8150_usb3_uniphy_pcs_usb_tbl,
.pcs_usb_tbl_num = ARRAY_SIZE(sm8150_usb3_uniphy_pcs_usb_tbl),
- .reset_list = msm8996_usb3phy_reset_l,
- .num_resets = ARRAY_SIZE(msm8996_usb3phy_reset_l),
.vreg_list = qmp_phy_vreg_l,
.num_vregs = ARRAY_SIZE(qmp_phy_vreg_l),
.regs = qmp_v4_usb3phy_regs_layout,
@@ -1455,8 +1437,6 @@ static const struct qmp_phy_cfg sm8250_usb3_uniphy_cfg = {
.pcs_tbl_num = ARRAY_SIZE(sm8250_usb3_uniphy_pcs_tbl),
.pcs_usb_tbl = sm8250_usb3_uniphy_pcs_usb_tbl,
.pcs_usb_tbl_num = ARRAY_SIZE(sm8250_usb3_uniphy_pcs_usb_tbl),
- .reset_list = msm8996_usb3phy_reset_l,
- .num_resets = ARRAY_SIZE(msm8996_usb3phy_reset_l),
.vreg_list = qmp_phy_vreg_l,
.num_vregs = ARRAY_SIZE(qmp_phy_vreg_l),
.regs = qmp_v4_usb3phy_regs_layout,
@@ -1478,8 +1458,6 @@ static const struct qmp_phy_cfg sdx55_usb3_uniphy_cfg = {
.pcs_tbl_num = ARRAY_SIZE(sm8250_usb3_uniphy_pcs_tbl),
.pcs_usb_tbl = sm8250_usb3_uniphy_pcs_usb_tbl,
.pcs_usb_tbl_num = ARRAY_SIZE(sm8250_usb3_uniphy_pcs_usb_tbl),
- .reset_list = msm8996_usb3phy_reset_l,
- .num_resets = ARRAY_SIZE(msm8996_usb3phy_reset_l),
.vreg_list = qmp_phy_vreg_l,
.num_vregs = ARRAY_SIZE(qmp_phy_vreg_l),
.regs = qmp_v4_usb3phy_regs_layout,
@@ -1501,8 +1479,6 @@ static const struct qmp_phy_cfg sdx65_usb3_uniphy_cfg = {
.pcs_tbl_num = ARRAY_SIZE(sm8350_usb3_uniphy_pcs_tbl),
.pcs_usb_tbl = sm8350_usb3_uniphy_pcs_usb_tbl,
.pcs_usb_tbl_num = ARRAY_SIZE(sm8350_usb3_uniphy_pcs_usb_tbl),
- .reset_list = msm8996_usb3phy_reset_l,
- .num_resets = ARRAY_SIZE(msm8996_usb3phy_reset_l),
.vreg_list = qmp_phy_vreg_l,
.num_vregs = ARRAY_SIZE(qmp_phy_vreg_l),
.regs = qmp_v5_usb3phy_regs_layout,
@@ -1524,8 +1500,6 @@ static const struct qmp_phy_cfg sm8350_usb3_uniphy_cfg = {
.pcs_tbl_num = ARRAY_SIZE(sm8350_usb3_uniphy_pcs_tbl),
.pcs_usb_tbl = sm8350_usb3_uniphy_pcs_usb_tbl,
.pcs_usb_tbl_num = ARRAY_SIZE(sm8350_usb3_uniphy_pcs_usb_tbl),
- .reset_list = msm8996_usb3phy_reset_l,
- .num_resets = ARRAY_SIZE(msm8996_usb3phy_reset_l),
.vreg_list = qmp_phy_vreg_l,
.num_vregs = ARRAY_SIZE(qmp_phy_vreg_l),
.regs = qmp_v5_usb3phy_regs_layout,
@@ -1547,8 +1521,6 @@ static const struct qmp_phy_cfg qcm2290_usb3phy_cfg = {
.rx_tbl_num = ARRAY_SIZE(qcm2290_usb3_rx_tbl),
.pcs_tbl = qcm2290_usb3_pcs_tbl,
.pcs_tbl_num = ARRAY_SIZE(qcm2290_usb3_pcs_tbl),
- .reset_list = qcm2290_usb3phy_reset_l,
- .num_resets = ARRAY_SIZE(qcm2290_usb3phy_reset_l),
.vreg_list = qmp_phy_vreg_l,
.num_vregs = ARRAY_SIZE(qmp_phy_vreg_l),
.regs = qmp_v3_usb3phy_regs_layout,
@@ -1605,13 +1577,13 @@ static int qmp_usb_init(struct phy *phy)
return ret;
}
- ret = reset_control_bulk_assert(cfg->num_resets, qmp->resets);
+ ret = reset_control_bulk_assert(qmp->num_resets, qmp->resets);
if (ret) {
dev_err(qmp->dev, "reset assert failed\n");
goto err_disable_regulators;
}
- ret = reset_control_bulk_deassert(cfg->num_resets, qmp->resets);
+ ret = reset_control_bulk_deassert(qmp->num_resets, qmp->resets);
if (ret) {
dev_err(qmp->dev, "reset deassert failed\n");
goto err_disable_regulators;
@@ -1626,7 +1598,7 @@ static int qmp_usb_init(struct phy *phy)
return 0;
err_assert_reset:
- reset_control_bulk_assert(cfg->num_resets, qmp->resets);
+ reset_control_bulk_assert(qmp->num_resets, qmp->resets);
err_disable_regulators:
regulator_bulk_disable(cfg->num_vregs, qmp->vregs);
@@ -1638,7 +1610,7 @@ static int qmp_usb_exit(struct phy *phy)
struct qmp_usb *qmp = phy_get_drvdata(phy);
const struct qmp_phy_cfg *cfg = qmp->cfg;
- reset_control_bulk_assert(cfg->num_resets, qmp->resets);
+ reset_control_bulk_assert(qmp->num_resets, qmp->resets);
clk_bulk_disable_unprepare(qmp->num_clks, qmp->clks);
@@ -1880,22 +1852,25 @@ static int qmp_usb_vreg_init(struct qmp_usb *qmp)
return devm_regulator_bulk_get(dev, num, qmp->vregs);
}
-static int qmp_usb_reset_init(struct qmp_usb *qmp)
+static int qmp_usb_reset_init(struct qmp_usb *qmp,
+ const char *const *reset_list,
+ int num_resets)
{
- const struct qmp_phy_cfg *cfg = qmp->cfg;
struct device *dev = qmp->dev;
int i;
int ret;
- qmp->resets = devm_kcalloc(dev, cfg->num_resets,
+ qmp->resets = devm_kcalloc(dev, num_resets,
sizeof(*qmp->resets), GFP_KERNEL);
if (!qmp->resets)
return -ENOMEM;
- for (i = 0; i < cfg->num_resets; i++)
- qmp->resets[i].id = cfg->reset_list[i];
+ for (i = 0; i < num_resets; i++)
+ qmp->resets[i].id = reset_list[i];
+
+ qmp->num_resets = num_resets;
- ret = devm_reset_control_bulk_get_exclusive(dev, cfg->num_resets, qmp->resets);
+ ret = devm_reset_control_bulk_get_exclusive(dev, num_resets, qmp->resets);
if (ret)
return dev_err_probe(dev, ret, "failed to get resets\n");
@@ -2064,6 +2039,11 @@ static int qmp_usb_parse_dt_legacy(struct qmp_usb *qmp, struct device_node *np)
qmp->num_clks = ret;
+ ret = qmp_usb_reset_init(qmp, usb3phy_legacy_reset_l,
+ ARRAY_SIZE(usb3phy_legacy_reset_l));
+ if (ret)
+ return ret;
+
return 0;
}
@@ -2105,6 +2085,11 @@ static int qmp_usb_parse_dt(struct qmp_usb *qmp)
"failed to get pipe clock\n");
}
+ ret = qmp_usb_reset_init(qmp, usb3phy_reset_l,
+ ARRAY_SIZE(usb3phy_reset_l));
+ if (ret)
+ return ret;
+
return 0;
}
@@ -2126,10 +2111,6 @@ static int qmp_usb_probe(struct platform_device *pdev)
if (!qmp->cfg)
return -EINVAL;
- ret = qmp_usb_reset_init(qmp);
- if (ret)
- return ret;
-
ret = qmp_usb_vreg_init(qmp);
if (ret)
return ret;
--
2.39.2
^ permalink raw reply related [flat|nested] 19+ messages in thread* [PATCH v2 04/16] phy: qcom-qmp-usb: make QPHY_PCS_MISC_CLAMP_ENABLE access conditional
2023-08-21 0:25 [PATCH v2 00/16] phy: qcom-qmp-usb: convert to newer style of bindings Dmitry Baryshkov
` (2 preceding siblings ...)
2023-08-21 0:25 ` [PATCH v2 03/16] phy: qcom-qmp-usb: rework reset handling Dmitry Baryshkov
@ 2023-08-21 0:25 ` Dmitry Baryshkov
2023-08-21 0:25 ` [PATCH v2 05/16] phy: qcom-qmp: move PCS MISC V4 registers to separate header Dmitry Baryshkov
` (11 subsequent siblings)
15 siblings, 0 replies; 19+ messages in thread
From: Dmitry Baryshkov @ 2023-08-21 0:25 UTC (permalink / raw)
To: Andy Gross, Bjorn Andersson, Konrad Dybcio, Vinod Koul,
Kishon Vijay Abraham I, Rob Herring, Krzysztof Kozlowski,
Conor Dooley
Cc: Philipp Zabel, Johan Hovold, linux-arm-msm, linux-phy, devicetree
The register QPHY_V[34]_PCS_MISC_CLAMP_ENABLE is present only on some
SoC families. Other platforms (qcm2290) can have PCS_MISC region, but do
not have this register. Add it to the register layout table and check
that it is defined before toggling CLAMP settings.
Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
---
drivers/phy/qualcomm/phy-qcom-qmp-usb.c | 22 +++++++++++++++++-----
1 file changed, 17 insertions(+), 5 deletions(-)
diff --git a/drivers/phy/qualcomm/phy-qcom-qmp-usb.c b/drivers/phy/qualcomm/phy-qcom-qmp-usb.c
index 8f43de20fb8c..411cf0ae148d 100644
--- a/drivers/phy/qualcomm/phy-qcom-qmp-usb.c
+++ b/drivers/phy/qualcomm/phy-qcom-qmp-usb.c
@@ -94,6 +94,7 @@ enum qphy_reg_layout {
QPHY_PCS_AUTONOMOUS_MODE_CTRL,
QPHY_PCS_LFPS_RXTERM_IRQ_CLEAR,
QPHY_PCS_POWER_DOWN_CONTROL,
+ QPHY_PCS_MISC_CLAMP_ENABLE,
/* Keep last to ensure regs_layout arrays are properly initialized */
QPHY_LAYOUT_SIZE
};
@@ -114,6 +115,16 @@ static const unsigned int qmp_v3_usb3phy_regs_layout[QPHY_LAYOUT_SIZE] = {
[QPHY_PCS_AUTONOMOUS_MODE_CTRL] = QPHY_V3_PCS_AUTONOMOUS_MODE_CTRL,
[QPHY_PCS_LFPS_RXTERM_IRQ_CLEAR] = QPHY_V3_PCS_LFPS_RXTERM_IRQ_CLEAR,
[QPHY_PCS_POWER_DOWN_CONTROL] = QPHY_V3_PCS_POWER_DOWN_CONTROL,
+ [QPHY_PCS_MISC_CLAMP_ENABLE] = QPHY_V3_PCS_MISC_CLAMP_ENABLE,
+};
+
+static const unsigned int qmp_v3_usb3phy_regs_layout_qcm2290[QPHY_LAYOUT_SIZE] = {
+ [QPHY_SW_RESET] = QPHY_V3_PCS_SW_RESET,
+ [QPHY_START_CTRL] = QPHY_V3_PCS_START_CONTROL,
+ [QPHY_PCS_STATUS] = QPHY_V3_PCS_PCS_STATUS,
+ [QPHY_PCS_AUTONOMOUS_MODE_CTRL] = QPHY_V3_PCS_AUTONOMOUS_MODE_CTRL,
+ [QPHY_PCS_LFPS_RXTERM_IRQ_CLEAR] = QPHY_V3_PCS_LFPS_RXTERM_IRQ_CLEAR,
+ [QPHY_PCS_POWER_DOWN_CONTROL] = QPHY_V3_PCS_POWER_DOWN_CONTROL,
};
static const unsigned int qmp_v4_usb3phy_regs_layout[QPHY_LAYOUT_SIZE] = {
@@ -125,6 +136,7 @@ static const unsigned int qmp_v4_usb3phy_regs_layout[QPHY_LAYOUT_SIZE] = {
/* In PCS_USB */
[QPHY_PCS_AUTONOMOUS_MODE_CTRL] = QPHY_V4_PCS_USB3_AUTONOMOUS_MODE_CTRL,
[QPHY_PCS_LFPS_RXTERM_IRQ_CLEAR] = QPHY_V4_PCS_USB3_LFPS_RXTERM_IRQ_CLEAR,
+ [QPHY_PCS_MISC_CLAMP_ENABLE] = QPHY_V4_PCS_MISC_CLAMP_ENABLE,
};
static const unsigned int qmp_v5_usb3phy_regs_layout[QPHY_LAYOUT_SIZE] = {
@@ -1523,7 +1535,7 @@ static const struct qmp_phy_cfg qcm2290_usb3phy_cfg = {
.pcs_tbl_num = ARRAY_SIZE(qcm2290_usb3_pcs_tbl),
.vreg_list = qmp_phy_vreg_l,
.num_vregs = ARRAY_SIZE(qmp_phy_vreg_l),
- .regs = qmp_v3_usb3phy_regs_layout,
+ .regs = qmp_v3_usb3phy_regs_layout_qcm2290,
};
static void qmp_usb_configure_lane(void __iomem *base,
@@ -1761,8 +1773,8 @@ static void qmp_usb_enable_autonomous_mode(struct qmp_usb *qmp)
qphy_setbits(pcs_usb, cfg->regs[QPHY_PCS_AUTONOMOUS_MODE_CTRL], intr_mask);
/* Enable i/o clamp_n for autonomous mode */
- if (pcs_misc)
- qphy_clrbits(pcs_misc, QPHY_V3_PCS_MISC_CLAMP_ENABLE, CLAMP_EN);
+ if (pcs_misc && cfg->regs[QPHY_PCS_MISC_CLAMP_ENABLE])
+ qphy_clrbits(pcs_misc, cfg->regs[QPHY_PCS_MISC_CLAMP_ENABLE], CLAMP_EN);
}
static void qmp_usb_disable_autonomous_mode(struct qmp_usb *qmp)
@@ -1772,8 +1784,8 @@ static void qmp_usb_disable_autonomous_mode(struct qmp_usb *qmp)
void __iomem *pcs_misc = qmp->pcs_misc;
/* Disable i/o clamp_n on resume for normal mode */
- if (pcs_misc)
- qphy_setbits(pcs_misc, QPHY_V3_PCS_MISC_CLAMP_ENABLE, CLAMP_EN);
+ if (pcs_misc && cfg->regs[QPHY_PCS_MISC_CLAMP_ENABLE])
+ qphy_setbits(pcs_misc, cfg->regs[QPHY_PCS_MISC_CLAMP_ENABLE], CLAMP_EN);
qphy_clrbits(pcs_usb, cfg->regs[QPHY_PCS_AUTONOMOUS_MODE_CTRL],
ARCVR_DTCT_EN | ARCVR_DTCT_EVENT_SEL | ALFPS_DTCT_EN);
--
2.39.2
^ permalink raw reply related [flat|nested] 19+ messages in thread* [PATCH v2 05/16] phy: qcom-qmp: move PCS MISC V4 registers to separate header
2023-08-21 0:25 [PATCH v2 00/16] phy: qcom-qmp-usb: convert to newer style of bindings Dmitry Baryshkov
` (3 preceding siblings ...)
2023-08-21 0:25 ` [PATCH v2 04/16] phy: qcom-qmp-usb: make QPHY_PCS_MISC_CLAMP_ENABLE access conditional Dmitry Baryshkov
@ 2023-08-21 0:25 ` Dmitry Baryshkov
2023-08-21 0:25 ` [PATCH v2 06/16] phy: qcom-qmp-usb: populate offsets configuration Dmitry Baryshkov
` (10 subsequent siblings)
15 siblings, 0 replies; 19+ messages in thread
From: Dmitry Baryshkov @ 2023-08-21 0:25 UTC (permalink / raw)
To: Andy Gross, Bjorn Andersson, Konrad Dybcio, Vinod Koul,
Kishon Vijay Abraham I, Rob Herring, Krzysztof Kozlowski,
Conor Dooley
Cc: Philipp Zabel, Johan Hovold, linux-arm-msm, linux-phy, devicetree
Move PCS MISC V4 registers to the separate header.
Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
---
drivers/phy/qualcomm/phy-qcom-qmp-pcs-misc-v4.h | 17 +++++++++++++++++
drivers/phy/qualcomm/phy-qcom-qmp-usb.c | 1 +
drivers/phy/qualcomm/phy-qcom-qmp.h | 8 --------
3 files changed, 18 insertions(+), 8 deletions(-)
create mode 100644 drivers/phy/qualcomm/phy-qcom-qmp-pcs-misc-v4.h
diff --git a/drivers/phy/qualcomm/phy-qcom-qmp-pcs-misc-v4.h b/drivers/phy/qualcomm/phy-qcom-qmp-pcs-misc-v4.h
new file mode 100644
index 000000000000..e256a089f228
--- /dev/null
+++ b/drivers/phy/qualcomm/phy-qcom-qmp-pcs-misc-v4.h
@@ -0,0 +1,17 @@
+/* SPDX-License-Identifier: GPL-2.0 */
+/*
+ * Copyright (c) 2017, The Linux Foundation. All rights reserved.
+ */
+
+#ifndef QCOM_PHY_QMP_PCS_MISC_V4_H_
+#define QCOM_PHY_QMP_PCS_MISC_V4_H_
+
+/* Only for QMP V4 PHY - PCS_MISC registers */
+#define QPHY_V4_PCS_MISC_TYPEC_CTRL 0x00
+#define QPHY_V4_PCS_MISC_TYPEC_PWRDN_CTRL 0x04
+#define QPHY_V4_PCS_MISC_PCS_MISC_CONFIG1 0x08
+#define QPHY_V4_PCS_MISC_CLAMP_ENABLE 0x0c
+#define QPHY_V4_PCS_MISC_TYPEC_STATUS 0x10
+#define QPHY_V4_PCS_MISC_PLACEHOLDER_STATUS 0x14
+
+#endif
diff --git a/drivers/phy/qualcomm/phy-qcom-qmp-usb.c b/drivers/phy/qualcomm/phy-qcom-qmp-usb.c
index 411cf0ae148d..42a1a3f00759 100644
--- a/drivers/phy/qualcomm/phy-qcom-qmp-usb.c
+++ b/drivers/phy/qualcomm/phy-qcom-qmp-usb.c
@@ -21,6 +21,7 @@
#include "phy-qcom-qmp.h"
#include "phy-qcom-qmp-pcs-misc-v3.h"
+#include "phy-qcom-qmp-pcs-misc-v4.h"
#include "phy-qcom-qmp-pcs-usb-v4.h"
#include "phy-qcom-qmp-pcs-usb-v5.h"
diff --git a/drivers/phy/qualcomm/phy-qcom-qmp.h b/drivers/phy/qualcomm/phy-qcom-qmp.h
index 32d897684755..71f063f4a56e 100644
--- a/drivers/phy/qualcomm/phy-qcom-qmp.h
+++ b/drivers/phy/qualcomm/phy-qcom-qmp.h
@@ -126,14 +126,6 @@
#define QSERDES_V4_DP_PHY_AUX_INTERRUPT_STATUS 0x0d8
#define QSERDES_V4_DP_PHY_STATUS 0x0dc
-/* Only for QMP V4 PHY - PCS_MISC registers */
-#define QPHY_V4_PCS_MISC_TYPEC_CTRL 0x00
-#define QPHY_V4_PCS_MISC_TYPEC_PWRDN_CTRL 0x04
-#define QPHY_V4_PCS_MISC_PCS_MISC_CONFIG1 0x08
-#define QPHY_V4_PCS_MISC_CLAMP_ENABLE 0x0c
-#define QPHY_V4_PCS_MISC_TYPEC_STATUS 0x10
-#define QPHY_V4_PCS_MISC_PLACEHOLDER_STATUS 0x14
-
#define QSERDES_V5_DP_PHY_STATUS 0x0dc
/* Only for QMP V6 PHY - DP PHY registers */
--
2.39.2
^ permalink raw reply related [flat|nested] 19+ messages in thread* [PATCH v2 06/16] phy: qcom-qmp-usb: populate offsets configuration
2023-08-21 0:25 [PATCH v2 00/16] phy: qcom-qmp-usb: convert to newer style of bindings Dmitry Baryshkov
` (4 preceding siblings ...)
2023-08-21 0:25 ` [PATCH v2 05/16] phy: qcom-qmp: move PCS MISC V4 registers to separate header Dmitry Baryshkov
@ 2023-08-21 0:25 ` Dmitry Baryshkov
2023-08-21 0:25 ` [PATCH v2 07/16] arm64: dts: qcom: ipq6018: switch USB QMP PHY to new style of bindings Dmitry Baryshkov
` (9 subsequent siblings)
15 siblings, 0 replies; 19+ messages in thread
From: Dmitry Baryshkov @ 2023-08-21 0:25 UTC (permalink / raw)
To: Andy Gross, Bjorn Andersson, Konrad Dybcio, Vinod Koul,
Kishon Vijay Abraham I, Rob Herring, Krzysztof Kozlowski,
Conor Dooley
Cc: Philipp Zabel, Johan Hovold, linux-arm-msm, linux-phy, devicetree
Populate offsets configuration for the rest of USB PHYs to make it
possible to switch them to the new (single-node) bindings style.
Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
---
drivers/phy/qualcomm/phy-qcom-qmp-usb.c | 41 +++++++++++++++++++++++--
1 file changed, 38 insertions(+), 3 deletions(-)
diff --git a/drivers/phy/qualcomm/phy-qcom-qmp-usb.c b/drivers/phy/qualcomm/phy-qcom-qmp-usb.c
index 42a1a3f00759..2a094f2345f0 100644
--- a/drivers/phy/qualcomm/phy-qcom-qmp-usb.c
+++ b/drivers/phy/qualcomm/phy-qcom-qmp-usb.c
@@ -1280,6 +1280,13 @@ static const struct qmp_usb_offsets qmp_usb_offsets_ipq9574 = {
static const struct qmp_usb_offsets qmp_usb_offsets_v3 = {
.serdes = 0,
+ .pcs = 0x600,
+ .tx = 0x200,
+ .rx = 0x400,
+};
+
+static const struct qmp_usb_offsets qmp_usb_offsets_v3_qcm2290 = {
+ .serdes = 0x0,
.pcs = 0xc00,
.pcs_misc = 0xa00,
.tx = 0x200,
@@ -1288,6 +1295,14 @@ static const struct qmp_usb_offsets qmp_usb_offsets_v3 = {
.rx2 = 0x800,
};
+static const struct qmp_usb_offsets qmp_usb_offsets_v4 = {
+ .serdes = 0,
+ .pcs = 0x0800,
+ .pcs_usb = 0x0e00,
+ .tx = 0x0200,
+ .rx = 0x0400,
+};
+
static const struct qmp_usb_offsets qmp_usb_offsets_v5 = {
.serdes = 0,
.pcs = 0x0200,
@@ -1299,6 +1314,8 @@ static const struct qmp_usb_offsets qmp_usb_offsets_v5 = {
static const struct qmp_phy_cfg ipq8074_usb3phy_cfg = {
.lanes = 1,
+ .offsets = &qmp_usb_offsets_v3,
+
.serdes_tbl = ipq8074_usb3_serdes_tbl,
.serdes_tbl_num = ARRAY_SIZE(ipq8074_usb3_serdes_tbl),
.tx_tbl = msm8996_usb3_tx_tbl,
@@ -1333,6 +1350,8 @@ static const struct qmp_phy_cfg ipq9574_usb3phy_cfg = {
static const struct qmp_phy_cfg msm8996_usb3phy_cfg = {
.lanes = 1,
+ .offsets = &qmp_usb_offsets_v3,
+
.serdes_tbl = msm8996_usb3_serdes_tbl,
.serdes_tbl_num = ARRAY_SIZE(msm8996_usb3_serdes_tbl),
.tx_tbl = msm8996_usb3_tx_tbl,
@@ -1385,6 +1404,8 @@ static const struct qmp_phy_cfg sc8280xp_usb3_uniphy_cfg = {
static const struct qmp_phy_cfg qmp_v3_usb3_uniphy_cfg = {
.lanes = 1,
+ .offsets = &qmp_usb_offsets_v3,
+
.serdes_tbl = qmp_v3_usb3_uniphy_serdes_tbl,
.serdes_tbl_num = ARRAY_SIZE(qmp_v3_usb3_uniphy_serdes_tbl),
.tx_tbl = qmp_v3_usb3_uniphy_tx_tbl,
@@ -1403,6 +1424,8 @@ static const struct qmp_phy_cfg qmp_v3_usb3_uniphy_cfg = {
static const struct qmp_phy_cfg msm8998_usb3phy_cfg = {
.lanes = 2,
+ .offsets = &qmp_usb_offsets_v3_qcm2290,
+
.serdes_tbl = msm8998_usb3_serdes_tbl,
.serdes_tbl_num = ARRAY_SIZE(msm8998_usb3_serdes_tbl),
.tx_tbl = msm8998_usb3_tx_tbl,
@@ -1419,6 +1442,8 @@ static const struct qmp_phy_cfg msm8998_usb3phy_cfg = {
static const struct qmp_phy_cfg sm8150_usb3_uniphy_cfg = {
.lanes = 1,
+ .offsets = &qmp_usb_offsets_v4,
+
.serdes_tbl = sm8150_usb3_uniphy_serdes_tbl,
.serdes_tbl_num = ARRAY_SIZE(sm8150_usb3_uniphy_serdes_tbl),
.tx_tbl = sm8150_usb3_uniphy_tx_tbl,
@@ -1440,6 +1465,8 @@ static const struct qmp_phy_cfg sm8150_usb3_uniphy_cfg = {
static const struct qmp_phy_cfg sm8250_usb3_uniphy_cfg = {
.lanes = 1,
+ .offsets = &qmp_usb_offsets_v4,
+
.serdes_tbl = sm8150_usb3_uniphy_serdes_tbl,
.serdes_tbl_num = ARRAY_SIZE(sm8150_usb3_uniphy_serdes_tbl),
.tx_tbl = sm8250_usb3_uniphy_tx_tbl,
@@ -1461,6 +1488,8 @@ static const struct qmp_phy_cfg sm8250_usb3_uniphy_cfg = {
static const struct qmp_phy_cfg sdx55_usb3_uniphy_cfg = {
.lanes = 1,
+ .offsets = &qmp_usb_offsets_v4,
+
.serdes_tbl = sm8150_usb3_uniphy_serdes_tbl,
.serdes_tbl_num = ARRAY_SIZE(sm8150_usb3_uniphy_serdes_tbl),
.tx_tbl = sdx55_usb3_uniphy_tx_tbl,
@@ -1482,6 +1511,8 @@ static const struct qmp_phy_cfg sdx55_usb3_uniphy_cfg = {
static const struct qmp_phy_cfg sdx65_usb3_uniphy_cfg = {
.lanes = 1,
+ .offsets = &qmp_usb_offsets_v5,
+
.serdes_tbl = sm8150_usb3_uniphy_serdes_tbl,
.serdes_tbl_num = ARRAY_SIZE(sm8150_usb3_uniphy_serdes_tbl),
.tx_tbl = sdx65_usb3_uniphy_tx_tbl,
@@ -1503,6 +1534,8 @@ static const struct qmp_phy_cfg sdx65_usb3_uniphy_cfg = {
static const struct qmp_phy_cfg sm8350_usb3_uniphy_cfg = {
.lanes = 1,
+ .offsets = &qmp_usb_offsets_v5,
+
.serdes_tbl = sm8150_usb3_uniphy_serdes_tbl,
.serdes_tbl_num = ARRAY_SIZE(sm8150_usb3_uniphy_serdes_tbl),
.tx_tbl = sm8350_usb3_uniphy_tx_tbl,
@@ -1524,7 +1557,7 @@ static const struct qmp_phy_cfg sm8350_usb3_uniphy_cfg = {
static const struct qmp_phy_cfg qcm2290_usb3phy_cfg = {
.lanes = 2,
- .offsets = &qmp_usb_offsets_v3,
+ .offsets = &qmp_usb_offsets_v3_qcm2290,
.serdes_tbl = qcm2290_usb3_serdes_tbl,
.serdes_tbl_num = ARRAY_SIZE(qcm2290_usb3_serdes_tbl),
@@ -2078,8 +2111,10 @@ static int qmp_usb_parse_dt(struct qmp_usb *qmp)
qmp->serdes = base + offs->serdes;
qmp->pcs = base + offs->pcs;
- qmp->pcs_misc = base + offs->pcs_misc;
- qmp->pcs_usb = base + offs->pcs_usb;
+ if (offs->pcs_usb)
+ qmp->pcs_usb = base + offs->pcs_usb;
+ if (offs->pcs_misc)
+ qmp->pcs_misc = base + offs->pcs_misc;
qmp->tx = base + offs->tx;
qmp->rx = base + offs->rx;
--
2.39.2
^ permalink raw reply related [flat|nested] 19+ messages in thread* [PATCH v2 07/16] arm64: dts: qcom: ipq6018: switch USB QMP PHY to new style of bindings
2023-08-21 0:25 [PATCH v2 00/16] phy: qcom-qmp-usb: convert to newer style of bindings Dmitry Baryshkov
` (5 preceding siblings ...)
2023-08-21 0:25 ` [PATCH v2 06/16] phy: qcom-qmp-usb: populate offsets configuration Dmitry Baryshkov
@ 2023-08-21 0:25 ` Dmitry Baryshkov
2023-08-21 0:25 ` [PATCH v2 08/16] arm64: dts: qcom: ipq8074: " Dmitry Baryshkov
` (8 subsequent siblings)
15 siblings, 0 replies; 19+ messages in thread
From: Dmitry Baryshkov @ 2023-08-21 0:25 UTC (permalink / raw)
To: Andy Gross, Bjorn Andersson, Konrad Dybcio, Vinod Koul,
Kishon Vijay Abraham I, Rob Herring, Krzysztof Kozlowski,
Conor Dooley
Cc: Philipp Zabel, Johan Hovold, linux-arm-msm, linux-phy, devicetree
Change the USB QMP PHY to use newer style of QMP PHY bindings (single
resource region, no per-PHY subnodes).
Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
---
arch/arm64/boot/dts/qcom/ipq6018.dtsi | 35 ++++++++++++---------------
1 file changed, 15 insertions(+), 20 deletions(-)
diff --git a/arch/arm64/boot/dts/qcom/ipq6018.dtsi b/arch/arm64/boot/dts/qcom/ipq6018.dtsi
index 3c8a2f4e26a3..f0458de265ad 100644
--- a/arch/arm64/boot/dts/qcom/ipq6018.dtsi
+++ b/arch/arm64/boot/dts/qcom/ipq6018.dtsi
@@ -236,31 +236,26 @@ qusb_phy_1: qusb@59000 {
ssphy_0: ssphy@78000 {
compatible = "qcom,ipq6018-qmp-usb3-phy";
- reg = <0x0 0x00078000 0x0 0x1c4>;
- #address-cells = <2>;
- #size-cells = <2>;
- ranges;
+ reg = <0x0 0x00078000 0x0 0x1000>;
clocks = <&gcc GCC_USB0_AUX_CLK>,
- <&gcc GCC_USB0_PHY_CFG_AHB_CLK>, <&xo>;
- clock-names = "aux", "cfg_ahb", "ref";
+ <&xo>,
+ <&gcc GCC_USB0_PHY_CFG_AHB_CLK>,
+ <&gcc GCC_USB0_PIPE_CLK>;
+ clock-names = "aux",
+ "ref",
+ "cfg_ahb",
+ "pipe";
+ clock-output-names = "gcc_usb0_pipe_clk_src";
+ #clock-cells = <0>;
+ #phy-cells = <0>;
resets = <&gcc GCC_USB0_PHY_BCR>,
<&gcc GCC_USB3PHY_0_PHY_BCR>;
- reset-names = "phy","common";
- status = "disabled";
+ reset-names = "phy",
+ "phy_phy";
- usb0_ssphy: phy@78200 {
- reg = <0x0 0x00078200 0x0 0x130>, /* Tx */
- <0x0 0x00078400 0x0 0x200>, /* Rx */
- <0x0 0x00078800 0x0 0x1f8>, /* PCS */
- <0x0 0x00078600 0x0 0x044>; /* PCS misc */
- #phy-cells = <0>;
- #clock-cells = <0>;
- clocks = <&gcc GCC_USB0_PIPE_CLK>;
- clock-names = "pipe0";
- clock-output-names = "gcc_usb0_pipe_clk_src";
- };
+ status = "disabled";
};
qusb_phy_0: qusb@79000 {
@@ -566,7 +561,7 @@ dwc_0: usb@8a00000 {
compatible = "snps,dwc3";
reg = <0x0 0x08a00000 0x0 0xcd00>;
interrupts = <GIC_SPI 140 IRQ_TYPE_LEVEL_HIGH>;
- phys = <&qusb_phy_0>, <&usb0_ssphy>;
+ phys = <&qusb_phy_0>, <&ssphy_0>;
phy-names = "usb2-phy", "usb3-phy";
clocks = <&xo>;
clock-names = "ref";
--
2.39.2
^ permalink raw reply related [flat|nested] 19+ messages in thread* [PATCH v2 08/16] arm64: dts: qcom: ipq8074: switch USB QMP PHY to new style of bindings
2023-08-21 0:25 [PATCH v2 00/16] phy: qcom-qmp-usb: convert to newer style of bindings Dmitry Baryshkov
` (6 preceding siblings ...)
2023-08-21 0:25 ` [PATCH v2 07/16] arm64: dts: qcom: ipq6018: switch USB QMP PHY to new style of bindings Dmitry Baryshkov
@ 2023-08-21 0:25 ` Dmitry Baryshkov
2023-08-21 0:25 ` [PATCH v2 09/16] arm64: dts: qcom: msm8996: " Dmitry Baryshkov
` (7 subsequent siblings)
15 siblings, 0 replies; 19+ messages in thread
From: Dmitry Baryshkov @ 2023-08-21 0:25 UTC (permalink / raw)
To: Andy Gross, Bjorn Andersson, Konrad Dybcio, Vinod Koul,
Kishon Vijay Abraham I, Rob Herring, Krzysztof Kozlowski,
Conor Dooley
Cc: Philipp Zabel, Johan Hovold, linux-arm-msm, linux-phy, devicetree
Change the USB QMP PHY to use newer style of QMP PHY bindings (single
resource region, no per-PHY subnodes).
Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
---
arch/arm64/boot/dts/qcom/ipq8074.dtsi | 76 +++++++++++----------------
1 file changed, 32 insertions(+), 44 deletions(-)
diff --git a/arch/arm64/boot/dts/qcom/ipq8074.dtsi b/arch/arm64/boot/dts/qcom/ipq8074.dtsi
index 3350804a2f62..e113f5eec8e6 100644
--- a/arch/arm64/boot/dts/qcom/ipq8074.dtsi
+++ b/arch/arm64/boot/dts/qcom/ipq8074.dtsi
@@ -125,32 +125,26 @@ soc: soc@0 {
ssphy_1: phy@58000 {
compatible = "qcom,ipq8074-qmp-usb3-phy";
- reg = <0x00058000 0x1c4>;
- #address-cells = <1>;
- #size-cells = <1>;
- ranges;
+ reg = <0x00058000 0x1000>;
clocks = <&gcc GCC_USB1_AUX_CLK>,
- <&gcc GCC_USB1_PHY_CFG_AHB_CLK>,
- <&xo>;
- clock-names = "aux", "cfg_ahb", "ref";
+ <&xo>,
+ <&gcc GCC_USB1_PHY_CFG_AHB_CLK>,
+ <&gcc GCC_USB1_PIPE_CLK>;
+ clock-names = "aux",
+ "ref",
+ "cfg_ahb",
+ "pipe";
+ clock-output-names = "usb3phy_1_cc_pipe_clk";
+ #clock-cells = <0>;
+ #phy-cells = <0>;
resets = <&gcc GCC_USB1_PHY_BCR>,
- <&gcc GCC_USB3PHY_1_PHY_BCR>;
- reset-names = "phy","common";
- status = "disabled";
+ <&gcc GCC_USB3PHY_1_PHY_BCR>;
+ reset-names = "phy",
+ "phy_phy";
- usb1_ssphy: phy@58200 {
- reg = <0x00058200 0x130>, /* Tx */
- <0x00058400 0x200>, /* Rx */
- <0x00058800 0x1f8>, /* PCS */
- <0x00058600 0x044>; /* PCS misc */
- #phy-cells = <0>;
- #clock-cells = <0>;
- clocks = <&gcc GCC_USB1_PIPE_CLK>;
- clock-names = "pipe0";
- clock-output-names = "usb3phy_1_cc_pipe_clk";
- };
+ status = "disabled";
};
qusb_phy_1: phy@59000 {
@@ -168,32 +162,26 @@ qusb_phy_1: phy@59000 {
ssphy_0: phy@78000 {
compatible = "qcom,ipq8074-qmp-usb3-phy";
- reg = <0x00078000 0x1c4>;
- #address-cells = <1>;
- #size-cells = <1>;
- ranges;
+ reg = <0x00078000 0x1000>;
clocks = <&gcc GCC_USB0_AUX_CLK>,
- <&gcc GCC_USB0_PHY_CFG_AHB_CLK>,
- <&xo>;
- clock-names = "aux", "cfg_ahb", "ref";
+ <&xo>,
+ <&gcc GCC_USB0_PHY_CFG_AHB_CLK>,
+ <&gcc GCC_USB0_PIPE_CLK>;
+ clock-names = "aux",
+ "ref",
+ "cfg_ahb",
+ "pipe";
+ clock-output-names = "usb3phy_0_cc_pipe_clk";
+ #clock-cells = <0>;
+ #phy-cells = <0>;
resets = <&gcc GCC_USB0_PHY_BCR>,
- <&gcc GCC_USB3PHY_0_PHY_BCR>;
- reset-names = "phy","common";
- status = "disabled";
+ <&gcc GCC_USB3PHY_0_PHY_BCR>;
+ reset-names = "phy",
+ "phy_phy";
- usb0_ssphy: phy@78200 {
- reg = <0x00078200 0x130>, /* Tx */
- <0x00078400 0x200>, /* Rx */
- <0x00078800 0x1f8>, /* PCS */
- <0x00078600 0x044>; /* PCS misc */
- #phy-cells = <0>;
- #clock-cells = <0>;
- clocks = <&gcc GCC_USB0_PIPE_CLK>;
- clock-names = "pipe0";
- clock-output-names = "usb3phy_0_cc_pipe_clk";
- };
+ status = "disabled";
};
qusb_phy_0: phy@79000 {
@@ -628,7 +616,7 @@ dwc_0: usb@8a00000 {
compatible = "snps,dwc3";
reg = <0x8a00000 0xcd00>;
interrupts = <GIC_SPI 140 IRQ_TYPE_LEVEL_HIGH>;
- phys = <&qusb_phy_0>, <&usb0_ssphy>;
+ phys = <&qusb_phy_0>, <&ssphy_0>;
phy-names = "usb2-phy", "usb3-phy";
snps,is-utmi-l1-suspend;
snps,hird-threshold = /bits/ 8 <0x0>;
@@ -670,7 +658,7 @@ dwc_1: usb@8c00000 {
compatible = "snps,dwc3";
reg = <0x8c00000 0xcd00>;
interrupts = <GIC_SPI 99 IRQ_TYPE_LEVEL_HIGH>;
- phys = <&qusb_phy_1>, <&usb1_ssphy>;
+ phys = <&qusb_phy_1>, <&ssphy_1>;
phy-names = "usb2-phy", "usb3-phy";
snps,is-utmi-l1-suspend;
snps,hird-threshold = /bits/ 8 <0x0>;
--
2.39.2
^ permalink raw reply related [flat|nested] 19+ messages in thread* [PATCH v2 09/16] arm64: dts: qcom: msm8996: switch USB QMP PHY to new style of bindings
2023-08-21 0:25 [PATCH v2 00/16] phy: qcom-qmp-usb: convert to newer style of bindings Dmitry Baryshkov
` (7 preceding siblings ...)
2023-08-21 0:25 ` [PATCH v2 08/16] arm64: dts: qcom: ipq8074: " Dmitry Baryshkov
@ 2023-08-21 0:25 ` Dmitry Baryshkov
2023-08-21 0:25 ` [PATCH v2 10/16] arm64: dts: qcom: msm8998: " Dmitry Baryshkov
` (6 subsequent siblings)
15 siblings, 0 replies; 19+ messages in thread
From: Dmitry Baryshkov @ 2023-08-21 0:25 UTC (permalink / raw)
To: Andy Gross, Bjorn Andersson, Konrad Dybcio, Vinod Koul,
Kishon Vijay Abraham I, Rob Herring, Krzysztof Kozlowski,
Conor Dooley
Cc: Philipp Zabel, Johan Hovold, linux-arm-msm, linux-phy, devicetree
Change the USB QMP PHY to use newer style of QMP PHY bindings (single
resource region, no per-PHY subnodes).
Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
---
arch/arm64/boot/dts/qcom/msm8996.dtsi | 40 ++++++++++++---------------
1 file changed, 17 insertions(+), 23 deletions(-)
diff --git a/arch/arm64/boot/dts/qcom/msm8996.dtsi b/arch/arm64/boot/dts/qcom/msm8996.dtsi
index 44298912b3a3..cdf00d22c3bb 100644
--- a/arch/arm64/boot/dts/qcom/msm8996.dtsi
+++ b/arch/arm64/boot/dts/qcom/msm8996.dtsi
@@ -778,7 +778,7 @@ gcc: clock-controller@300000 {
<&pciephy_0>,
<&pciephy_1>,
<&pciephy_2>,
- <&ssusb_phy_0>,
+ <&usb3phy>,
<&ufsphy 0>,
<&ufsphy 1>,
<&ufsphy 2>;
@@ -3048,7 +3048,7 @@ usb3_dwc3: usb@6a00000 {
compatible = "snps,dwc3";
reg = <0x06a00000 0xcc00>;
interrupts = <GIC_SPI 131 IRQ_TYPE_LEVEL_HIGH>;
- phys = <&hsusb_phy1>, <&ssusb_phy_0>;
+ phys = <&hsusb_phy1>, <&usb3phy>;
phy-names = "usb2-phy", "usb3-phy";
snps,hird-threshold = /bits/ 8 <0>;
snps,dis_u2_susphy_quirk;
@@ -3060,32 +3060,26 @@ usb3_dwc3: usb@6a00000 {
usb3phy: phy@7410000 {
compatible = "qcom,msm8996-qmp-usb3-phy";
- reg = <0x07410000 0x1c4>;
- #address-cells = <1>;
- #size-cells = <1>;
- ranges;
+ reg = <0x07410000 0x1000>;
clocks = <&gcc GCC_USB3_PHY_AUX_CLK>,
- <&gcc GCC_USB_PHY_CFG_AHB2PHY_CLK>,
- <&gcc GCC_USB3_CLKREF_CLK>;
- clock-names = "aux", "cfg_ahb", "ref";
+ <&gcc GCC_USB3_CLKREF_CLK>,
+ <&gcc GCC_USB_PHY_CFG_AHB2PHY_CLK>,
+ <&gcc GCC_USB3_PHY_PIPE_CLK>;
+ clock-names = "aux",
+ "ref",
+ "cfg_ahb",
+ "pipe";
+ clock-output-names = "usb3_phy_pipe_clk_src";
+ #clock-cells = <0>;
+ #phy-cells = <0>;
resets = <&gcc GCC_USB3_PHY_BCR>,
- <&gcc GCC_USB3PHY_PHY_BCR>;
- reset-names = "phy", "common";
- status = "disabled";
+ <&gcc GCC_USB3PHY_PHY_BCR>;
+ reset-names = "phy",
+ "phy_phy";
- ssusb_phy_0: phy@7410200 {
- reg = <0x07410200 0x200>,
- <0x07410400 0x130>,
- <0x07410600 0x1a8>;
- #phy-cells = <0>;
-
- #clock-cells = <0>;
- clock-output-names = "usb3_phy_pipe_clk_src";
- clocks = <&gcc GCC_USB3_PHY_PIPE_CLK>;
- clock-names = "pipe0";
- };
+ status = "disabled";
};
hsusb_phy1: phy@7411000 {
--
2.39.2
^ permalink raw reply related [flat|nested] 19+ messages in thread* [PATCH v2 10/16] arm64: dts: qcom: msm8998: switch USB QMP PHY to new style of bindings
2023-08-21 0:25 [PATCH v2 00/16] phy: qcom-qmp-usb: convert to newer style of bindings Dmitry Baryshkov
` (8 preceding siblings ...)
2023-08-21 0:25 ` [PATCH v2 09/16] arm64: dts: qcom: msm8996: " Dmitry Baryshkov
@ 2023-08-21 0:25 ` Dmitry Baryshkov
2023-08-23 18:20 ` Dmitry Baryshkov
2023-08-21 0:25 ` [PATCH v2 11/16] arm64: dts: qcom: sdm845: " Dmitry Baryshkov
` (5 subsequent siblings)
15 siblings, 1 reply; 19+ messages in thread
From: Dmitry Baryshkov @ 2023-08-21 0:25 UTC (permalink / raw)
To: Andy Gross, Bjorn Andersson, Konrad Dybcio, Vinod Koul,
Kishon Vijay Abraham I, Rob Herring, Krzysztof Kozlowski,
Conor Dooley
Cc: Philipp Zabel, Johan Hovold, linux-arm-msm, linux-phy, devicetree
Change the USB QMP PHY to use newer style of QMP PHY bindings (single
resource region, no per-PHY subnodes).
Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
---
arch/arm64/boot/dts/qcom/msm8998.dtsi | 39 +++++++++++----------------
1 file changed, 16 insertions(+), 23 deletions(-)
diff --git a/arch/arm64/boot/dts/qcom/msm8998.dtsi b/arch/arm64/boot/dts/qcom/msm8998.dtsi
index 30d8730fa4de..46a6ef0e454b 100644
--- a/arch/arm64/boot/dts/qcom/msm8998.dtsi
+++ b/arch/arm64/boot/dts/qcom/msm8998.dtsi
@@ -979,12 +979,12 @@ pcie_phy: phy@1c06000 {
status = "disabled";
clocks = <&gcc GCC_PCIE_PHY_AUX_CLK>,
- <&gcc GCC_PCIE_0_CFG_AHB_CLK>,
<&gcc GCC_PCIE_CLKREF_CLK>,
+ <&gcc GCC_PCIE_0_CFG_AHB_CLK>,
<&gcc GCC_PCIE_0_PIPE_CLK>;
clock-names = "aux",
- "cfg_ahb",
"ref",
+ "cfg_ahb",
"pipe";
clock-output-names = "pcie_0_pipe_clk_src";
@@ -2138,7 +2138,7 @@ usb3_dwc3: usb@a800000 {
interrupts = <GIC_SPI 131 IRQ_TYPE_LEVEL_HIGH>;
snps,dis_u2_susphy_quirk;
snps,dis_enblslpm_quirk;
- phys = <&qusb2phy>, <&usb1_ssphy>;
+ phys = <&qusb2phy>, <&usb3phy>;
phy-names = "usb2-phy", "usb3-phy";
snps,has-lpm-erratum;
snps,hird-threshold = /bits/ 8 <0x10>;
@@ -2147,33 +2147,26 @@ usb3_dwc3: usb@a800000 {
usb3phy: phy@c010000 {
compatible = "qcom,msm8998-qmp-usb3-phy";
- reg = <0x0c010000 0x18c>;
- status = "disabled";
- #address-cells = <1>;
- #size-cells = <1>;
- ranges;
+ reg = <0x0c010000 0x1000>;
clocks = <&gcc GCC_USB3_PHY_AUX_CLK>,
+ <&gcc GCC_USB3_CLKREF_CLK>,
<&gcc GCC_USB_PHY_CFG_AHB2PHY_CLK>,
- <&gcc GCC_USB3_CLKREF_CLK>;
- clock-names = "aux", "cfg_ahb", "ref";
+ <&gcc GCC_USB3_PHY_PIPE_CLK>;
+ clock-names = "aux",
+ "ref",
+ "cfg_ahb",
+ "pipe";
+ clock-output-names = "usb3_phy_pipe_clk_src";
+ #clock-cells = <0>;
+ #phy-cells = <0>;
resets = <&gcc GCC_USB3_PHY_BCR>,
<&gcc GCC_USB3PHY_PHY_BCR>;
- reset-names = "phy", "common";
+ reset-names = "phy",
+ "phy_phy";
- usb1_ssphy: phy@c010200 {
- reg = <0xc010200 0x128>,
- <0xc010400 0x200>,
- <0xc010c00 0x20c>,
- <0xc010600 0x128>,
- <0xc010800 0x200>;
- #phy-cells = <0>;
- #clock-cells = <0>;
- clocks = <&gcc GCC_USB3_PHY_PIPE_CLK>;
- clock-names = "pipe0";
- clock-output-names = "usb3_phy_pipe_clk_src";
- };
+ status = "disabled";
};
qusb2phy: phy@c012000 {
--
2.39.2
^ permalink raw reply related [flat|nested] 19+ messages in thread* Re: [PATCH v2 10/16] arm64: dts: qcom: msm8998: switch USB QMP PHY to new style of bindings
2023-08-21 0:25 ` [PATCH v2 10/16] arm64: dts: qcom: msm8998: " Dmitry Baryshkov
@ 2023-08-23 18:20 ` Dmitry Baryshkov
0 siblings, 0 replies; 19+ messages in thread
From: Dmitry Baryshkov @ 2023-08-23 18:20 UTC (permalink / raw)
To: Andy Gross, Bjorn Andersson, Konrad Dybcio, Vinod Koul,
Kishon Vijay Abraham I, Rob Herring, Krzysztof Kozlowski,
Conor Dooley
Cc: Philipp Zabel, Johan Hovold, linux-arm-msm, linux-phy, devicetree
On Mon, 21 Aug 2023 at 03:25, Dmitry Baryshkov
<dmitry.baryshkov@linaro.org> wrote:
>
> Change the USB QMP PHY to use newer style of QMP PHY bindings (single
> resource region, no per-PHY subnodes).
>
> Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
> ---
> arch/arm64/boot/dts/qcom/msm8998.dtsi | 39 +++++++++++----------------
> 1 file changed, 16 insertions(+), 23 deletions(-)
>
> diff --git a/arch/arm64/boot/dts/qcom/msm8998.dtsi b/arch/arm64/boot/dts/qcom/msm8998.dtsi
> index 30d8730fa4de..46a6ef0e454b 100644
> --- a/arch/arm64/boot/dts/qcom/msm8998.dtsi
> +++ b/arch/arm64/boot/dts/qcom/msm8998.dtsi
> @@ -979,12 +979,12 @@ pcie_phy: phy@1c06000 {
> status = "disabled";
>
> clocks = <&gcc GCC_PCIE_PHY_AUX_CLK>,
> - <&gcc GCC_PCIE_0_CFG_AHB_CLK>,
> <&gcc GCC_PCIE_CLKREF_CLK>,
> + <&gcc GCC_PCIE_0_CFG_AHB_CLK>,
> <&gcc GCC_PCIE_0_PIPE_CLK>;
> clock-names = "aux",
> - "cfg_ahb",
> "ref",
> + "cfg_ahb",
> "pipe";
This chunk changes the PCIe PHY and as such doesn't belong to this patch.
>
> clock-output-names = "pcie_0_pipe_clk_src";
> @@ -2138,7 +2138,7 @@ usb3_dwc3: usb@a800000 {
> interrupts = <GIC_SPI 131 IRQ_TYPE_LEVEL_HIGH>;
> snps,dis_u2_susphy_quirk;
> snps,dis_enblslpm_quirk;
> - phys = <&qusb2phy>, <&usb1_ssphy>;
> + phys = <&qusb2phy>, <&usb3phy>;
> phy-names = "usb2-phy", "usb3-phy";
> snps,has-lpm-erratum;
> snps,hird-threshold = /bits/ 8 <0x10>;
> @@ -2147,33 +2147,26 @@ usb3_dwc3: usb@a800000 {
>
> usb3phy: phy@c010000 {
> compatible = "qcom,msm8998-qmp-usb3-phy";
> - reg = <0x0c010000 0x18c>;
> - status = "disabled";
> - #address-cells = <1>;
> - #size-cells = <1>;
> - ranges;
> + reg = <0x0c010000 0x1000>;
>
> clocks = <&gcc GCC_USB3_PHY_AUX_CLK>,
> + <&gcc GCC_USB3_CLKREF_CLK>,
> <&gcc GCC_USB_PHY_CFG_AHB2PHY_CLK>,
> - <&gcc GCC_USB3_CLKREF_CLK>;
> - clock-names = "aux", "cfg_ahb", "ref";
> + <&gcc GCC_USB3_PHY_PIPE_CLK>;
> + clock-names = "aux",
> + "ref",
> + "cfg_ahb",
> + "pipe";
> + clock-output-names = "usb3_phy_pipe_clk_src";
> + #clock-cells = <0>;
> + #phy-cells = <0>;
>
> resets = <&gcc GCC_USB3_PHY_BCR>,
> <&gcc GCC_USB3PHY_PHY_BCR>;
> - reset-names = "phy", "common";
> + reset-names = "phy",
> + "phy_phy";
>
> - usb1_ssphy: phy@c010200 {
> - reg = <0xc010200 0x128>,
> - <0xc010400 0x200>,
> - <0xc010c00 0x20c>,
> - <0xc010600 0x128>,
> - <0xc010800 0x200>;
> - #phy-cells = <0>;
> - #clock-cells = <0>;
> - clocks = <&gcc GCC_USB3_PHY_PIPE_CLK>;
> - clock-names = "pipe0";
> - clock-output-names = "usb3_phy_pipe_clk_src";
> - };
> + status = "disabled";
> };
>
> qusb2phy: phy@c012000 {
> --
> 2.39.2
>
--
With best wishes
Dmitry
^ permalink raw reply [flat|nested] 19+ messages in thread
* [PATCH v2 11/16] arm64: dts: qcom: sdm845: switch USB QMP PHY to new style of bindings
2023-08-21 0:25 [PATCH v2 00/16] phy: qcom-qmp-usb: convert to newer style of bindings Dmitry Baryshkov
` (9 preceding siblings ...)
2023-08-21 0:25 ` [PATCH v2 10/16] arm64: dts: qcom: msm8998: " Dmitry Baryshkov
@ 2023-08-21 0:25 ` Dmitry Baryshkov
2023-08-21 0:25 ` [PATCH v2 12/16] arm64: dts: qcom: sm8150: " Dmitry Baryshkov
` (4 subsequent siblings)
15 siblings, 0 replies; 19+ messages in thread
From: Dmitry Baryshkov @ 2023-08-21 0:25 UTC (permalink / raw)
To: Andy Gross, Bjorn Andersson, Konrad Dybcio, Vinod Koul,
Kishon Vijay Abraham I, Rob Herring, Krzysztof Kozlowski,
Conor Dooley
Cc: Philipp Zabel, Johan Hovold, linux-arm-msm, linux-phy, devicetree
Change the USB QMP PHY to use newer style of QMP PHY bindings (single
resource region, no per-PHY subnodes).
Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
---
arch/arm64/boot/dts/qcom/sdm845.dtsi | 39 ++++++++++++----------------
1 file changed, 17 insertions(+), 22 deletions(-)
diff --git a/arch/arm64/boot/dts/qcom/sdm845.dtsi b/arch/arm64/boot/dts/qcom/sdm845.dtsi
index ef7b6994fdab..686d0cdfac63 100644
--- a/arch/arm64/boot/dts/qcom/sdm845.dtsi
+++ b/arch/arm64/boot/dts/qcom/sdm845.dtsi
@@ -3991,33 +3991,28 @@ usb_1_qmpphy: phy@88e8000 {
usb_2_qmpphy: phy@88eb000 {
compatible = "qcom,sdm845-qmp-usb3-uni-phy";
- reg = <0 0x088eb000 0 0x18c>;
- status = "disabled";
- #address-cells = <2>;
- #size-cells = <2>;
- ranges;
+ reg = <0 0x088eb000 0 0x1000>;
clocks = <&gcc GCC_USB3_SEC_PHY_AUX_CLK>,
<&gcc GCC_USB_PHY_CFG_AHB2PHY_CLK>,
<&gcc GCC_USB3_SEC_CLKREF_CLK>,
- <&gcc GCC_USB3_SEC_PHY_COM_AUX_CLK>;
- clock-names = "aux", "cfg_ahb", "ref", "com_aux";
+ <&gcc GCC_USB3_SEC_PHY_COM_AUX_CLK>,
+ <&gcc GCC_USB3_SEC_PHY_PIPE_CLK>;
+ clock-names = "aux",
+ "cfg_ahb",
+ "ref",
+ "com_aux",
+ "pipe";
+ clock-output-names = "usb3_uni_phy_pipe_clk_src";
+ #clock-cells = <0>;
+ #phy-cells = <0>;
- resets = <&gcc GCC_USB3PHY_PHY_SEC_BCR>,
- <&gcc GCC_USB3_PHY_SEC_BCR>;
- reset-names = "phy", "common";
+ resets = <&gcc GCC_USB3_PHY_SEC_BCR>,
+ <&gcc GCC_USB3PHY_PHY_SEC_BCR>;
+ reset-names = "phy",
+ "phy_phy";
- usb_2_ssphy: phy@88eb200 {
- reg = <0 0x088eb200 0 0x128>,
- <0 0x088eb400 0 0x1fc>,
- <0 0x088eb800 0 0x218>,
- <0 0x088eb600 0 0x70>;
- #clock-cells = <0>;
- #phy-cells = <0>;
- clocks = <&gcc GCC_USB3_SEC_PHY_PIPE_CLK>;
- clock-names = "pipe0";
- clock-output-names = "usb3_uni_phy_pipe_clk_src";
- };
+ status = "disabled";
};
usb_1: usb@a6f8800 {
@@ -4117,7 +4112,7 @@ usb_2_dwc3: usb@a800000 {
iommus = <&apps_smmu 0x760 0>;
snps,dis_u2_susphy_quirk;
snps,dis_enblslpm_quirk;
- phys = <&usb_2_hsphy>, <&usb_2_ssphy>;
+ phys = <&usb_2_hsphy>, <&usb_2_qmpphy>;
phy-names = "usb2-phy", "usb3-phy";
};
};
--
2.39.2
^ permalink raw reply related [flat|nested] 19+ messages in thread* [PATCH v2 12/16] arm64: dts: qcom: sm8150: switch USB QMP PHY to new style of bindings
2023-08-21 0:25 [PATCH v2 00/16] phy: qcom-qmp-usb: convert to newer style of bindings Dmitry Baryshkov
` (10 preceding siblings ...)
2023-08-21 0:25 ` [PATCH v2 11/16] arm64: dts: qcom: sdm845: " Dmitry Baryshkov
@ 2023-08-21 0:25 ` Dmitry Baryshkov
2023-08-21 0:25 ` [PATCH v2 13/16] arm64: dts: qcom: sm8250: " Dmitry Baryshkov
` (3 subsequent siblings)
15 siblings, 0 replies; 19+ messages in thread
From: Dmitry Baryshkov @ 2023-08-21 0:25 UTC (permalink / raw)
To: Andy Gross, Bjorn Andersson, Konrad Dybcio, Vinod Koul,
Kishon Vijay Abraham I, Rob Herring, Krzysztof Kozlowski,
Conor Dooley
Cc: Philipp Zabel, Johan Hovold, linux-arm-msm, linux-phy, devicetree
Change the USB QMP PHY to use newer style of QMP PHY bindings (single
resource region, no per-PHY subnodes).
Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
---
arch/arm64/boot/dts/qcom/sm8150.dtsi | 39 ++++++++++++----------------
1 file changed, 16 insertions(+), 23 deletions(-)
diff --git a/arch/arm64/boot/dts/qcom/sm8150.dtsi b/arch/arm64/boot/dts/qcom/sm8150.dtsi
index d9f0d7410661..380712aee977 100644
--- a/arch/arm64/boot/dts/qcom/sm8150.dtsi
+++ b/arch/arm64/boot/dts/qcom/sm8150.dtsi
@@ -3442,33 +3442,26 @@ usb_1_qmpphy: phy@88e8000 {
usb_2_qmpphy: phy@88eb000 {
compatible = "qcom,sm8150-qmp-usb3-uni-phy";
- reg = <0 0x088eb000 0 0x200>;
- status = "disabled";
- #address-cells = <2>;
- #size-cells = <2>;
- ranges;
+ reg = <0 0x088eb000 0 0x1000>;
clocks = <&gcc GCC_USB3_SEC_PHY_AUX_CLK>,
- <&rpmhcc RPMH_CXO_CLK>,
<&gcc GCC_USB3_SEC_CLKREF_CLK>,
- <&gcc GCC_USB3_SEC_PHY_COM_AUX_CLK>;
- clock-names = "aux", "ref_clk_src", "ref", "com_aux";
+ <&gcc GCC_USB3_SEC_PHY_COM_AUX_CLK>,
+ <&gcc GCC_USB3_SEC_PHY_PIPE_CLK>;
+ clock-names = "aux",
+ "ref",
+ "com_aux",
+ "pipe";
+ clock-output-names = "usb3_uni_phy_pipe_clk_src";
+ #clock-cells = <0>;
+ #phy-cells = <0>;
- resets = <&gcc GCC_USB3PHY_PHY_SEC_BCR>,
- <&gcc GCC_USB3_PHY_SEC_BCR>;
- reset-names = "phy", "common";
+ resets = <&gcc GCC_USB3_PHY_SEC_BCR>,
+ <&gcc GCC_USB3PHY_PHY_SEC_BCR>;
+ reset-names = "phy",
+ "phy_phy";
- usb_2_ssphy: phy@88eb200 {
- reg = <0 0x088eb200 0 0x200>,
- <0 0x088eb400 0 0x200>,
- <0 0x088eb800 0 0x800>,
- <0 0x088eb600 0 0x200>;
- #clock-cells = <0>;
- #phy-cells = <0>;
- clocks = <&gcc GCC_USB3_SEC_PHY_PIPE_CLK>;
- clock-names = "pipe0";
- clock-output-names = "usb3_uni_phy_pipe_clk_src";
- };
+ status = "disabled";
};
sdhc_2: mmc@8804000 {
@@ -3631,7 +3624,7 @@ usb_2_dwc3: usb@a800000 {
iommus = <&apps_smmu 0x160 0>;
snps,dis_u2_susphy_quirk;
snps,dis_enblslpm_quirk;
- phys = <&usb_2_hsphy>, <&usb_2_ssphy>;
+ phys = <&usb_2_hsphy>, <&usb_2_qmpphy>;
phy-names = "usb2-phy", "usb3-phy";
};
};
--
2.39.2
^ permalink raw reply related [flat|nested] 19+ messages in thread* [PATCH v2 13/16] arm64: dts: qcom: sm8250: switch USB QMP PHY to new style of bindings
2023-08-21 0:25 [PATCH v2 00/16] phy: qcom-qmp-usb: convert to newer style of bindings Dmitry Baryshkov
` (11 preceding siblings ...)
2023-08-21 0:25 ` [PATCH v2 12/16] arm64: dts: qcom: sm8150: " Dmitry Baryshkov
@ 2023-08-21 0:25 ` Dmitry Baryshkov
2023-08-21 0:25 ` [PATCH v2 14/16] arm64: dts: qcom: sm8350: " Dmitry Baryshkov
` (2 subsequent siblings)
15 siblings, 0 replies; 19+ messages in thread
From: Dmitry Baryshkov @ 2023-08-21 0:25 UTC (permalink / raw)
To: Andy Gross, Bjorn Andersson, Konrad Dybcio, Vinod Koul,
Kishon Vijay Abraham I, Rob Herring, Krzysztof Kozlowski,
Conor Dooley
Cc: Philipp Zabel, Johan Hovold, linux-arm-msm, linux-phy, devicetree
Change the USB QMP PHY to use newer style of QMP PHY bindings (single
resource region, no per-PHY subnodes).
Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
---
arch/arm64/boot/dts/qcom/sm8250.dtsi | 38 ++++++++++++----------------
1 file changed, 16 insertions(+), 22 deletions(-)
diff --git a/arch/arm64/boot/dts/qcom/sm8250.dtsi b/arch/arm64/boot/dts/qcom/sm8250.dtsi
index abe39b0470da..974bdc1a9f34 100644
--- a/arch/arm64/boot/dts/qcom/sm8250.dtsi
+++ b/arch/arm64/boot/dts/qcom/sm8250.dtsi
@@ -3575,32 +3575,26 @@ usb_1_qmpphy: phy@88e8000 {
usb_2_qmpphy: phy@88eb000 {
compatible = "qcom,sm8250-qmp-usb3-uni-phy";
- reg = <0 0x088eb000 0 0x200>;
- status = "disabled";
- #address-cells = <2>;
- #size-cells = <2>;
- ranges;
+ reg = <0 0x088eb000 0 0x1000>;
clocks = <&gcc GCC_USB3_SEC_PHY_AUX_CLK>,
- <&rpmhcc RPMH_CXO_CLK>,
<&gcc GCC_USB3_SEC_CLKREF_EN>,
- <&gcc GCC_USB3_SEC_PHY_COM_AUX_CLK>;
- clock-names = "aux", "ref_clk_src", "ref", "com_aux";
+ <&gcc GCC_USB3_SEC_PHY_COM_AUX_CLK>,
+ <&gcc GCC_USB3_SEC_PHY_PIPE_CLK>;
+ clock-names = "aux",
+ "ref",
+ "com_aux",
+ "pipe";
+ clock-output-names = "usb3_uni_phy_pipe_clk_src";
+ #clock-cells = <0>;
+ #phy-cells = <0>;
- resets = <&gcc GCC_USB3PHY_PHY_SEC_BCR>,
- <&gcc GCC_USB3_PHY_SEC_BCR>;
- reset-names = "phy", "common";
+ resets = <&gcc GCC_USB3_PHY_SEC_BCR>,
+ <&gcc GCC_USB3PHY_PHY_SEC_BCR>;
+ reset-names = "phy",
+ "phy_phy";
- usb_2_ssphy: phy@88eb200 {
- reg = <0 0x088eb200 0 0x200>,
- <0 0x088eb400 0 0x200>,
- <0 0x088eb800 0 0x800>;
- #clock-cells = <0>;
- #phy-cells = <0>;
- clocks = <&gcc GCC_USB3_SEC_PHY_PIPE_CLK>;
- clock-names = "pipe0";
- clock-output-names = "usb3_uni_phy_pipe_clk_src";
- };
+ status = "disabled";
};
sdhc_2: mmc@8804000 {
@@ -3905,7 +3899,7 @@ usb_2_dwc3: usb@a800000 {
iommus = <&apps_smmu 0x20 0>;
snps,dis_u2_susphy_quirk;
snps,dis_enblslpm_quirk;
- phys = <&usb_2_hsphy>, <&usb_2_ssphy>;
+ phys = <&usb_2_hsphy>, <&usb_2_qmpphy>;
phy-names = "usb2-phy", "usb3-phy";
};
};
--
2.39.2
^ permalink raw reply related [flat|nested] 19+ messages in thread* [PATCH v2 14/16] arm64: dts: qcom: sm8350: switch USB QMP PHY to new style of bindings
2023-08-21 0:25 [PATCH v2 00/16] phy: qcom-qmp-usb: convert to newer style of bindings Dmitry Baryshkov
` (12 preceding siblings ...)
2023-08-21 0:25 ` [PATCH v2 13/16] arm64: dts: qcom: sm8250: " Dmitry Baryshkov
@ 2023-08-21 0:25 ` Dmitry Baryshkov
2023-08-21 0:25 ` [PATCH v2 15/16] ARM: dts: qcom-sdx55: " Dmitry Baryshkov
2023-08-21 0:25 ` [PATCH v2 16/16] ARM: dts: qcom-sdx65: " Dmitry Baryshkov
15 siblings, 0 replies; 19+ messages in thread
From: Dmitry Baryshkov @ 2023-08-21 0:25 UTC (permalink / raw)
To: Andy Gross, Bjorn Andersson, Konrad Dybcio, Vinod Koul,
Kishon Vijay Abraham I, Rob Herring, Krzysztof Kozlowski,
Conor Dooley
Cc: Philipp Zabel, Johan Hovold, linux-arm-msm, linux-phy, devicetree
Change the USB QMP PHY to use newer style of QMP PHY bindings (single
resource region, no per-PHY subnodes).
Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
---
arch/arm64/boot/dts/qcom/sm8350.dtsi | 39 ++++++++++++----------------
1 file changed, 16 insertions(+), 23 deletions(-)
diff --git a/arch/arm64/boot/dts/qcom/sm8350.dtsi b/arch/arm64/boot/dts/qcom/sm8350.dtsi
index a26dff42329c..8faf9c2e7d09 100644
--- a/arch/arm64/boot/dts/qcom/sm8350.dtsi
+++ b/arch/arm64/boot/dts/qcom/sm8350.dtsi
@@ -2229,34 +2229,27 @@ usb_1_qmpphy_dp_in: endpoint {
};
};
- usb_2_qmpphy: phy-wrapper@88eb000 {
+ usb_2_qmpphy: phy@88eb000 {
compatible = "qcom,sm8350-qmp-usb3-uni-phy";
- reg = <0 0x088eb000 0 0x200>;
+ reg = <0 0x088eb000 0 0x2000>;
status = "disabled";
- #address-cells = <2>;
- #size-cells = <2>;
- ranges;
clocks = <&gcc GCC_USB3_SEC_PHY_AUX_CLK>,
- <&rpmhcc RPMH_CXO_CLK>,
<&gcc GCC_USB3_SEC_CLKREF_EN>,
- <&gcc GCC_USB3_SEC_PHY_COM_AUX_CLK>;
- clock-names = "aux", "ref_clk_src", "ref", "com_aux";
-
- resets = <&gcc GCC_USB3PHY_PHY_SEC_BCR>,
- <&gcc GCC_USB3_PHY_SEC_BCR>;
- reset-names = "phy", "common";
+ <&gcc GCC_USB3_SEC_PHY_COM_AUX_CLK>,
+ <&gcc GCC_USB3_SEC_PHY_PIPE_CLK>;
+ clock-names = "aux",
+ "ref",
+ "com_aux",
+ "pipe";
+ clock-output-names = "usb3_uni_phy_pipe_clk_src";
+ #clock-cells = <0>;
+ #phy-cells = <0>;
- usb_2_ssphy: phy@88ebe00 {
- reg = <0 0x088ebe00 0 0x200>,
- <0 0x088ec000 0 0x200>,
- <0 0x088eb200 0 0x1100>;
- #phy-cells = <0>;
- #clock-cells = <0>;
- clocks = <&gcc GCC_USB3_SEC_PHY_PIPE_CLK>;
- clock-names = "pipe0";
- clock-output-names = "usb3_uni_phy_pipe_clk_src";
- };
+ resets = <&gcc GCC_USB3_PHY_SEC_BCR>,
+ <&gcc GCC_USB3PHY_PHY_SEC_BCR>;
+ reset-names = "phy",
+ "phy_phy";
};
dc_noc: interconnect@90c0000 {
@@ -2409,7 +2402,7 @@ usb_2_dwc3: usb@a800000 {
iommus = <&apps_smmu 0x20 0x0>;
snps,dis_u2_susphy_quirk;
snps,dis_enblslpm_quirk;
- phys = <&usb_2_hsphy>, <&usb_2_ssphy>;
+ phys = <&usb_2_hsphy>, <&usb_2_qmpphy>;
phy-names = "usb2-phy", "usb3-phy";
};
};
--
2.39.2
^ permalink raw reply related [flat|nested] 19+ messages in thread* [PATCH v2 15/16] ARM: dts: qcom-sdx55: switch USB QMP PHY to new style of bindings
2023-08-21 0:25 [PATCH v2 00/16] phy: qcom-qmp-usb: convert to newer style of bindings Dmitry Baryshkov
` (13 preceding siblings ...)
2023-08-21 0:25 ` [PATCH v2 14/16] arm64: dts: qcom: sm8350: " Dmitry Baryshkov
@ 2023-08-21 0:25 ` Dmitry Baryshkov
2023-08-21 0:25 ` [PATCH v2 16/16] ARM: dts: qcom-sdx65: " Dmitry Baryshkov
15 siblings, 0 replies; 19+ messages in thread
From: Dmitry Baryshkov @ 2023-08-21 0:25 UTC (permalink / raw)
To: Andy Gross, Bjorn Andersson, Konrad Dybcio, Vinod Koul,
Kishon Vijay Abraham I, Rob Herring, Krzysztof Kozlowski,
Conor Dooley
Cc: Philipp Zabel, Johan Hovold, linux-arm-msm, linux-phy, devicetree
Change the USB QMP PHY to use newer style of QMP PHY bindings (single
resource region, no per-PHY subnodes).
Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
---
arch/arm/boot/dts/qcom/qcom-sdx55.dtsi | 41 +++++++++++---------------
1 file changed, 18 insertions(+), 23 deletions(-)
diff --git a/arch/arm/boot/dts/qcom/qcom-sdx55.dtsi b/arch/arm/boot/dts/qcom/qcom-sdx55.dtsi
index 4b0039ccd0da..89d723e4ad61 100644
--- a/arch/arm/boot/dts/qcom/qcom-sdx55.dtsi
+++ b/arch/arm/boot/dts/qcom/qcom-sdx55.dtsi
@@ -228,31 +228,26 @@ usb_hsphy: phy@ff4000 {
usb_qmpphy: phy@ff6000 {
compatible = "qcom,sdx55-qmp-usb3-uni-phy";
- reg = <0x00ff6000 0x1c0>;
- status = "disabled";
- #address-cells = <1>;
- #size-cells = <1>;
- ranges;
+ reg = <0x00ff6000 0x1000>;
clocks = <&gcc GCC_USB3_PHY_AUX_CLK>,
+ <&gcc GCC_USB3_PRIM_CLKREF_CLK>,
<&gcc GCC_USB_PHY_CFG_AHB2PHY_CLK>,
- <&gcc GCC_USB3_PRIM_CLKREF_CLK>;
- clock-names = "aux", "cfg_ahb", "ref";
-
- resets = <&gcc GCC_USB3PHY_PHY_BCR>,
- <&gcc GCC_USB3_PHY_BCR>;
- reset-names = "phy", "common";
-
- usb_ssphy: phy@ff6200 {
- reg = <0x00ff6200 0x170>,
- <0x00ff6400 0x200>,
- <0x00ff6800 0x800>;
- #phy-cells = <0>;
- #clock-cells = <0>;
- clocks = <&gcc GCC_USB3_PHY_PIPE_CLK>;
- clock-names = "pipe0";
- clock-output-names = "usb3_uni_phy_pipe_clk_src";
- };
+ <&gcc GCC_USB3_PHY_PIPE_CLK>;
+ clock-names = "aux",
+ "ref",
+ "cfg_ahb",
+ "pipe";
+ clock-output-names = "usb3_uni_phy_pipe_clk_src";
+ #clock-cells = <0>;
+ #phy-cells = <0>;
+
+ resets = <&gcc GCC_USB3_PHY_BCR>,
+ <&gcc GCC_USB3PHY_PHY_BCR>;
+ reset-names = "phy",
+ "phy_phy";
+
+ status = "disabled";
};
mc_virt: interconnect@1100000 {
@@ -603,7 +598,7 @@ usb_dwc3: usb@a600000 {
iommus = <&apps_smmu 0x1a0 0x0>;
snps,dis_u2_susphy_quirk;
snps,dis_enblslpm_quirk;
- phys = <&usb_hsphy>, <&usb_ssphy>;
+ phys = <&usb_hsphy>, <&usb_qmpphy>;
phy-names = "usb2-phy", "usb3-phy";
};
};
--
2.39.2
^ permalink raw reply related [flat|nested] 19+ messages in thread* [PATCH v2 16/16] ARM: dts: qcom-sdx65: switch USB QMP PHY to new style of bindings
2023-08-21 0:25 [PATCH v2 00/16] phy: qcom-qmp-usb: convert to newer style of bindings Dmitry Baryshkov
` (14 preceding siblings ...)
2023-08-21 0:25 ` [PATCH v2 15/16] ARM: dts: qcom-sdx55: " Dmitry Baryshkov
@ 2023-08-21 0:25 ` Dmitry Baryshkov
15 siblings, 0 replies; 19+ messages in thread
From: Dmitry Baryshkov @ 2023-08-21 0:25 UTC (permalink / raw)
To: Andy Gross, Bjorn Andersson, Konrad Dybcio, Vinod Koul,
Kishon Vijay Abraham I, Rob Herring, Krzysztof Kozlowski,
Conor Dooley
Cc: Philipp Zabel, Johan Hovold, linux-arm-msm, linux-phy, devicetree
Change the USB QMP PHY to use newer style of QMP PHY bindings (single
resource region, no per-PHY subnodes).
Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
---
arch/arm/boot/dts/qcom/qcom-sdx65.dtsi | 35 +++++++++++---------------
1 file changed, 15 insertions(+), 20 deletions(-)
diff --git a/arch/arm/boot/dts/qcom/qcom-sdx65.dtsi b/arch/arm/boot/dts/qcom/qcom-sdx65.dtsi
index 1a3583029a64..27e2cc84c363 100644
--- a/arch/arm/boot/dts/qcom/qcom-sdx65.dtsi
+++ b/arch/arm/boot/dts/qcom/qcom-sdx65.dtsi
@@ -233,32 +233,27 @@ usb_hsphy: phy@ff4000 {
usb_qmpphy: phy@ff6000 {
compatible = "qcom,sdx65-qmp-usb3-uni-phy";
- reg = <0x00ff6000 0x1c8>;
- #address-cells = <1>;
- #size-cells = <1>;
- ranges;
+ reg = <0x00ff6000 0x2000>;
clocks = <&gcc GCC_USB3_PHY_AUX_CLK>,
+ <&gcc GCC_USB3_PRIM_CLKREF_EN>,
<&gcc GCC_USB_PHY_CFG_AHB2PHY_CLK>,
- <&gcc GCC_USB3_PRIM_CLKREF_EN>;
- clock-names = "aux", "cfg_ahb", "ref";
+ <&gcc GCC_USB3_PHY_PIPE_CLK>;
+ clock-names = "aux",
+ "ref",
+ "cfg_ahb",
+ "pipe";
+ clock-output-names = "usb3_uni_phy_pipe_clk_src";
+ #clock-cells = <0>;
+ #phy-cells = <0>;
- resets = <&gcc GCC_USB3PHY_PHY_BCR>,
- <&gcc GCC_USB3_PHY_BCR>;
- reset-names = "phy", "common";
+ resets = <&gcc GCC_USB3_PHY_BCR>,
+ <&gcc GCC_USB3PHY_PHY_BCR>;
+ reset-names = "phy",
+ "phy_phy";
status = "disabled";
- usb_ssphy: phy@ff6200 {
- reg = <0x00ff6e00 0x160>,
- <0x00ff7000 0x1ec>,
- <0x00ff6200 0x1e00>;
- #phy-cells = <0>;
- #clock-cells = <0>;
- clocks = <&gcc GCC_USB3_PHY_PIPE_CLK>;
- clock-names = "pipe0";
- clock-output-names = "usb3_uni_phy_pipe_clk_src";
- };
};
system_noc: interconnect@1620000 {
@@ -520,7 +515,7 @@ usb_dwc3: usb@a600000 {
iommus = <&apps_smmu 0x1a0 0x0>;
snps,dis_u2_susphy_quirk;
snps,dis_enblslpm_quirk;
- phys = <&usb_hsphy>, <&usb_ssphy>;
+ phys = <&usb_hsphy>, <&usb_qmpphy>;
phy-names = "usb2-phy", "usb3-phy";
};
};
--
2.39.2
^ permalink raw reply related [flat|nested] 19+ messages in thread