From: Rob Herring <robh@kernel.org>
To: Guo Mengqi <guomengqi3@huawei.com>
Cc: vkoul@kernel.org, krzysztof.kozlowski+dt@linaro.org,
conor+dt@kernel.org, dmaengine@vger.kernel.org,
devicetree@vger.kernel.org, xuqiang36@huawei.com,
chenweilong@huawei.com
Subject: Re: [PATCH v3 2/2] dt-bindings: dma: hisi: Add bindings for Hisi Ascend sdma
Date: Thu, 24 Aug 2023 14:43:24 -0500 [thread overview]
Message-ID: <20230824194324.GA1342234-robh@kernel.org> (raw)
In-Reply-To: <20230824040007.1476-3-guomengqi3@huawei.com>
On Thu, Aug 24, 2023 at 12:00:07PM +0800, Guo Mengqi wrote:
> Add device-tree binding documentation for the Hisi Ascend sdma
> controller.
>
> Signed-off-by: Guo Mengqi <guomengqi3@huawei.com>
> ---
> .../bindings/dma/hisi,ascend-sdma.yaml | 75 +++++++++++++++++++
> 1 file changed, 75 insertions(+)
> create mode 100644 Documentation/devicetree/bindings/dma/hisi,ascend-sdma.yaml
>
> diff --git a/Documentation/devicetree/bindings/dma/hisi,ascend-sdma.yaml b/Documentation/devicetree/bindings/dma/hisi,ascend-sdma.yaml
> new file mode 100644
> index 000000000000..87b6132c1b4b
> --- /dev/null
> +++ b/Documentation/devicetree/bindings/dma/hisi,ascend-sdma.yaml
> @@ -0,0 +1,75 @@
> +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
> +%YAML 1.2
> +---
> +$id: http://devicetree.org/schemas/dma/hisi,ascend-sdma.yaml#
> +$schema: http://devicetree.org/meta-schemas/core.yaml#
> +
> +title: HISI Ascend System DMA (SDMA) controller
> +
> +description: |
> + The Ascend SDMA controller is used for transferring data
> + in system memory. It utilizes IOMMU SVA feature and accepts
> + virtual address from user process.
> +
> +maintainers:
> + - Guo Mengqi <guomengqi3@huawei.com>
> +
> +allOf:
> + - $ref: dma-controller.yaml#
> +
> +properties:
> + compatible:
> + enum:
> + - hisilicon,ascend310-sdma
> + - hisilicon,ascend910-sdma
> +
> + reg:
> + maxItems: 1
> +
> + '#dma-cells':
> + const: 1
> + description:
> + Clients specify a single cell with channel number.
> +
> + hisilicon,ascend-sdma-channel-map:
> + description: |
> + bitmap, each bit stands for a channel that is allowed to
> + use by this system. Maximum 64 bits.
> + $ref: /schemas/types.yaml#/definitions/uint64
Sounds like the common property dma-channel-mask. Use that.
> +
> + iommus:
> + maxItems: 1
> +
> + pasid-num-bits:
Needs a vendor prefix.
> + description: |
> + sdma utilizes iommu sva feature to transfer user space data.
Isn't shared VA mostly a s/w concept?
> + It acts as a basic dma controller if not bound to user space.
I don't understand what this means.
> + const: 0x10
If only 1 value is allowed, what is the point of this property.
Rob
next prev parent reply other threads:[~2023-08-24 19:44 UTC|newest]
Thread overview: 7+ messages / expand[flat|nested] mbox.gz Atom feed top
2023-08-24 4:00 [PATCH v3 0/2] Add dma controller for hisilicon ascend310/910 Guo Mengqi
2023-08-24 4:00 ` [PATCH v3 1/2] dmaengine: Add HiSilicon Ascend SDMA engine support Guo Mengqi
2023-08-24 4:00 ` [PATCH v3 2/2] dt-bindings: dma: hisi: Add bindings for Hisi Ascend sdma Guo Mengqi
2023-08-24 7:15 ` Krzysztof Kozlowski
2023-08-30 6:31 ` guomengqi (A)
2023-08-24 19:43 ` Rob Herring [this message]
2023-08-30 9:33 ` guomengqi (A)
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