* [-next v2 1/2] riscv: dts: starfive: visionfive 2: Enable usb0
@ 2023-08-29 2:05 Hal Feng
2023-08-29 2:05 ` [-next v2 2/2] riscv: dts: starfive: visionfive 2: Fix uart0 pins sort order Hal Feng
` (2 more replies)
0 siblings, 3 replies; 6+ messages in thread
From: Hal Feng @ 2023-08-29 2:05 UTC (permalink / raw)
To: Conor Dooley, Emil Renner Berthing, Rob Herring,
Krzysztof Kozlowski, Palmer Dabbelt, Paul Walmsley, Albert Ou
Cc: Hal Feng, devicetree, linux-riscv, linux-kernel
usb0 was disabled by mistake when merging, so enable it.
Fixes: e7c304c0346d ("riscv: dts: starfive: jh7110: add the node and pins configuration for tdm")
Signed-off-by: Hal Feng <hal.feng@starfivetech.com>
---
arch/riscv/boot/dts/starfive/jh7110-starfive-visionfive-2.dtsi | 1 +
1 file changed, 1 insertion(+)
diff --git a/arch/riscv/boot/dts/starfive/jh7110-starfive-visionfive-2.dtsi b/arch/riscv/boot/dts/starfive/jh7110-starfive-visionfive-2.dtsi
index d79f94432b27..85f40df93f25 100644
--- a/arch/riscv/boot/dts/starfive/jh7110-starfive-visionfive-2.dtsi
+++ b/arch/riscv/boot/dts/starfive/jh7110-starfive-visionfive-2.dtsi
@@ -513,6 +513,7 @@ &uart0 {
&usb0 {
dr_mode = "peripheral";
+ status = "okay";
};
&U74_1 {
--
2.38.1
^ permalink raw reply related [flat|nested] 6+ messages in thread
* [-next v2 2/2] riscv: dts: starfive: visionfive 2: Fix uart0 pins sort order
2023-08-29 2:05 [-next v2 1/2] riscv: dts: starfive: visionfive 2: Enable usb0 Hal Feng
@ 2023-08-29 2:05 ` Hal Feng
2023-09-13 3:47 ` [-next v2 1/2] riscv: dts: starfive: visionfive 2: Enable usb0 Hal Feng
2023-09-13 13:26 ` Conor Dooley
2 siblings, 0 replies; 6+ messages in thread
From: Hal Feng @ 2023-08-29 2:05 UTC (permalink / raw)
To: Conor Dooley, Emil Renner Berthing, Rob Herring,
Krzysztof Kozlowski, Palmer Dabbelt, Paul Walmsley, Albert Ou
Cc: Hal Feng, devicetree, linux-riscv, linux-kernel
Node uart0_pins should be sorted alphabetically.
Signed-off-by: Hal Feng <hal.feng@starfivetech.com>
---
.../jh7110-starfive-visionfive-2.dtsi | 48 +++++++++----------
1 file changed, 24 insertions(+), 24 deletions(-)
diff --git a/arch/riscv/boot/dts/starfive/jh7110-starfive-visionfive-2.dtsi b/arch/riscv/boot/dts/starfive/jh7110-starfive-visionfive-2.dtsi
index 85f40df93f25..382dfb5e64e4 100644
--- a/arch/riscv/boot/dts/starfive/jh7110-starfive-visionfive-2.dtsi
+++ b/arch/riscv/boot/dts/starfive/jh7110-starfive-visionfive-2.dtsi
@@ -440,30 +440,6 @@ GPOEN_ENABLE,
};
};
- uart0_pins: uart0-0 {
- tx-pins {
- pinmux = <GPIOMUX(5, GPOUT_SYS_UART0_TX,
- GPOEN_ENABLE,
- GPI_NONE)>;
- bias-disable;
- drive-strength = <12>;
- input-disable;
- input-schmitt-disable;
- slew-rate = <0>;
- };
-
- rx-pins {
- pinmux = <GPIOMUX(6, GPOUT_LOW,
- GPOEN_DISABLE,
- GPI_SYS_UART0_RX)>;
- bias-disable; /* external pull-up */
- drive-strength = <2>;
- input-enable;
- input-schmitt-enable;
- slew-rate = <0>;
- };
- };
-
tdm_pins: tdm-0 {
tx-pins {
pinmux = <GPIOMUX(44, GPOUT_SYS_TDM_TXD,
@@ -497,6 +473,30 @@ GPOEN_DISABLE,
input-enable;
};
};
+
+ uart0_pins: uart0-0 {
+ tx-pins {
+ pinmux = <GPIOMUX(5, GPOUT_SYS_UART0_TX,
+ GPOEN_ENABLE,
+ GPI_NONE)>;
+ bias-disable;
+ drive-strength = <12>;
+ input-disable;
+ input-schmitt-disable;
+ slew-rate = <0>;
+ };
+
+ rx-pins {
+ pinmux = <GPIOMUX(6, GPOUT_LOW,
+ GPOEN_DISABLE,
+ GPI_SYS_UART0_RX)>;
+ bias-disable; /* external pull-up */
+ drive-strength = <2>;
+ input-enable;
+ input-schmitt-enable;
+ slew-rate = <0>;
+ };
+ };
};
&tdm {
--
2.38.1
^ permalink raw reply related [flat|nested] 6+ messages in thread
* Re: [-next v2 1/2] riscv: dts: starfive: visionfive 2: Enable usb0
2023-08-29 2:05 [-next v2 1/2] riscv: dts: starfive: visionfive 2: Enable usb0 Hal Feng
2023-08-29 2:05 ` [-next v2 2/2] riscv: dts: starfive: visionfive 2: Fix uart0 pins sort order Hal Feng
@ 2023-09-13 3:47 ` Hal Feng
2023-09-13 6:20 ` Conor Dooley
2023-09-13 13:26 ` Conor Dooley
2 siblings, 1 reply; 6+ messages in thread
From: Hal Feng @ 2023-09-13 3:47 UTC (permalink / raw)
To: Conor Dooley, Emil Renner Berthing, Rob Herring,
Krzysztof Kozlowski, Palmer Dabbelt, Paul Walmsley, Albert Ou
Cc: devicetree, linux-riscv, linux-kernel
On Tue, 29 Aug 2023 10:05:10 +0800, Hal Feng wrote:
> usb0 was disabled by mistake when merging, so enable it.
>
> Fixes: e7c304c0346d ("riscv: dts: starfive: jh7110: add the node and pins configuration for tdm")
> Signed-off-by: Hal Feng <hal.feng@starfivetech.com>
> ---
> arch/riscv/boot/dts/starfive/jh7110-starfive-visionfive-2.dtsi | 1 +
> 1 file changed, 1 insertion(+)
>
> diff --git a/arch/riscv/boot/dts/starfive/jh7110-starfive-visionfive-2.dtsi b/arch/riscv/boot/dts/starfive/jh7110-starfive-visionfive-2.dtsi
> index d79f94432b27..85f40df93f25 100644
> --- a/arch/riscv/boot/dts/starfive/jh7110-starfive-visionfive-2.dtsi
> +++ b/arch/riscv/boot/dts/starfive/jh7110-starfive-visionfive-2.dtsi
> @@ -513,6 +513,7 @@ &uart0 {
>
> &usb0 {
> dr_mode = "peripheral";
> + status = "okay";
> };
Hi, Conor,
As v6.6-rc1 is already released, would you apply this series
in rc2 or the later rc versions?
Best regards,
Hal
^ permalink raw reply [flat|nested] 6+ messages in thread
* Re: [-next v2 1/2] riscv: dts: starfive: visionfive 2: Enable usb0
2023-09-13 3:47 ` [-next v2 1/2] riscv: dts: starfive: visionfive 2: Enable usb0 Hal Feng
@ 2023-09-13 6:20 ` Conor Dooley
2023-09-13 6:45 ` Hal Feng
0 siblings, 1 reply; 6+ messages in thread
From: Conor Dooley @ 2023-09-13 6:20 UTC (permalink / raw)
To: Hal Feng
Cc: Conor Dooley, Emil Renner Berthing, Rob Herring,
Krzysztof Kozlowski, Palmer Dabbelt, Paul Walmsley, Albert Ou,
devicetree, linux-riscv, linux-kernel
[-- Attachment #1: Type: text/plain, Size: 1141 bytes --]
On Wed, Sep 13, 2023 at 11:47:22AM +0800, Hal Feng wrote:
> On Tue, 29 Aug 2023 10:05:10 +0800, Hal Feng wrote:
> > usb0 was disabled by mistake when merging, so enable it.
> >
> > Fixes: e7c304c0346d ("riscv: dts: starfive: jh7110: add the node and pins configuration for tdm")
> > Signed-off-by: Hal Feng <hal.feng@starfivetech.com>
> > ---
> > arch/riscv/boot/dts/starfive/jh7110-starfive-visionfive-2.dtsi | 1 +
> > 1 file changed, 1 insertion(+)
> >
> > diff --git a/arch/riscv/boot/dts/starfive/jh7110-starfive-visionfive-2.dtsi b/arch/riscv/boot/dts/starfive/jh7110-starfive-visionfive-2.dtsi
> > index d79f94432b27..85f40df93f25 100644
> > --- a/arch/riscv/boot/dts/starfive/jh7110-starfive-visionfive-2.dtsi
> > +++ b/arch/riscv/boot/dts/starfive/jh7110-starfive-visionfive-2.dtsi
> > @@ -513,6 +513,7 @@ &uart0 {
> >
> > &usb0 {
> > dr_mode = "peripheral";
> > + status = "okay";
> > };
>
> Hi, Conor,
>
> As v6.6-rc1 is already released, would you apply this series
> in rc2 or the later rc versions?
Yes, I was planning on doing a sweep for potential fixes today. There's
3 or 4 I think.
[-- Attachment #2: signature.asc --]
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^ permalink raw reply [flat|nested] 6+ messages in thread
* Re: [-next v2 1/2] riscv: dts: starfive: visionfive 2: Enable usb0
2023-09-13 6:20 ` Conor Dooley
@ 2023-09-13 6:45 ` Hal Feng
0 siblings, 0 replies; 6+ messages in thread
From: Hal Feng @ 2023-09-13 6:45 UTC (permalink / raw)
To: Conor Dooley
Cc: Conor Dooley, Emil Renner Berthing, Rob Herring,
Krzysztof Kozlowski, Palmer Dabbelt, Paul Walmsley, Albert Ou,
devicetree, linux-riscv, linux-kernel
On Wed, 13 Sep 2023 07:20:54 +0100, Conor Dooley wrote:
> On Wed, Sep 13, 2023 at 11:47:22AM +0800, Hal Feng wrote:
>> On Tue, 29 Aug 2023 10:05:10 +0800, Hal Feng wrote:
>> > usb0 was disabled by mistake when merging, so enable it.
>> >
>> > Fixes: e7c304c0346d ("riscv: dts: starfive: jh7110: add the node and pins configuration for tdm")
>> > Signed-off-by: Hal Feng <hal.feng@starfivetech.com>
>> > ---
>> > arch/riscv/boot/dts/starfive/jh7110-starfive-visionfive-2.dtsi | 1 +
>> > 1 file changed, 1 insertion(+)
>> >
>> > diff --git a/arch/riscv/boot/dts/starfive/jh7110-starfive-visionfive-2.dtsi b/arch/riscv/boot/dts/starfive/jh7110-starfive-visionfive-2.dtsi
>> > index d79f94432b27..85f40df93f25 100644
>> > --- a/arch/riscv/boot/dts/starfive/jh7110-starfive-visionfive-2.dtsi
>> > +++ b/arch/riscv/boot/dts/starfive/jh7110-starfive-visionfive-2.dtsi
>> > @@ -513,6 +513,7 @@ &uart0 {
>> >
>> > &usb0 {
>> > dr_mode = "peripheral";
>> > + status = "okay";
>> > };
>>
>> Hi, Conor,
>>
>> As v6.6-rc1 is already released, would you apply this series
>> in rc2 or the later rc versions?
>
> Yes, I was planning on doing a sweep for potential fixes today. There's
> 3 or 4 I think.
I see. Thanks a lot.
Best regards,
Hal
^ permalink raw reply [flat|nested] 6+ messages in thread
* Re: [-next v2 1/2] riscv: dts: starfive: visionfive 2: Enable usb0
2023-08-29 2:05 [-next v2 1/2] riscv: dts: starfive: visionfive 2: Enable usb0 Hal Feng
2023-08-29 2:05 ` [-next v2 2/2] riscv: dts: starfive: visionfive 2: Fix uart0 pins sort order Hal Feng
2023-09-13 3:47 ` [-next v2 1/2] riscv: dts: starfive: visionfive 2: Enable usb0 Hal Feng
@ 2023-09-13 13:26 ` Conor Dooley
2 siblings, 0 replies; 6+ messages in thread
From: Conor Dooley @ 2023-09-13 13:26 UTC (permalink / raw)
To: Conor Dooley, Emil Renner Berthing, Rob Herring,
Krzysztof Kozlowski, Palmer Dabbelt, Paul Walmsley, Albert Ou,
Hal Feng
Cc: conor, Conor Dooley, devicetree, linux-riscv, linux-kernel
From: Conor Dooley <conor.dooley@microchip.com>
On Tue, 29 Aug 2023 10:05:10 +0800, Hal Feng wrote:
> usb0 was disabled by mistake when merging, so enable it.
>
>
Applied to riscv-dt-fixes, thanks!
[1/2] riscv: dts: starfive: visionfive 2: Enable usb0
https://git.kernel.org/conor/c/2f9f488e7b14
[2/2] riscv: dts: starfive: visionfive 2: Fix uart0 pins sort order
https://git.kernel.org/conor/c/1558209533f1
I'll try to get these out before the weekend, the other pending patch
has been sitting since mid merge window.
Thanks,
Conor.
^ permalink raw reply [flat|nested] 6+ messages in thread
end of thread, other threads:[~2023-09-13 13:27 UTC | newest]
Thread overview: 6+ messages (download: mbox.gz follow: Atom feed
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2023-09-13 3:47 ` [-next v2 1/2] riscv: dts: starfive: visionfive 2: Enable usb0 Hal Feng
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