From: Kathiravan Thirumoorthy <quic_kathirav@quicinc.com>
To: Andy Gross <agross@kernel.org>,
Bjorn Andersson <andersson@kernel.org>,
Konrad Dybcio <konrad.dybcio@linaro.org>,
Jassi Brar <jassisinghbrar@gmail.com>,
Rob Herring <robh+dt@kernel.org>,
"Krzysztof Kozlowski" <krzysztof.kozlowski+dt@linaro.org>,
Conor Dooley <conor+dt@kernel.org>,
Michael Turquette <mturquette@baylibre.com>,
"Stephen Boyd" <sboyd@kernel.org>,
Sricharan Ramabadhran <quic_srichara@quicinc.com>,
Anusha Rao <quic_anusha@quicinc.com>,
Devi Priya <quic_devipriy@quicinc.com>,
<linux-arm-msm@vger.kernel.org>, <linux-kernel@vger.kernel.org>,
<devicetree@vger.kernel.org>, <linux-clk@vger.kernel.org>
Cc: Kathiravan Thirumoorthy <quic_kathirav@quicinc.com>
Subject: [PATCH RESEND 7/7] arm64: dts: qcom: include the GPLL0 as clock provider for IPQ mailbox
Date: Wed, 6 Sep 2023 10:26:26 +0530 [thread overview]
Message-ID: <20230904-gpll_cleanup-v1-7-de2c448f1188@quicinc.com> (raw)
In-Reply-To: <20230904-gpll_cleanup-v1-0-de2c448f1188@quicinc.com>
While the kernel is booting up, APSS PLL will be running at 800MHz with
GPLL0 as source. Once the cpufreq driver is available, APSS PLL will be
configured to the rate based on the opp table and the source also will be
changed to APSS_PLL_EARLY.
Also, dynamic scaling of CPUFreq is not supported on IPQ5332, so to switch
between the frequencies we need to park the APSS PLL in safe source,
here it is GPLL0 and then shutdown and bring up the APSS PLL in the
desired rate. So this patch is preparatory one to enable the CPUFreq on
IPQ5332.
Signed-off-by: Kathiravan Thirumoorthy <quic_kathirav@quicinc.com>
---
arch/arm64/boot/dts/qcom/ipq5332.dtsi | 4 ++--
arch/arm64/boot/dts/qcom/ipq6018.dtsi | 4 ++--
arch/arm64/boot/dts/qcom/ipq8074.dtsi | 4 ++--
arch/arm64/boot/dts/qcom/ipq9574.dtsi | 4 ++--
4 files changed, 8 insertions(+), 8 deletions(-)
diff --git a/arch/arm64/boot/dts/qcom/ipq5332.dtsi b/arch/arm64/boot/dts/qcom/ipq5332.dtsi
index 8bfc2db44624..82761ae199a9 100644
--- a/arch/arm64/boot/dts/qcom/ipq5332.dtsi
+++ b/arch/arm64/boot/dts/qcom/ipq5332.dtsi
@@ -335,8 +335,8 @@ apcs_glb: mailbox@b111000 {
"qcom,ipq6018-apcs-apps-global";
reg = <0x0b111000 0x1000>;
#clock-cells = <1>;
- clocks = <&a53pll>, <&xo_board>;
- clock-names = "pll", "xo";
+ clocks = <&a53pll>, <&xo_board>, <&gcc GPLL0>;
+ clock-names = "pll", "xo", "gpll0";
#mbox-cells = <1>;
};
diff --git a/arch/arm64/boot/dts/qcom/ipq6018.dtsi b/arch/arm64/boot/dts/qcom/ipq6018.dtsi
index 47b8b1d6730a..a30a5b893762 100644
--- a/arch/arm64/boot/dts/qcom/ipq6018.dtsi
+++ b/arch/arm64/boot/dts/qcom/ipq6018.dtsi
@@ -619,8 +619,8 @@ apcs_glb: mailbox@b111000 {
compatible = "qcom,ipq6018-apcs-apps-global";
reg = <0x0 0x0b111000 0x0 0x1000>;
#clock-cells = <1>;
- clocks = <&a53pll>, <&xo>;
- clock-names = "pll", "xo";
+ clocks = <&a53pll>, <&xo>, <&gcc GPLL0>;
+ clock-names = "pll", "xo", "gpll0";
#mbox-cells = <1>;
};
diff --git a/arch/arm64/boot/dts/qcom/ipq8074.dtsi b/arch/arm64/boot/dts/qcom/ipq8074.dtsi
index 00ed71936b47..0be19267bdcf 100644
--- a/arch/arm64/boot/dts/qcom/ipq8074.dtsi
+++ b/arch/arm64/boot/dts/qcom/ipq8074.dtsi
@@ -719,8 +719,8 @@ apcs_glb: mailbox@b111000 {
compatible = "qcom,ipq8074-apcs-apps-global",
"qcom,ipq6018-apcs-apps-global";
reg = <0x0b111000 0x1000>;
- clocks = <&a53pll>, <&xo>;
- clock-names = "pll", "xo";
+ clocks = <&a53pll>, <&xo>, <&gcc GPLL0>;
+ clock-names = "pll", "xo", "gpll0";
#clock-cells = <1>;
#mbox-cells = <1>;
diff --git a/arch/arm64/boot/dts/qcom/ipq9574.dtsi b/arch/arm64/boot/dts/qcom/ipq9574.dtsi
index 51aba071c1eb..89edb4b852df 100644
--- a/arch/arm64/boot/dts/qcom/ipq9574.dtsi
+++ b/arch/arm64/boot/dts/qcom/ipq9574.dtsi
@@ -652,8 +652,8 @@ apcs_glb: mailbox@b111000 {
"qcom,ipq6018-apcs-apps-global";
reg = <0x0b111000 0x1000>;
#clock-cells = <1>;
- clocks = <&a73pll>, <&xo_board_clk>;
- clock-names = "pll", "xo";
+ clocks = <&a73pll>, <&xo_board_clk>, <&gcc GPLL0>;
+ clock-names = "pll", "xo", "gpll0";
#mbox-cells = <1>;
};
--
2.34.1
next prev parent reply other threads:[~2023-09-06 4:58 UTC|newest]
Thread overview: 14+ messages / expand[flat|nested] mbox.gz Atom feed top
2023-09-06 4:56 [PATCH RESEND 0/7] Add GPLL0 as clock provider for the Qualcomm's IPQ mailbox controller Kathiravan Thirumoorthy
2023-09-06 4:56 ` [PATCH RESEND 1/7] clk: qcom: ipq8074: drop the CLK_SET_RATE_PARENT flag from PLL clocks Kathiravan Thirumoorthy
2023-09-06 4:56 ` [PATCH RESEND 2/7] clk: qcom: ipq6018: " Kathiravan Thirumoorthy
2023-09-06 4:56 ` [PATCH RESEND 3/7] clk: qcom: ipq9574: drop the CLK_SET_RATE_PARENT flag from GPLL clocks Kathiravan Thirumoorthy
2023-09-06 4:56 ` [PATCH RESEND 4/7] clk: qcom: ipq5332: " Kathiravan Thirumoorthy
2023-09-06 4:56 ` [PATCH RESEND 5/7] dt-bindings: mailbox: qcom: add one more clock provider for IPQ mailbox Kathiravan Thirumoorthy
2023-09-06 8:06 ` Krzysztof Kozlowski
2023-09-06 4:56 ` [PATCH RESEND 6/7] clk: qcom: apss-ipq6018: add the GPLL0 clock also as clock provider Kathiravan Thirumoorthy
2023-09-09 15:41 ` Robert Marko
2023-09-11 10:26 ` Konrad Dybcio
2023-09-06 4:56 ` Kathiravan Thirumoorthy [this message]
2023-09-06 9:33 ` [PATCH RESEND 7/7] arm64: dts: qcom: include the GPLL0 as clock provider for IPQ mailbox Konrad Dybcio
2023-09-06 9:38 ` Kathiravan Thirumoorthy
2023-09-06 5:00 ` [PATCH RESEND 0/7] Add GPLL0 as clock provider for the Qualcomm's IPQ mailbox controller Kathiravan Thirumoorthy
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=20230904-gpll_cleanup-v1-7-de2c448f1188@quicinc.com \
--to=quic_kathirav@quicinc.com \
--cc=agross@kernel.org \
--cc=andersson@kernel.org \
--cc=conor+dt@kernel.org \
--cc=devicetree@vger.kernel.org \
--cc=jassisinghbrar@gmail.com \
--cc=konrad.dybcio@linaro.org \
--cc=krzysztof.kozlowski+dt@linaro.org \
--cc=linux-arm-msm@vger.kernel.org \
--cc=linux-clk@vger.kernel.org \
--cc=linux-kernel@vger.kernel.org \
--cc=mturquette@baylibre.com \
--cc=quic_anusha@quicinc.com \
--cc=quic_devipriy@quicinc.com \
--cc=quic_srichara@quicinc.com \
--cc=robh+dt@kernel.org \
--cc=sboyd@kernel.org \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox;
as well as URLs for NNTP newsgroup(s).