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From: Herve Codina <herve.codina@bootlin.com>
To: Jonathan Cameron <Jonathan.Cameron@Huawei.com>
Cc: "Lizhi Hou" <lizhi.hou@amd.com>,
	linux-pci@vger.kernel.org, devicetree@vger.kernel.org,
	linux-kernel@vger.kernel.org, robh@kernel.org, max.zhen@amd.com,
	sonal.santan@amd.com, stefano.stabellini@xilinx.com,
	"Clément Léger" <clement.leger@bootlin.com>,
	"Thomas Petazzoni" <thomas.petazzoni@bootlin.com>
Subject: Re: [PATCH V13 2/5] PCI: Create device tree node for bridge
Date: Mon, 11 Sep 2023 17:35:03 +0200	[thread overview]
Message-ID: <20230911173503.0db85e4b@bootlin.com> (raw)
In-Reply-To: <20230911154856.000076c3@Huawei.com>

Hi Jonathan,

On Mon, 11 Sep 2023 15:48:56 +0100
Jonathan Cameron <Jonathan.Cameron@Huawei.com> wrote:

> On Tue, 15 Aug 2023 10:19:57 -0700
> Lizhi Hou <lizhi.hou@amd.com> wrote:
> 
> > The PCI endpoint device such as Xilinx Alveo PCI card maps the register
> > spaces from multiple hardware peripherals to its PCI BAR. Normally,
> > the PCI core discovers devices and BARs using the PCI enumeration process.
> > There is no infrastructure to discover the hardware peripherals that are
> > present in a PCI device, and which can be accessed through the PCI BARs.
> > 
> > Apparently, the device tree framework requires a device tree node for the
> > PCI device. Thus, it can generate the device tree nodes for hardware
> > peripherals underneath. Because PCI is self discoverable bus, there might
> > not be a device tree node created for PCI devices. Furthermore, if the PCI
> > device is hot pluggable, when it is plugged in, the device tree nodes for
> > its parent bridges are required. Add support to generate device tree node
> > for PCI bridges.
> > 
> > Add an of_pci_make_dev_node() interface that can be used to create device
> > tree node for PCI devices.
> > 
> > Add a PCI_DYNAMIC_OF_NODES config option. When the option is turned on,
> > the kernel will generate device tree nodes for PCI bridges unconditionally.
> > 
> > Initially, add the basic properties for the dynamically generated device
> > tree nodes which include #address-cells, #size-cells, device_type,
> > compatible, ranges, reg.
> > 
> > Acked-by: Bjorn Helgaas <bhelgaas@google.com>
> > Signed-off-by: Lizhi Hou <lizhi.hou@amd.com>  
> 
> I tried to bring this up for a custom PCIe card emulated in QEMU on an ARM ACPI
> machine.
> 
> There are some missing parts that were present in Clements series, but not this
> one, particularly creation of the root pci object.
> 
> Anyhow, hit an intermittent crash...

I am facing the same issues.

I use a custom PCIe board too but on x86 ACPI machine.

In order to have a working system, I need also to build a DT node for the PCI
Host bridge (previously done by Clement's patch) and I am a bit stuck with
interrupts.

On your side (ACPI machine) how do you handle this ?
I mean is your PCI host bridge provided by ACPI ? And if so, you probably need
to build a DT node for this PCI host bridge and add some interrupt-map,
interrupt-map-mask properties in the DT node.

Best regards,
Hervé

-- 
Hervé Codina, Bootlin
Embedded Linux and Kernel engineering
https://bootlin.com

  reply	other threads:[~2023-09-11 20:52 UTC|newest]

Thread overview: 33+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2023-08-15 17:19 [PATCH V13 0/5] Generate device tree node for pci devices Lizhi Hou
2023-08-15 17:19 ` [PATCH V13 1/5] of: dynamic: Add interfaces for creating device node dynamically Lizhi Hou
2023-09-11 20:48   ` Andy Shevchenko
2023-08-15 17:19 ` [PATCH V13 2/5] PCI: Create device tree node for bridge Lizhi Hou
2023-08-31 13:57   ` Guenter Roeck
2023-09-11 14:48   ` Jonathan Cameron
2023-09-11 15:35     ` Herve Codina [this message]
2023-09-11 15:47       ` Jonathan Cameron
2023-09-11 16:22         ` Jonathan Cameron
2023-09-11 21:13           ` Andy Shevchenko
2023-09-11 16:58     ` Lizhi Hou
2023-09-12 10:10       ` Jonathan Cameron
2023-09-12 17:05         ` Lizhi Hou
2023-09-11 15:13   ` Herve Codina
2023-09-11 17:53     ` Lizhi Hou
2023-09-11 21:06   ` Andy Shevchenko
2023-08-15 17:19 ` [PATCH V13 3/5] PCI: Add quirks to generate device tree node for Xilinx Alveo U50 Lizhi Hou
2023-08-15 17:19 ` [PATCH V13 4/5] of: overlay: Extend of_overlay_fdt_apply() to specify the target node Lizhi Hou
2023-08-24  8:31   ` Geert Uytterhoeven
2023-08-24 18:40     ` Lizhi Hou
2023-08-24 21:01       ` Rob Herring
2023-08-25  7:25       ` Geert Uytterhoeven
2023-08-28 17:12         ` Lizhi Hou
2023-08-15 17:20 ` [PATCH V13 5/5] of: unittest: Add pci_dt_testdrv pci driver Lizhi Hou
2023-09-11 20:37 ` [PATCH V13 0/5] Generate device tree node for pci devices Andy Shevchenko
2023-09-12 19:12   ` Rob Herring
2023-09-13 11:17     ` Andy Shevchenko
2023-09-15 17:30       ` Herve Codina
2023-09-18  7:17         ` Andy Shevchenko
2023-09-18 10:54           ` Jonathan Cameron
2023-09-21 12:20           ` Rob Herring
2023-09-21 13:26             ` Herve Codina
2023-09-11 21:08 ` Andy Shevchenko

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