[PATCH 01/12] riscv: Add SOPHGO SOC family Kconfig support

[PATCH 01/12] riscv: Add SOPHGO SOC family Kconfig support

[Wang Chen]

From: "xiaoguang.xing" <xiaoguang.xing@sophgo.com>

The first SoC in the SOPHGO series is SG2042, which contains 64 RISC-V
cores.

Signed-off-by: xiaoguang.xing <xiaoguang.xing@sophgo.com>
Signed-off-by: Wang Chen <wangchen20@iscas.ac.cn>
---
 arch/riscv/Kconfig.socs | 10 ++++++++++
 1 file changed, 10 insertions(+)

diff --git a/arch/riscv/Kconfig.socs b/arch/riscv/Kconfig.socs
index 6833d01e2e70..fc7b5e6c7def 100644
--- a/arch/riscv/Kconfig.socs
+++ b/arch/riscv/Kconfig.socs
@@ -110,4 +110,14 @@ config SOC_CANAAN_K210_DTB_SOURCE
 
 endif # ARCH_CANAAN
 
+config ARCH_SOPHGO
+	bool "Sophgo SoCs"
+	select SIFIVE_PLIC
+	help
+	  This enables support for Sophgo SoC platform hardware.
+	  SOPHGO is committed to become a provider of universal
+	  computing power, focusing on the development and
+	  promotion of computing power products such as AI and
+	  RISC-V CPU.
+
 endmenu # "SoC selection"
-- 
2.25.1

Re: [PATCH 01/12] riscv: Add SOPHGO SOC family Kconfig support

[Krzysztof Kozlowski]

On 15/09/2023 09:10, Wang Chen wrote:
> From: "xiaoguang.xing" <xiaoguang.xing@sophgo.com>
> 
> The first SoC in the SOPHGO series is SG2042, which contains 64 RISC-V
> cores.
> 
> Signed-off-by: xiaoguang.xing <xiaoguang.xing@sophgo.com>
> Signed-off-by: Wang Chen <wangchen20@iscas.ac.cn>

Your patch threading is completely broken/missing, so this makes review
unnecessary difficult. Fix your process (e.g. use b4).

Best regards,
Krzysztof

Re: [PATCH 01/12] riscv: Add SOPHGO SOC family Kconfig support

[Conor Dooley]

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Yo,

On Fri, Sep 15, 2023 at 03:10:05PM +0800, Wang Chen wrote:
> From: "xiaoguang.xing" <xiaoguang.xing@sophgo.com>

This needs to be a name, not the contents of their email address.
Probably just needs the . swapped for a space?

> The first SoC in the SOPHGO series is SG2042, which contains 64 RISC-V
> cores.
> 
> Signed-off-by: xiaoguang.xing <xiaoguang.xing@sophgo.com>
> Signed-off-by: Wang Chen <wangchen20@iscas.ac.cn>
> ---
>  arch/riscv/Kconfig.socs | 10 ++++++++++
>  1 file changed, 10 insertions(+)
> 
> diff --git a/arch/riscv/Kconfig.socs b/arch/riscv/Kconfig.socs
> index 6833d01e2e70..fc7b5e6c7def 100644
> --- a/arch/riscv/Kconfig.socs
> +++ b/arch/riscv/Kconfig.socs
> @@ -110,4 +110,14 @@ config SOC_CANAAN_K210_DTB_SOURCE
>  
>  endif # ARCH_CANAAN
>  
> +config ARCH_SOPHGO
> +	bool "Sophgo SoCs"
> +	select SIFIVE_PLIC

This should not be needed, this should be selected at the arch level.

> +	help
> +	  This enables support for Sophgo SoC platform hardware.
> +	  SOPHGO is committed to become a provider of universal
> +	  computing power, focusing on the development and
> +	  promotion of computing power products such as AI and
> +	  RISC-V CPU.

This is not a place for marketing blurbs, please take a look at the
other entries.
Also, this should not be placed at the end of the list, it should be
before ARCH_SUNXI.

Thanks,
Conor.

> +
>  endmenu # "SoC selection"
> -- 
> 2.25.1
> 

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