From: Benjamin Bara <bbara93@gmail.com>
To: Rob Herring <robh+dt@kernel.org>,
Krzysztof Kozlowski <krzysztof.kozlowski+dt@linaro.org>,
Conor Dooley <conor+dt@kernel.org>,
Shawn Guo <shawnguo@kernel.org>,
Sascha Hauer <s.hauer@pengutronix.de>,
Pengutronix Kernel Team <kernel@pengutronix.de>,
Fabio Estevam <festevam@gmail.com>,
NXP Linux Team <linux-imx@nxp.com>,
Michael Turquette <mturquette@baylibre.com>,
Stephen Boyd <sboyd@kernel.org>,
Russell King <linux@armlinux.org.uk>,
Abel Vesa <abelvesa@kernel.org>, Peng Fan <peng.fan@nxp.com>
Cc: Frank Oltmanns <frank@oltmanns.dev>,
Maxime Ripard <mripard@kernel.org>,
devicetree@vger.kernel.org,
linux-arm-kernel@lists.infradead.org,
linux-kernel@vger.kernel.org, linux-clk@vger.kernel.org,
Benjamin Bara <benjamin.bara@skidata.com>
Subject: [PATCH 06/13] clk: keep track if a clock is explicitly configured
Date: Mon, 18 Sep 2023 00:40:02 +0200 [thread overview]
Message-ID: <20230918-imx8mp-dtsi-v1-6-1d008b3237c0@skidata.com> (raw)
In-Reply-To: <20230918-imx8mp-dtsi-v1-0-1d008b3237c0@skidata.com>
From: Benjamin Bara <benjamin.bara@skidata.com>
When we keep track if a clock has a given rate explicitly set by a
consumer, we can identify unintentional clock rate changes in an easy
way. This also helps during debugging, as one can see if a rate is set
by accident or due to a consumer-related change.
Signed-off-by: Benjamin Bara <benjamin.bara@skidata.com>
---
drivers/clk/clk.c | 25 +++++++++++++++++++++++++
include/linux/clk-provider.h | 1 +
2 files changed, 26 insertions(+)
diff --git a/drivers/clk/clk.c b/drivers/clk/clk.c
index 8f4f92547768..82c65ed432c5 100644
--- a/drivers/clk/clk.c
+++ b/drivers/clk/clk.c
@@ -70,6 +70,7 @@ struct clk_core {
unsigned long rate;
unsigned long req_rate;
unsigned long new_rate;
+ unsigned long set_rate;
struct clk_core *new_parent;
struct clk_core *new_child;
unsigned long flags;
@@ -541,6 +542,12 @@ bool __clk_is_enabled(struct clk *clk)
}
EXPORT_SYMBOL_GPL(__clk_is_enabled);
+bool __clk_is_rate_set(struct clk *clk)
+{
+ return clk->core->set_rate > 0;
+}
+EXPORT_SYMBOL_GPL(__clk_is_rate_set);
+
static bool mux_is_better_rate(unsigned long rate, unsigned long now,
unsigned long best, unsigned long flags)
{
@@ -578,6 +585,19 @@ static bool clk_core_has_parent(struct clk_core *core, const struct clk_core *pa
return false;
}
+static bool clk_core_is_ancestor(struct clk_core *core, const struct clk_core *ancestor)
+{
+ struct clk_core *tmp = core->parent;
+
+ while (tmp) {
+ if (tmp == ancestor)
+ return true;
+ tmp = tmp->parent;
+ }
+
+ return false;
+}
+
static void
clk_core_forward_rate_req(struct clk_core *core,
const struct clk_rate_request *old_req,
@@ -2358,6 +2378,9 @@ static void clk_change_rate(struct clk_core *core)
trace_clk_set_rate_complete(core, core->new_rate);
+ if (rate_trigger_clk && clk_core_is_ancestor(rate_trigger_clk->core, core))
+ core->set_rate = core->new_rate;
+
core->rate = clk_recalc(core, best_parent_rate);
if (core->flags & CLK_SET_RATE_UNGATE) {
@@ -2528,6 +2551,7 @@ int clk_set_rate(struct clk *clk, unsigned long rate)
clk_core_rate_protect(clk->core);
rate_trigger_clk = NULL;
+ clk->core->set_rate = rate;
clk_prepare_unlock();
@@ -2579,6 +2603,7 @@ int clk_set_rate_exclusive(struct clk *clk, unsigned long rate)
}
rate_trigger_clk = NULL;
+ clk->core->set_rate = rate;
clk_prepare_unlock();
diff --git a/include/linux/clk-provider.h b/include/linux/clk-provider.h
index 3fb99ed5e8d9..e3732e0bbed9 100644
--- a/include/linux/clk-provider.h
+++ b/include/linux/clk-provider.h
@@ -1325,6 +1325,7 @@ bool clk_hw_is_prepared(const struct clk_hw *hw);
bool clk_hw_rate_is_protected(const struct clk_hw *hw);
bool clk_hw_is_enabled(const struct clk_hw *hw);
bool __clk_is_enabled(struct clk *clk);
+bool __clk_is_rate_set(struct clk *hw);
struct clk *__clk_lookup(const char *name);
int __clk_mux_determine_rate(struct clk_hw *hw,
struct clk_rate_request *req);
--
2.34.1
next prev parent reply other threads:[~2023-09-17 22:40 UTC|newest]
Thread overview: 35+ messages / expand[flat|nested] mbox.gz Atom feed top
2023-09-17 22:39 [PATCH 00/13] imx8mp: first clock propagation attempt (for LVDS) Benjamin Bara
2023-09-17 22:39 ` [PATCH 01/13] arm64: dts: imx8mp: lvds_bridge: use root instead of composite Benjamin Bara
2023-09-19 6:47 ` Maxime Ripard
2023-09-20 7:27 ` Benjamin Bara
2023-09-17 22:39 ` [PATCH 02/13] arm64: dts: imx8mp: re-parent IMX8MP_CLK_MEDIA_MIPI_PHY1_REF Benjamin Bara
2023-10-03 13:01 ` Adam Ford
2023-10-04 8:36 ` Benjamin Bara
2023-09-17 22:39 ` [PATCH 03/13] clk: implement clk_hw_set_rate() Benjamin Bara
2023-09-19 6:50 ` Maxime Ripard
2023-09-17 22:40 ` [PATCH 04/13] clk: print debug message if parent change is ignored Benjamin Bara
2023-09-17 22:40 ` [PATCH 05/13] clk: keep track of the trigger of an ongoing clk_set_rate Benjamin Bara
2023-09-19 7:06 ` Maxime Ripard
2023-09-20 7:50 ` Benjamin Bara
2023-09-17 22:40 ` Benjamin Bara [this message]
2023-09-19 7:07 ` [PATCH 06/13] clk: keep track if a clock is explicitly configured Maxime Ripard
2023-09-20 7:22 ` Benjamin Bara
2023-09-25 15:07 ` Maxime Ripard
2023-09-17 22:40 ` [PATCH 07/13] clk: detect unintended rate changes Benjamin Bara
2023-09-19 7:22 ` Maxime Ripard
2023-09-17 22:40 ` [PATCH 08/13] clk: divider: stop early if an optimal divider is found Benjamin Bara
2023-09-17 22:40 ` [PATCH 09/13] clk: imx: pll14xx: consider active rate for re-config Benjamin Bara
2023-09-17 22:40 ` [PATCH 10/13] clk: imx: composite-8m: convert compute_dividers to void Benjamin Bara
2023-09-17 22:40 ` [PATCH 11/13] clk: imx: composite-8m: implement CLK_SET_RATE_PARENT Benjamin Bara
2023-09-17 22:40 ` [PATCH 12/13] clk: imx: imx8mp: allow LVDS clocks to set parent rate Benjamin Bara
2023-09-17 22:40 ` [PATCH 13/13] arm64: dts: imx8mp: remove assigned-clock-rate of IMX8MP_VIDEO_PLL1 Benjamin Bara
2023-09-18 5:00 ` [PATCH 00/13] imx8mp: first clock propagation attempt (for LVDS) Adam Ford
2023-09-18 17:59 ` Benjamin Bara
2023-09-19 7:37 ` Maxime Ripard
2023-09-18 17:24 ` Frank Oltmanns
2023-09-18 18:05 ` Benjamin Bara
2023-09-19 7:39 ` Maxime Ripard
2023-09-19 7:31 ` Maxime Ripard
2023-10-03 13:28 ` Adam Ford
2023-10-04 8:04 ` Alexander Stein
2023-10-04 8:28 ` Benjamin Bara
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