From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from lindbergh.monkeyblade.net (lindbergh.monkeyblade.net [23.128.96.19]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id C87881C687 for ; Mon, 18 Sep 2023 09:38:33 +0000 (UTC) Received: from mail-ej1-x629.google.com (mail-ej1-x629.google.com [IPv6:2a00:1450:4864:20::629]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 85081126 for ; Mon, 18 Sep 2023 02:38:27 -0700 (PDT) Received: by mail-ej1-x629.google.com with SMTP id a640c23a62f3a-9ada609bb62so540475266b.2 for ; Mon, 18 Sep 2023 02:38:27 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=baylibre-com.20230601.gappssmtp.com; s=20230601; t=1695029906; x=1695634706; darn=vger.kernel.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=K+o3x+uJ9YzwXJ706ogofqn/rKhanyRMaKp/8ksBhmQ=; b=DiPjgD3m+0WNfEcSo/14O40oKDh633g93rbYKSLYVoRZgqfOR2ly4nZXUPfBSBIKC7 OIeApOUCEu/ruE7sA41y5wCTbROrk7j6kF02hi3arHceI5cs2odJYt2ynIdIqMdxua3I QRJrMu/3BMKTZqqe1OZWpa0EThJKh/NWUrH+/aXa69baFhWj5T4no+iLDD+OVsEOrPez pV5zaoNGCYx3HqddzJJyYeGnnTaDLG1Y1htStdmpodQNg7wYrMiO3CBlL/Fqu+d+dGyl cDLJp9kbozMlvDIChHblDcxKJ527ukDx48h/DhtHOP6Qp6XZTJSsNFrAiWYQYtbAicWV a1zQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1695029906; x=1695634706; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=K+o3x+uJ9YzwXJ706ogofqn/rKhanyRMaKp/8ksBhmQ=; b=miMjHyeaJ3CQnOcCoqMRlFhp5l5yjFtJA+hYeHKQVpLNmOUd8PEs6FKN0MLxIHxLAN Hvp4szOztC+aJTjAsdppEz4hzsYY6/DjvF5d7R5zl8VT6YC+WyJOf6aJrtp69+CMA16V Iaw4IuICFGpI1hO1qWFeY26Z8WSWlUNKk3xnsXRVSPk1Owe1JM0Cm3As5CAlxkzh9o+I v1J06GmzLJz1LDG9eRftcBx42uYCDfM14uFOP08NQoIopfCiHvWfxkZcSIqCaL7/qouS q+A/Ds8BOtW66uq8ABXRHdPRqs6Vh5F2+pkbmu5YLWy3Q0BmD6tODdeZzQHfjodx4doX nSzw== X-Gm-Message-State: AOJu0YzeAAZ8cm4eFTeoUl//G+JzgcNA96p2xmc1KLvXAM62r7HvAJe3 zL8kz7S6x8hbK6TUncQuu0bJ0g== X-Google-Smtp-Source: AGHT+IEX0ezJmq5q1fuYBZLREjIGK0zvStap6dCn74VZClYqNabRbMBNjqZl++yQ4n7omZ2/YQ90ww== X-Received: by 2002:a17:906:292a:b0:9ae:f0:17e1 with SMTP id v10-20020a170906292a00b009ae00f017e1mr2538052ejd.74.1695029906014; Mon, 18 Sep 2023 02:38:26 -0700 (PDT) Received: from blmsp.fritz.box ([2001:4091:a246:8222:872:4a5b:b69c:1318]) by smtp.gmail.com with ESMTPSA id o10-20020a1709061d4a00b0099293cdbc98sm6251164ejh.145.2023.09.18.02.38.24 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 18 Sep 2023 02:38:25 -0700 (PDT) From: Markus Schneider-Pargmann To: Rob Herring , Krzysztof Kozlowski , Conor Dooley , Matthias Brugger Cc: Ulf Hansson , Alexandre Mergnat , Chun-Jie Chen , AngeloGioacchino Del Regno , Tinghan Shen , Fabien Parent , devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-pm@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-mediatek@lists.infradead.org, Alexandre Bailon , Fabien Parent , Markus Schneider-Pargmann Subject: [PATCH v8 7/8] soc: mediatek: Add support for MTK_SCPD_STRICT_BUS_PROTECTION cap Date: Mon, 18 Sep 2023 11:37:51 +0200 Message-Id: <20230918093751.1188668-8-msp@baylibre.com> X-Mailer: git-send-email 2.40.1 In-Reply-To: <20230918093751.1188668-1-msp@baylibre.com> References: <20230918093751.1188668-1-msp@baylibre.com> Precedence: bulk X-Mailing-List: devicetree@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Spam-Status: No, score=-1.9 required=5.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,RCVD_IN_DNSWL_BLOCKED,SPF_HELO_NONE,SPF_PASS autolearn=unavailable autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net From: Alexandre Bailon This adds support for MTK_SCPD_STRICT_BUS_PROTECTION capability. It is a strict bus protection policy that requires the bus protection to be disabled before accessing the bus. This is required by the mt8365, for the MM power domain. Signed-off-by: Alexandre Bailon Signed-off-by: Fabien Parent Signed-off-by: Markus Schneider-Pargmann Reviewed-by: AngeloGioacchino Del Regno Reviewed-by: Alexandre Mergnat Tested-by: Alexandre Mergnat --- drivers/pmdomain/mediatek/mtk-pm-domains.c | 27 ++++++++++++++++++---- drivers/pmdomain/mediatek/mtk-pm-domains.h | 3 ++- 2 files changed, 25 insertions(+), 5 deletions(-) diff --git a/drivers/pmdomain/mediatek/mtk-pm-domains.c b/drivers/pmdomain/mediatek/mtk-pm-domains.c index 4bf3a375b749..69cdf6ff00b8 100644 --- a/drivers/pmdomain/mediatek/mtk-pm-domains.c +++ b/drivers/pmdomain/mediatek/mtk-pm-domains.c @@ -262,9 +262,17 @@ static int scpsys_power_on(struct generic_pm_domain *genpd) regmap_clear_bits(scpsys->base, pd->data->ctl_offs, PWR_ISO_BIT); regmap_set_bits(scpsys->base, pd->data->ctl_offs, PWR_RST_B_BIT); - ret = clk_bulk_prepare_enable(pd->num_subsys_clks, pd->subsys_clks); - if (ret) - goto err_pwr_ack; + /* + * In few Mediatek platforms(e.g. MT6779), the bus protect policy is + * stricter, which leads to bus protect release must be prior to bus + * access. + */ + if (!MTK_SCPD_CAPS(pd, MTK_SCPD_STRICT_BUS_PROTECTION)) { + ret = clk_bulk_prepare_enable(pd->num_subsys_clks, + pd->subsys_clks); + if (ret) + goto err_pwr_ack; + } ret = scpsys_sram_enable(pd); if (ret < 0) @@ -274,12 +282,23 @@ static int scpsys_power_on(struct generic_pm_domain *genpd) if (ret < 0) goto err_disable_sram; + if (MTK_SCPD_CAPS(pd, MTK_SCPD_STRICT_BUS_PROTECTION)) { + ret = clk_bulk_prepare_enable(pd->num_subsys_clks, + pd->subsys_clks); + if (ret) + goto err_enable_bus_protect; + } + return 0; +err_enable_bus_protect: + scpsys_bus_protect_enable(pd); err_disable_sram: scpsys_sram_disable(pd); err_disable_subsys_clks: - clk_bulk_disable_unprepare(pd->num_subsys_clks, pd->subsys_clks); + if (!MTK_SCPD_CAPS(pd, MTK_SCPD_STRICT_BUS_PROTECTION)) + clk_bulk_disable_unprepare(pd->num_subsys_clks, + pd->subsys_clks); err_pwr_ack: clk_bulk_disable_unprepare(pd->num_clks, pd->clks); err_reg: diff --git a/drivers/pmdomain/mediatek/mtk-pm-domains.h b/drivers/pmdomain/mediatek/mtk-pm-domains.h index 17c033217704..aaba5e6b0536 100644 --- a/drivers/pmdomain/mediatek/mtk-pm-domains.h +++ b/drivers/pmdomain/mediatek/mtk-pm-domains.h @@ -12,6 +12,7 @@ #define MTK_SCPD_ALWAYS_ON BIT(5) #define MTK_SCPD_EXT_BUCK_ISO BIT(6) #define MTK_SCPD_HAS_INFRA_NAO BIT(7) +#define MTK_SCPD_STRICT_BUS_PROTECTION BIT(8) #define MTK_SCPD_CAPS(_scpd, _x) ((_scpd)->data->caps & (_x)) #define SPM_VDE_PWR_CON 0x0210 @@ -107,7 +108,7 @@ struct scpsys_domain_data { u32 sram_pdn_ack_bits; int ext_buck_iso_offs; u32 ext_buck_iso_mask; - u8 caps; + u16 caps; const struct scpsys_bus_prot_data bp_cfg[SPM_MAX_BUS_PROT_DATA]; int pwr_sta_offs; int pwr_sta2nd_offs; -- 2.40.1