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[31.30.173.16]) by smtp.gmail.com with ESMTPSA id c26-20020a05600c0ada00b00400268671c6sm1250996wmr.13.2023.09.20.01.18.50 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 20 Sep 2023 01:18:50 -0700 (PDT) Date: Wed, 20 Sep 2023 10:18:49 +0200 From: Andrew Jones To: Anup Patel Cc: Paolo Bonzini , Atish Patra , Palmer Dabbelt , Paul Walmsley , Conor Dooley , Rob Herring , Krzysztof Kozlowski , Shuah Khan , Mayuresh Chitale , devicetree@vger.kernel.org, kvm@vger.kernel.org, kvm-riscv@lists.infradead.org, linux-riscv@lists.infradead.org, linux-kernel@vger.kernel.org, linux-kselftest@vger.kernel.org Subject: Re: [PATCH 7/7] KVM: riscv: selftests: Add condops extensions to get-reg-list test Message-ID: <20230920-d30b398a99804418792264c3@orel> References: <20230919035343.1399389-1-apatel@ventanamicro.com> <20230919035343.1399389-8-apatel@ventanamicro.com> Precedence: bulk X-Mailing-List: devicetree@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: <20230919035343.1399389-8-apatel@ventanamicro.com> X-Spam-Status: No, score=-2.1 required=5.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF,RCVD_IN_DNSWL_NONE, SPF_HELO_NONE,SPF_PASS autolearn=unavailable autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net On Tue, Sep 19, 2023 at 09:23:43AM +0530, Anup Patel wrote: > We have a new conditional operations related ISA extensions so let us add > these extensions to get-reg-list test. > > Signed-off-by: Anup Patel > --- > tools/testing/selftests/kvm/riscv/get-reg-list.c | 4 ++++ > 1 file changed, 4 insertions(+) > > diff --git a/tools/testing/selftests/kvm/riscv/get-reg-list.c b/tools/testing/selftests/kvm/riscv/get-reg-list.c > index 9f464c7996c6..4ad4bf87fa78 100644 > --- a/tools/testing/selftests/kvm/riscv/get-reg-list.c > +++ b/tools/testing/selftests/kvm/riscv/get-reg-list.c > @@ -50,6 +50,8 @@ bool filter_reg(__u64 reg) > case KVM_REG_RISCV_ISA_EXT | KVM_RISCV_ISA_EXT_ZIFENCEI: > case KVM_REG_RISCV_ISA_EXT | KVM_RISCV_ISA_EXT_ZIHPM: > case KVM_REG_RISCV_ISA_EXT | KVM_RISCV_ISA_EXT_SMSTATEEN: > + case KVM_REG_RISCV_ISA_EXT | KVM_RISCV_ISA_EXT_XVENTANACONDOPS: > + case KVM_REG_RISCV_ISA_EXT | KVM_RISCV_ISA_EXT_ZICOND: > return true; > /* AIA registers are always available when Ssaia can't be disabled */ > case KVM_REG_RISCV_CSR | KVM_REG_RISCV_CSR_AIA | KVM_REG_RISCV_CSR_AIA_REG(siselect): > @@ -360,6 +362,8 @@ static const char *isa_ext_id_to_str(__u64 id) > "KVM_RISCV_ISA_EXT_ZIFENCEI", > "KVM_RISCV_ISA_EXT_ZIHPM", > "KVM_RISCV_ISA_EXT_SMSTATEEN", > + "KVM_RISCV_ISA_EXT_XVENTANACONDOPS", > + "KVM_RISCV_ISA_EXT_ZICOND", > }; > > if (reg_off >= ARRAY_SIZE(kvm_isa_ext_reg_name)) { > -- > 2.34.1 > Don't we want to add test configs for these? Thanks, drew