From: Conor Dooley <conor.dooley@microchip.com>
To: Chen Wang <unicornxw@gmail.com>
Cc: <aou@eecs.berkeley.edu>, <chao.wei@sophgo.com>,
<conor@kernel.org>, <devicetree@vger.kernel.org>,
<emil.renner.berthing@canonical.com>, <guoren@kernel.org>,
<jszhang@kernel.org>, <krzysztof.kozlowski+dt@linaro.org>,
<linux-kernel@vger.kernel.org>, <linux-riscv@lists.infradead.org>,
<palmer@dabbelt.com>, <paul.walmsley@sifive.com>,
<robh+dt@kernel.org>, <xiaoguang.xing@sophgo.com>,
Inochi Amaoto <inochiama@outlook.com>,
Chen Wang <wangchen20@iscas.ac.cn>
Subject: Re: [PATCH v2 06/11] dt-bindings: timer: Add Sophgo sg2042 clint
Date: Wed, 20 Sep 2023 09:50:53 +0100 [thread overview]
Message-ID: <20230920-recount-chili-f80d5dc125e8@wendy> (raw)
In-Reply-To: <55865e1ce40d2017f047d3a9e1a9ee30043b271f.1695189879.git.wangchen20@iscas.ac.cn>
[-- Attachment #1: Type: text/plain, Size: 1938 bytes --]
On Wed, Sep 20, 2023 at 02:39:39PM +0800, Chen Wang wrote:
> From: Inochi Amaoto <inochiama@outlook.com>
>
> Add two new compatible string formatted like `C9xx-clint-xxx` to identify
> the timer and ipi device separately, and do not allow c900-clint as the
> fallback to avoid conflict.
>
> Signed-off-by: Inochi Amaoto <inochiama@outlook.com>
> Signed-off-by: Chen Wang <wangchen20@iscas.ac.cn>
Have you ignored Krzysztof's comments on this? I don't see a response or
a reaction to his comments about the compatibles on the last version.
Additionally, where is the user for these? I don't see any drivers that
actually make use of these.
Why do you need to have 2 compatibles (and therefore 2 devices) for the
clint? I thought the clint was a single device, of which the mtimer and
mswi bits were just "features"? Having split register ranges isn't a
reason to have two compatibles, so I must be missing something here...
Thanks,
Conor.
> ---
> Documentation/devicetree/bindings/timer/sifive,clint.yaml | 8 ++++++++
> 1 file changed, 8 insertions(+)
>
> diff --git a/Documentation/devicetree/bindings/timer/sifive,clint.yaml b/Documentation/devicetree/bindings/timer/sifive,clint.yaml
> index a0185e15a42f..ae69696c5c75 100644
> --- a/Documentation/devicetree/bindings/timer/sifive,clint.yaml
> +++ b/Documentation/devicetree/bindings/timer/sifive,clint.yaml
> @@ -39,6 +39,14 @@ properties:
> - allwinner,sun20i-d1-clint
> - thead,th1520-clint
> - const: thead,c900-clint
> + - items:
> + - enum:
> + - sophgo,sg2042-clint-mtimer
> + - const: thead,c900-clint-mtimer
> + - items:
> + - enum:
> + - sophgo,sg2042-clint-mswi
> + - const: thead,c900-clint-mswi
> - items:
> - const: sifive,clint0
> - const: riscv,clint0
> --
> 2.25.1
>
[-- Attachment #2: signature.asc --]
[-- Type: application/pgp-signature, Size: 228 bytes --]
next prev parent reply other threads:[~2023-09-20 8:52 UTC|newest]
Thread overview: 67+ messages / expand[flat|nested] mbox.gz Atom feed top
2023-09-20 6:33 [PATCH v2 00/11] Add Milk-V Pioneer RISC-V board support Chen Wang
2023-09-20 6:34 ` [PATCH v2 01/11] riscv: Add SOPHGO SOC family Kconfig support Chen Wang
2023-09-20 7:34 ` Guo Ren
2023-09-20 8:21 ` Conor Dooley
2023-09-20 6:37 ` [PATCH v2 02/11] dt-bindings: vendor-prefixes: add milkv/sophgo Chen Wang
2023-09-20 7:38 ` Guo Ren
2023-09-20 8:22 ` Conor Dooley
2023-09-20 9:14 ` Chen Wang
2023-09-20 6:37 ` [PATCH v2 03/11] dt-bindings: riscv: add sophgo sg2042 bindings Chen Wang
2023-09-20 7:43 ` Guo Ren
2023-09-20 8:28 ` Conor Dooley
2023-09-21 10:21 ` Chen Wang
2023-09-21 12:18 ` Conor Dooley
2023-09-21 13:40 ` Chen Wang
2023-09-21 13:51 ` Chen Wang
2023-09-21 14:00 ` Conor Dooley
2023-09-22 1:48 ` Chen Wang
2023-09-20 11:55 ` Krzysztof Kozlowski
2023-09-20 12:03 ` 汪辰
2023-09-21 0:48 ` Jisheng Zhang
2023-09-20 6:38 ` [PATCH v2 04/11] dt-bindings: riscv: Add T-HEAD C920 compatibles Chen Wang
2023-09-20 7:44 ` Guo Ren
2023-09-20 8:37 ` Conor Dooley
2023-09-20 6:39 ` [PATCH v2 05/11] dt-bindings: interrupt-controller: Add SOPHGO's SG2042 PLIC Chen Wang
2023-09-20 7:45 ` Guo Ren
2023-09-20 8:57 ` Conor Dooley
2023-09-20 6:39 ` [PATCH v2 06/11] dt-bindings: timer: Add Sophgo sg2042 clint Chen Wang
2023-09-20 8:12 ` Guo Ren
2023-09-20 8:50 ` Conor Dooley [this message]
2023-09-20 11:57 ` Krzysztof Kozlowski
2023-09-20 6:39 ` [PATCH v2 07/11] dt-bindings: serial: snps-dw-apb-uart: Add Sophgo SG2042 uarts Chen Wang
2023-09-20 7:51 ` Guo Ren
2023-09-20 8:37 ` Conor Dooley
2023-09-20 6:40 ` [PATCH v2 08/11] serial: 8250_dw: Add Sophgo SG2042 support Chen Wang
2023-09-20 7:53 ` Guo Ren
2023-09-20 8:05 ` Chen Wang
2023-09-20 8:08 ` Guo Ren
2023-09-22 9:41 ` Ben Dooks
2023-09-22 10:40 ` Emil Renner Berthing
2023-09-22 11:39 ` Chen Wang
2023-09-26 7:38 ` Chen Wang
2023-09-20 6:40 ` [PATCH v2 09/11] riscv: dts: add initial SOPHGO SG2042 SoC device tree Chen Wang
2023-09-20 8:04 ` Guo Ren
2023-09-20 8:57 ` Conor Dooley
2023-09-21 9:56 ` Chen Wang
2023-09-21 10:15 ` Conor Dooley
2023-09-21 10:27 ` Chen Wang
2023-09-21 12:06 ` Conor Dooley
2023-09-20 11:32 ` Emil Renner Berthing
2023-09-20 12:09 ` 汪辰
2023-09-20 12:32 ` Emil Renner Berthing
2023-09-20 12:37 ` 汪辰
2023-09-20 15:19 ` Palmer Dabbelt
2023-09-20 15:31 ` Conor Dooley
2023-09-20 6:40 ` [PATCH v2 10/11] riscv: dts: sophgo: add Milk-V Pioneer board " Chen Wang
2023-09-20 8:05 ` Guo Ren
2023-09-20 8:16 ` Conor Dooley
2023-09-20 11:59 ` Krzysztof Kozlowski
2023-09-20 6:41 ` [PATCH v2 11/11] riscv: defconfig: enable SOPHGO SoC Chen Wang
2023-09-20 8:06 ` Guo Ren
2023-09-20 8:58 ` Conor Dooley
2023-09-20 10:01 ` [PATCH v2 00/11] Add Milk-V Pioneer RISC-V board support Conor Dooley
2023-09-22 10:24 ` Chen Wang
2023-09-22 10:50 ` Conor Dooley
2023-09-22 11:28 ` Chen Wang
2023-09-20 15:22 ` Palmer Dabbelt
2023-09-26 10:29 ` Chen Wang
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=20230920-recount-chili-f80d5dc125e8@wendy \
--to=conor.dooley@microchip.com \
--cc=aou@eecs.berkeley.edu \
--cc=chao.wei@sophgo.com \
--cc=conor@kernel.org \
--cc=devicetree@vger.kernel.org \
--cc=emil.renner.berthing@canonical.com \
--cc=guoren@kernel.org \
--cc=inochiama@outlook.com \
--cc=jszhang@kernel.org \
--cc=krzysztof.kozlowski+dt@linaro.org \
--cc=linux-kernel@vger.kernel.org \
--cc=linux-riscv@lists.infradead.org \
--cc=palmer@dabbelt.com \
--cc=paul.walmsley@sifive.com \
--cc=robh+dt@kernel.org \
--cc=unicornxw@gmail.com \
--cc=wangchen20@iscas.ac.cn \
--cc=xiaoguang.xing@sophgo.com \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox;
as well as URLs for NNTP newsgroup(s).