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From: Conor Dooley <conor@kernel.org>
To: Chen Wang <unicornxw@gmail.com>
Cc: Conor Dooley <conor.dooley@microchip.com>,
	aou@eecs.berkeley.edu, chao.wei@sophgo.com,
	devicetree@vger.kernel.org, emil.renner.berthing@canonical.com,
	guoren@kernel.org, jszhang@kernel.org,
	krzysztof.kozlowski+dt@linaro.org, linux-kernel@vger.kernel.org,
	linux-riscv@lists.infradead.org, palmer@dabbelt.com,
	paul.walmsley@sifive.com, robh+dt@kernel.org,
	xiaoguang.xing@sophgo.com, Chen Wang <wangchen20@iscas.ac.cn>,
	Inochi Amaoto <inochiama@outlook.com>
Subject: Re: [PATCH v2 09/11] riscv: dts: add initial SOPHGO SG2042 SoC device tree
Date: Thu, 21 Sep 2023 13:06:20 +0100	[thread overview]
Message-ID: <20230921-fdc47972b1d3caa685f2a164@fedora> (raw)
In-Reply-To: <CAHAQgRDLmKJQ1sp76q4s7P4E_=nYuw199ceGCR0LYeq3331tLQ@mail.gmail.com>

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On Thu, Sep 21, 2023 at 06:27:09PM +0800, Chen Wang wrote:
> Conor Dooley <conor@kernel.org> 于2023年9月21日周四 18:15写道:
> >
> > On Thu, Sep 21, 2023 at 05:56:28PM +0800, Chen Wang wrote:

> > > > > +
> > > > > +/ {
> > > > > +     compatible = "sophgo,sg2042";
> > > > > +     #address-cells = <2>;
> > > > > +     #size-cells = <2>;
> > > > > +     dma-noncoherent;
> > > > > +
> > > > > +     aliases {
> > > > > +             serial0 = &uart0;
> > > > > +     };
> > > > > +
> > > > > +     /* the mem node will be updated by ZSBL. */
> > > >
> > > > huh? So these are random numbers below? Either put something useful here
> > > > or delete it please.
> > >
> > > The memory for SG2042 is not fixed, the bootloader will detect memory
> > > installed on board during booting and fill the actual address and size
> > > in the memory node. The comment " /* the mem node will be updated by
> > > ZSBL. */" is telling this.
> >
> > Yes, I read the comment!
> >
> > > We write memory nodes like this to make them act just as placeholders
> > > and the value is by default written as zero.
> >
> > Why knowingly add something that is wrong, rather than omitting them
> > entirely?
> 
> We learn this from arch/arm64/boot/dts/hisilicon/hi3660-hikey960.dts,
> it writes DTS as following:
> 
> ```
>         memory@0 {
>                 device_type = "memory";
>                 /* rewrite this at bootloader */
>                 reg = <0x0 0x0 0x0 0x0>;
>         };
> ```
> So you mean we can totally remove the memory nodes in DTS and make
> bootloader add it by itself? That sounds a good idea, I will have a
> try. I used to think memory nodes are must-have in DTS.

AFAIR, the ones for the d1 based systems (like the nezha I have) don't
have a memory node at all.

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  reply	other threads:[~2023-09-21 12:06 UTC|newest]

Thread overview: 67+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2023-09-20  6:33 [PATCH v2 00/11] Add Milk-V Pioneer RISC-V board support Chen Wang
2023-09-20  6:34 ` [PATCH v2 01/11] riscv: Add SOPHGO SOC family Kconfig support Chen Wang
2023-09-20  7:34   ` Guo Ren
2023-09-20  8:21   ` Conor Dooley
2023-09-20  6:37 ` [PATCH v2 02/11] dt-bindings: vendor-prefixes: add milkv/sophgo Chen Wang
2023-09-20  7:38   ` Guo Ren
2023-09-20  8:22   ` Conor Dooley
2023-09-20  9:14     ` Chen Wang
2023-09-20  6:37 ` [PATCH v2 03/11] dt-bindings: riscv: add sophgo sg2042 bindings Chen Wang
2023-09-20  7:43   ` Guo Ren
2023-09-20  8:28   ` Conor Dooley
2023-09-21 10:21     ` Chen Wang
2023-09-21 12:18       ` Conor Dooley
2023-09-21 13:40         ` Chen Wang
2023-09-21 13:51         ` Chen Wang
2023-09-21 14:00           ` Conor Dooley
2023-09-22  1:48     ` Chen Wang
2023-09-20 11:55   ` Krzysztof Kozlowski
2023-09-20 12:03     ` 汪辰
2023-09-21  0:48       ` Jisheng Zhang
2023-09-20  6:38 ` [PATCH v2 04/11] dt-bindings: riscv: Add T-HEAD C920 compatibles Chen Wang
2023-09-20  7:44   ` Guo Ren
2023-09-20  8:37   ` Conor Dooley
2023-09-20  6:39 ` [PATCH v2 05/11] dt-bindings: interrupt-controller: Add SOPHGO's SG2042 PLIC Chen Wang
2023-09-20  7:45   ` Guo Ren
2023-09-20  8:57   ` Conor Dooley
2023-09-20  6:39 ` [PATCH v2 06/11] dt-bindings: timer: Add Sophgo sg2042 clint Chen Wang
2023-09-20  8:12   ` Guo Ren
2023-09-20  8:50   ` Conor Dooley
2023-09-20 11:57   ` Krzysztof Kozlowski
2023-09-20  6:39 ` [PATCH v2 07/11] dt-bindings: serial: snps-dw-apb-uart: Add Sophgo SG2042 uarts Chen Wang
2023-09-20  7:51   ` Guo Ren
2023-09-20  8:37   ` Conor Dooley
2023-09-20  6:40 ` [PATCH v2 08/11] serial: 8250_dw: Add Sophgo SG2042 support Chen Wang
2023-09-20  7:53   ` Guo Ren
2023-09-20  8:05     ` Chen Wang
2023-09-20  8:08       ` Guo Ren
2023-09-22  9:41   ` Ben Dooks
2023-09-22 10:40     ` Emil Renner Berthing
2023-09-22 11:39       ` Chen Wang
2023-09-26  7:38       ` Chen Wang
2023-09-20  6:40 ` [PATCH v2 09/11] riscv: dts: add initial SOPHGO SG2042 SoC device tree Chen Wang
2023-09-20  8:04   ` Guo Ren
2023-09-20  8:57   ` Conor Dooley
2023-09-21  9:56     ` Chen Wang
2023-09-21 10:15       ` Conor Dooley
2023-09-21 10:27         ` Chen Wang
2023-09-21 12:06           ` Conor Dooley [this message]
2023-09-20 11:32   ` Emil Renner Berthing
2023-09-20 12:09     ` 汪辰
2023-09-20 12:32       ` Emil Renner Berthing
2023-09-20 12:37         ` 汪辰
2023-09-20 15:19   ` Palmer Dabbelt
2023-09-20 15:31     ` Conor Dooley
2023-09-20  6:40 ` [PATCH v2 10/11] riscv: dts: sophgo: add Milk-V Pioneer board " Chen Wang
2023-09-20  8:05   ` Guo Ren
2023-09-20  8:16   ` Conor Dooley
2023-09-20 11:59   ` Krzysztof Kozlowski
2023-09-20  6:41 ` [PATCH v2 11/11] riscv: defconfig: enable SOPHGO SoC Chen Wang
2023-09-20  8:06   ` Guo Ren
2023-09-20  8:58   ` Conor Dooley
2023-09-20 10:01 ` [PATCH v2 00/11] Add Milk-V Pioneer RISC-V board support Conor Dooley
2023-09-22 10:24   ` Chen Wang
2023-09-22 10:50     ` Conor Dooley
2023-09-22 11:28       ` Chen Wang
2023-09-20 15:22 ` Palmer Dabbelt
2023-09-26 10:29   ` Chen Wang

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