From: Manivannan Sadhasivam <mani@kernel.org>
To: Mrinmay Sarkar <quic_msarkar@quicinc.com>
Cc: agross@kernel.org, andersson@kernel.org,
krzysztof.kozlowski+dt@linaro.org, conor+dt@kernel.org,
konrad.dybcio@linaro.org, mani@kernel.org,
quic_shazhuss@quicinc.com, quic_nitegupt@quicinc.com,
quic_ramkri@quicinc.com, quic_nayiluri@quicinc.com,
quic_krichai@quicinc.com, quic_vbadigan@quicinc.com,
quic_parass@quicinc.com, "Bjorn Helgaas" <bhelgaas@google.com>,
"Lorenzo Pieralisi" <lpieralisi@kernel.org>,
"Krzysztof Wilczyński" <kw@linux.com>,
"Rob Herring" <robh@kernel.org>,
"Kishon Vijay Abraham I" <kishon@kernel.org>,
"Vinod Koul" <vkoul@kernel.org>,
linux-pci@vger.kernel.org, linux-arm-msm@vger.kernel.org,
devicetree@vger.kernel.org, linux-kernel@vger.kernel.org,
mhi@lists.linux.dev, linux-phy@lists.infradead.org
Subject: Re: [PATCH v1 1/5] dt-bindings: PCI: qcom-ep: Add support for SA8775P SoC
Date: Thu, 21 Sep 2023 10:11:32 +0200 [thread overview]
Message-ID: <20230921081132.GA2891@thinkpad> (raw)
In-Reply-To: <1695218113-31198-2-git-send-email-quic_msarkar@quicinc.com>
On Wed, Sep 20, 2023 at 07:25:08PM +0530, Mrinmay Sarkar wrote:
> Add devicetree bindings support for SA8775P SoC.
> Define reg and interrupt per platform.
>
> Signed-off-by: Mrinmay Sarkar <quic_msarkar@quicinc.com>
> ---
> .../devicetree/bindings/pci/qcom,pcie-ep.yaml | 130 +++++++++++++++++----
> 1 file changed, 108 insertions(+), 22 deletions(-)
>
> diff --git a/Documentation/devicetree/bindings/pci/qcom,pcie-ep.yaml b/Documentation/devicetree/bindings/pci/qcom,pcie-ep.yaml
> index a223ce0..e860e8f 100644
> --- a/Documentation/devicetree/bindings/pci/qcom,pcie-ep.yaml
> +++ b/Documentation/devicetree/bindings/pci/qcom,pcie-ep.yaml
> @@ -13,6 +13,7 @@ properties:
> compatible:
> oneOf:
> - enum:
> + - qcom,sa8775p-pcie-ep
> - qcom,sdx55-pcie-ep
> - qcom,sm8450-pcie-ep
> - items:
> @@ -20,29 +21,19 @@ properties:
> - const: qcom,sdx55-pcie-ep
>
> reg:
> - items:
> - - description: Qualcomm-specific PARF configuration registers
> - - description: DesignWare PCIe registers
> - - description: External local bus interface registers
> - - description: Address Translation Unit (ATU) registers
> - - description: Memory region used to map remote RC address space
> - - description: BAR memory region
> + minItems: 6
> + maxItems: 7
>
> reg-names:
> - items:
> - - const: parf
> - - const: dbi
> - - const: elbi
> - - const: atu
> - - const: addr_space
> - - const: mmio
> + minItems: 6
> + maxItems: 7
>
> clocks:
> - minItems: 7
> + minItems: 5
> maxItems: 8
>
> clock-names:
> - minItems: 7
> + minItems: 5
> maxItems: 8
>
> qcom,perst-regs:
> @@ -57,14 +48,12 @@ properties:
> - description: Perst separation enable offset
>
> interrupts:
> - items:
> - - description: PCIe Global interrupt
> - - description: PCIe Doorbell interrupt
> + minItems: 2
> + maxItems: 3
>
> interrupt-names:
> - items:
> - - const: global
> - - const: doorbell
> + minItems: 2
> + maxItems: 3
>
> reset-gpios:
> description: GPIO used as PERST# input signal
> @@ -122,6 +111,51 @@ allOf:
> compatible:
> contains:
> enum:
> + - qcom,sa8775p-pcie-ep
> + then:
> + properties:
> + reg:
> + items:
> + - description: Qualcomm-specific PARF configuration registers
> + - description: DesignWare PCIe registers
> + - description: External local bus interface registers
> + - description: Address Translation Unit (ATU) registers
> + - description: Memory region used to map remote RC address space
> + - description: BAR memory region
> + - description: DMA memory region
It should be described as "DMA register space" or something, because this could
be misinterpreted as memory region for doing DMA.
- Mani
--
மணிவண்ணன் சதாசிவம்
next prev parent reply other threads:[~2023-09-21 8:11 UTC|newest]
Thread overview: 25+ messages / expand[flat|nested] mbox.gz Atom feed top
2023-09-20 13:55 [PATCH v1 0/5] arm64: qcom: sa8775p: add support for EP PCIe Mrinmay Sarkar
2023-09-20 13:55 ` [PATCH v1 1/5] dt-bindings: PCI: qcom-ep: Add support for SA8775P SoC Mrinmay Sarkar
2023-09-21 8:11 ` Manivannan Sadhasivam [this message]
2023-09-21 18:38 ` Rob Herring
2023-10-06 10:54 ` Shazad Hussain
2023-10-11 11:13 ` Mrinmay Sarkar
2023-10-11 11:43 ` Dmitry Baryshkov
2023-10-13 12:55 ` Mrinmay Sarkar
2023-10-13 16:38 ` Dmitry Baryshkov
2023-10-16 4:24 ` Mrinmay Sarkar
2023-10-16 5:19 ` Dmitry Baryshkov
2023-09-20 13:55 ` [PATCH v1 2/5] " Mrinmay Sarkar
2023-09-20 14:24 ` Konrad Dybcio
2023-09-21 8:17 ` Manivannan Sadhasivam
2023-10-13 13:03 ` Mrinmay Sarkar
2023-09-20 13:55 ` [PATCH v1 3/5] phy: qcom-qmp-pcie: add endpoint support for sa8775p Mrinmay Sarkar
2023-09-21 8:39 ` Manivannan Sadhasivam
2023-09-20 13:55 ` [PATCH v1 4/5] PCI: epf-mhi: Add support for SA8775P Mrinmay Sarkar
2023-09-20 14:28 ` Konrad Dybcio
2023-09-21 8:40 ` Manivannan Sadhasivam
2023-10-11 10:39 ` Mrinmay Sarkar
2023-09-20 13:55 ` [PATCH v1 5/5] arm64: dts: qcom: sa8775p: Add ep pcie0 controller node Mrinmay Sarkar
2023-09-21 9:48 ` Manivannan Sadhasivam
2023-10-11 10:44 ` Mrinmay Sarkar
2023-10-11 11:35 ` Konrad Dybcio
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