From: Conor Dooley <conor@kernel.org>
To: Yong-Xuan Wang <yongxuan.wang@sifive.com>
Cc: linux-riscv@lists.infradead.org, kvm-riscv@lists.infradead.org,
greentime.hu@sifive.com, vincent.chen@sifive.com,
tjytimi@163.com, alex@ghiti.fr, Rob Herring <robh+dt@kernel.org>,
Krzysztof Kozlowski <krzysztof.kozlowski+dt@linaro.org>,
Paul Walmsley <paul.walmsley@sifive.com>,
Palmer Dabbelt <palmer@dabbelt.com>,
Albert Ou <aou@eecs.berkeley.edu>,
devicetree@vger.kernel.org, linux-kernel@vger.kernel.org
Subject: Re: [PATCH v2 2/3] dt-bindings: riscv: Add Svadu Entry
Date: Fri, 22 Sep 2023 10:28:04 +0100 [thread overview]
Message-ID: <20230922-bagel-hyphen-aae5b1b88b21@spud> (raw)
In-Reply-To: <20230922085701.3164-3-yongxuan.wang@sifive.com>
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On Fri, Sep 22, 2023 at 08:56:48AM +0000, Yong-Xuan Wang wrote:
> Add an entry for the Svadu extension to the riscv,isa-extensions property.
>
> Signed-off-by: Yong-Xuan Wang <yongxuan.wang@sifive.com>
Acked-by: Conor Dooley <conor.dooley@microchip.com>
Thanks,
Conor.
> ---
> Documentation/devicetree/bindings/riscv/extensions.yaml | 6 ++++++
> 1 file changed, 6 insertions(+)
>
> diff --git a/Documentation/devicetree/bindings/riscv/extensions.yaml b/Documentation/devicetree/bindings/riscv/extensions.yaml
> index cc1f546fdbdc..b5a0aed0165b 100644
> --- a/Documentation/devicetree/bindings/riscv/extensions.yaml
> +++ b/Documentation/devicetree/bindings/riscv/extensions.yaml
> @@ -147,6 +147,12 @@ properties:
> ratified at commit 3f9ed34 ("Add ability to manually trigger
> workflow. (#2)") of riscv-time-compare.
>
> + - const: svadu
> + description: |
> + The standard Svadu supervisor-level extension for hardware updating
> + of PTE A/D bits as frozen at commit b65e07c ("move to Frozen
> + state") of riscv-svadu.
> +
> - const: svinval
> description:
> The standard Svinval supervisor-level extension for fine-grained
> --
> 2.17.1
>
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next prev parent reply other threads:[~2023-09-22 9:28 UTC|newest]
Thread overview: 5+ messages / expand[flat|nested] mbox.gz Atom feed top
[not found] <20230922085701.3164-1-yongxuan.wang@sifive.com>
2023-09-22 8:56 ` [PATCH v2 2/3] dt-bindings: riscv: Add Svadu Entry Yong-Xuan Wang
2023-09-22 9:28 ` Conor Dooley [this message]
2023-09-27 7:04 ` Andrew Jones
2023-09-27 17:24 ` Stefan O'Rear
2023-09-27 18:44 ` Jessica Clarke
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