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From: Conor Dooley <conor@kernel.org>
To: Chen Wang <unicornxw@gmail.com>
Cc: Conor Dooley <conor.dooley@microchip.com>,
	aou@eecs.berkeley.edu, chao.wei@sophgo.com,
	devicetree@vger.kernel.org, emil.renner.berthing@canonical.com,
	guoren@kernel.org, jszhang@kernel.org,
	krzysztof.kozlowski+dt@linaro.org, linux-kernel@vger.kernel.org,
	linux-riscv@lists.infradead.org, palmer@dabbelt.com,
	paul.walmsley@sifive.com, robh+dt@kernel.org,
	xiaoguang.xing@sophgo.com, Chen Wang <wangchen20@iscas.ac.cn>
Subject: Re: [PATCH v2 00/11] Add Milk-V Pioneer RISC-V board support
Date: Fri, 22 Sep 2023 11:50:29 +0100	[thread overview]
Message-ID: <20230922-salvation-splendor-61533091f87b@spud> (raw)
In-Reply-To: <CAHAQgRA+uN2xG=imVe4fuSyGxjDQk-AOo4r5b4bvAcTuEewwiQ@mail.gmail.com>

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On Fri, Sep 22, 2023 at 06:24:25PM +0800, Chen Wang wrote:
> Regards,
> 
> unicornx
> 
> Conor Dooley <conor.dooley@microchip.com> 于2023年9月20日周三 18:01写道:
> >
> > On Wed, Sep 20, 2023 at 02:33:48PM +0800, Chen Wang wrote:
> > > Milk-V Pioneer [1] is a developer motherboard based on SOPHON SG2042 [2]
> > > in a standard mATX form factor. Add minimal device
> > > tree files for the SG2042 SOC and the Milk-V Pioneer board.
> >
> > Please run dtbs_check with W=1 set & fix the below issues:
> >
> > sg2042-cpus.dtsi:1600.25-1607.5: Warning (unit_address_vs_reg): /cpus/l2-cache@0: node has a unit name, but no reg or ranges property
> > sg2042-cpus.dtsi:1609.25-1616.5: Warning (unit_address_vs_reg): /cpus/l2-cache@1: node has a unit name, but no reg or ranges property
> > sg2042-cpus.dtsi:1618.25-1625.5: Warning (unit_address_vs_reg): /cpus/l2-cache@2: node has a unit name, but no reg or ranges property
> > sg2042-cpus.dtsi:1627.25-1634.5: Warning (unit_address_vs_reg): /cpus/l2-cache@3: node has a unit name, but no reg or ranges property
> > sg2042-cpus.dtsi:1636.25-1643.5: Warning (unit_address_vs_reg): /cpus/l2-cache@4: node has a unit name, but no reg or ranges property
> > sg2042-cpus.dtsi:1645.25-1652.5: Warning (unit_address_vs_reg): /cpus/l2-cache@5: node has a unit name, but no reg or ranges property
> > sg2042-cpus.dtsi:1654.25-1661.5: Warning (unit_address_vs_reg): /cpus/l2-cache@6: node has a unit name, but no reg or ranges property
> > sg2042-cpus.dtsi:1663.25-1670.5: Warning (unit_address_vs_reg): /cpus/l2-cache@7: node has a unit name, but no reg or ranges property
> > sg2042-cpus.dtsi:1672.25-1679.5: Warning (unit_address_vs_reg): /cpus/l2-cache@8: node has a unit name, but no reg or ranges property
> > sg2042-cpus.dtsi:1681.25-1688.5: Warning (unit_address_vs_reg): /cpus/l2-cache@9: node has a unit name, but no reg or ranges property
> > sg2042-cpus.dtsi:1690.27-1697.5: Warning (unit_address_vs_reg): /cpus/l2-cache@10: node has a unit name, but no reg or ranges property
> > sg2042-cpus.dtsi:1699.27-1706.5: Warning (unit_address_vs_reg): /cpus/l2-cache@11: node has a unit name, but no reg or ranges property
> > sg2042-cpus.dtsi:1708.27-1715.5: Warning (unit_address_vs_reg): /cpus/l2-cache@12: node has a unit name, but no reg or ranges property
> > sg2042-cpus.dtsi:1717.27-1724.5: Warning (unit_address_vs_reg): /cpus/l2-cache@13: node has a unit name, but no reg or ranges property
> > sg2042-cpus.dtsi:1726.27-1733.5: Warning (unit_address_vs_reg): /cpus/l2-cache@14: node has a unit name, but no reg or ranges property
> > sg2042-cpus.dtsi:1735.27-1742.5: Warning (unit_address_vs_reg): /cpus/l2-cache@15: node has a unit name, but no reg or ranges property
> > sg2042-cpus.dtsi:256.15-275.5: Warning (unique_unit_address_if_enabled): /cpus/cpu@0: duplicate unit-address (also used in node /cpus/l2-cache@0)
> > sg2042-cpus.dtsi:277.15-296.5: Warning (unique_unit_address_if_enabled): /cpus/cpu@1: duplicate unit-address (also used in node /cpus/l2-cache@1)
> > sg2042-cpus.dtsi:298.15-317.5: Warning (unique_unit_address_if_enabled): /cpus/cpu@2: duplicate unit-address (also used in node /cpus/l2-cache@2)
> > sg2042-cpus.dtsi:319.15-338.5: Warning (unique_unit_address_if_enabled): /cpus/cpu@3: duplicate unit-address (also used in node /cpus/l2-cache@3)
> > sg2042-cpus.dtsi:340.15-359.5: Warning (unique_unit_address_if_enabled): /cpus/cpu@4: duplicate unit-address (also used in node /cpus/l2-cache@4)
> > sg2042-cpus.dtsi:361.15-380.5: Warning (unique_unit_address_if_enabled): /cpus/cpu@5: duplicate unit-address (also used in node /cpus/l2-cache@5)
> > sg2042-cpus.dtsi:382.15-401.5: Warning (unique_unit_address_if_enabled): /cpus/cpu@6: duplicate unit-address (also used in node /cpus/l2-cache@6)
> > sg2042-cpus.dtsi:403.15-422.5: Warning (unique_unit_address_if_enabled): /cpus/cpu@7: duplicate unit-address (also used in node /cpus/l2-cache@7)
> > sg2042-cpus.dtsi:424.15-443.5: Warning (unique_unit_address_if_enabled): /cpus/cpu@8: duplicate unit-address (also used in node /cpus/l2-cache@8)
> > sg2042-cpus.dtsi:445.15-464.5: Warning (unique_unit_address_if_enabled): /cpus/cpu@9: duplicate unit-address (also used in node /cpus/l2-cache@9)
> > sg2042-cpus.dtsi:466.17-485.5: Warning (unique_unit_address_if_enabled): /cpus/cpu@10: duplicate unit-address (also used in node /cpus/l2-cache@10)
> > sg2042-cpus.dtsi:487.17-506.5: Warning (unique_unit_address_if_enabled): /cpus/cpu@11: duplicate unit-address (also used in node /cpus/l2-cache@11)
> > sg2042-cpus.dtsi:508.17-527.5: Warning (unique_unit_address_if_enabled): /cpus/cpu@12: duplicate unit-address (also used in node /cpus/l2-cache@12)
> > sg2042-cpus.dtsi:529.17-548.5: Warning (unique_unit_address_if_enabled): /cpus/cpu@13: duplicate unit-address (also used in node /cpus/l2-cache@13)
> > sg2042-cpus.dtsi:550.17-569.5: Warning (unique_unit_address_if_enabled): /cpus/cpu@14: duplicate unit-address (also used in node /cpus/l2-cache@14)
> > sg2042-cpus.dtsi:571.17-590.5: Warning (unique_unit_address_if_enabled): /cpus/cpu@15: duplicate unit-address (also used in node /cpus/l2-cache@15)
> >
> > Thanks,
> > Conor.
> 
> I find the rootcause is due to following code in DTS:
> ```
>                 l2_cache0: l2-cache@0 {
>                         compatible = "cache";
>                         cache-block-size = <64>;
>                         cache-level = <2>;
>                         cache-size = <1048576>;
>                         cache-sets = <1024>;
>                         cache-unified;
>                 };
> ```
> To differ 16 l2-cache controller, we add <unit-address>, but due to
> the l2-cache controller on sg2042 has no address, no reg property is
> added here. That's why dtbs_check warns "node has a unit name, but no
> reg or ranges property". I just double-confirmed with sophgo
> engineers, they  told me there is really no address for the cache
> controller for sg2042.
> 
> One solution I use here is to provide unique name for the l2-cache
> node. I learn this from  "arch/arm64/boot/dts/hisilicon/hi3660.dtsi"
> and seems this work and pass dtbs_check with W=1. For example:
> ```
>                 l2_cache0: l2-cache0 {
>                         compatible = "cache";
>                         cache-block-size = <64>;
>                         cache-level = <2>;
>                         cache-size = <1048576>;
>                         cache-sets = <1024>;
>                         cache-unified;
>                 };
> 
>                 l2_cache1: l2-cache1 {
>                         compatible = "cache";
>                         cache-block-size = <64>;
>                         cache-level = <2>;
>                         cache-size = <1048576>;
>                         cache-sets = <1024>;
>                         cache-unified;
>                 };
>                 ......
> ```
> But I remember as mentioned in
> https://devicetree-specification.readthedocs.io/en/latest/chapter2-devicetree-basics.html#generic-names-recommendation,
> node names should be generic. So I have two questions here:
> - Should I use "cache-controller" instead of "l2-cache", though I see
> "l2-cache" is used in many places but not listed in
> devicetree-specification.
> - Even if I replace "l2-cache" with "cache-controller", I think
> "cache-controller0", "cache-controller1" ... are not generic name, but
> due to sg2042 does not have address for cache controller, how to
> handle this problem?

I would go for "cache-controller-0" "cache-controller-1". Close as
possible to the generic node name while having the required differences
between nodes. There's already some examples in-tree (eg renesas) that
do this.

Thanks,
Conor.

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  reply	other threads:[~2023-09-22 10:50 UTC|newest]

Thread overview: 67+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2023-09-20  6:33 [PATCH v2 00/11] Add Milk-V Pioneer RISC-V board support Chen Wang
2023-09-20  6:34 ` [PATCH v2 01/11] riscv: Add SOPHGO SOC family Kconfig support Chen Wang
2023-09-20  7:34   ` Guo Ren
2023-09-20  8:21   ` Conor Dooley
2023-09-20  6:37 ` [PATCH v2 02/11] dt-bindings: vendor-prefixes: add milkv/sophgo Chen Wang
2023-09-20  7:38   ` Guo Ren
2023-09-20  8:22   ` Conor Dooley
2023-09-20  9:14     ` Chen Wang
2023-09-20  6:37 ` [PATCH v2 03/11] dt-bindings: riscv: add sophgo sg2042 bindings Chen Wang
2023-09-20  7:43   ` Guo Ren
2023-09-20  8:28   ` Conor Dooley
2023-09-21 10:21     ` Chen Wang
2023-09-21 12:18       ` Conor Dooley
2023-09-21 13:40         ` Chen Wang
2023-09-21 13:51         ` Chen Wang
2023-09-21 14:00           ` Conor Dooley
2023-09-22  1:48     ` Chen Wang
2023-09-20 11:55   ` Krzysztof Kozlowski
2023-09-20 12:03     ` 汪辰
2023-09-21  0:48       ` Jisheng Zhang
2023-09-20  6:38 ` [PATCH v2 04/11] dt-bindings: riscv: Add T-HEAD C920 compatibles Chen Wang
2023-09-20  7:44   ` Guo Ren
2023-09-20  8:37   ` Conor Dooley
2023-09-20  6:39 ` [PATCH v2 05/11] dt-bindings: interrupt-controller: Add SOPHGO's SG2042 PLIC Chen Wang
2023-09-20  7:45   ` Guo Ren
2023-09-20  8:57   ` Conor Dooley
2023-09-20  6:39 ` [PATCH v2 06/11] dt-bindings: timer: Add Sophgo sg2042 clint Chen Wang
2023-09-20  8:12   ` Guo Ren
2023-09-20  8:50   ` Conor Dooley
2023-09-20 11:57   ` Krzysztof Kozlowski
2023-09-20  6:39 ` [PATCH v2 07/11] dt-bindings: serial: snps-dw-apb-uart: Add Sophgo SG2042 uarts Chen Wang
2023-09-20  7:51   ` Guo Ren
2023-09-20  8:37   ` Conor Dooley
2023-09-20  6:40 ` [PATCH v2 08/11] serial: 8250_dw: Add Sophgo SG2042 support Chen Wang
2023-09-20  7:53   ` Guo Ren
2023-09-20  8:05     ` Chen Wang
2023-09-20  8:08       ` Guo Ren
2023-09-22  9:41   ` Ben Dooks
2023-09-22 10:40     ` Emil Renner Berthing
2023-09-22 11:39       ` Chen Wang
2023-09-26  7:38       ` Chen Wang
2023-09-20  6:40 ` [PATCH v2 09/11] riscv: dts: add initial SOPHGO SG2042 SoC device tree Chen Wang
2023-09-20  8:04   ` Guo Ren
2023-09-20  8:57   ` Conor Dooley
2023-09-21  9:56     ` Chen Wang
2023-09-21 10:15       ` Conor Dooley
2023-09-21 10:27         ` Chen Wang
2023-09-21 12:06           ` Conor Dooley
2023-09-20 11:32   ` Emil Renner Berthing
2023-09-20 12:09     ` 汪辰
2023-09-20 12:32       ` Emil Renner Berthing
2023-09-20 12:37         ` 汪辰
2023-09-20 15:19   ` Palmer Dabbelt
2023-09-20 15:31     ` Conor Dooley
2023-09-20  6:40 ` [PATCH v2 10/11] riscv: dts: sophgo: add Milk-V Pioneer board " Chen Wang
2023-09-20  8:05   ` Guo Ren
2023-09-20  8:16   ` Conor Dooley
2023-09-20 11:59   ` Krzysztof Kozlowski
2023-09-20  6:41 ` [PATCH v2 11/11] riscv: defconfig: enable SOPHGO SoC Chen Wang
2023-09-20  8:06   ` Guo Ren
2023-09-20  8:58   ` Conor Dooley
2023-09-20 10:01 ` [PATCH v2 00/11] Add Milk-V Pioneer RISC-V board support Conor Dooley
2023-09-22 10:24   ` Chen Wang
2023-09-22 10:50     ` Conor Dooley [this message]
2023-09-22 11:28       ` Chen Wang
2023-09-20 15:22 ` Palmer Dabbelt
2023-09-26 10:29   ` Chen Wang

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