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Date: Sun, 24 Sep 2023 21:57:16 +0800
From: Shawn Guo <shawnguo@kernel.org>
To: Marek Vasut <marex@denx.de>
Cc: linux-arm-kernel@lists.infradead.org,
	Conor Dooley <conor+dt@kernel.org>,
	Fabio Estevam <festevam@gmail.com>,
	Krzysztof Kozlowski <krzysztof.kozlowski+dt@linaro.org>,
	NXP Linux Team <linux-imx@nxp.com>,
	Pengutronix Kernel Team <kernel@pengutronix.de>,
	Rob Herring <robh+dt@kernel.org>,
	Sascha Hauer <s.hauer@pengutronix.de>, devicetree@vger.kernel.org
Subject: Re: [PATCH] arm64: dts: imx8mp: Switch PCIe to HSIO PLL on i.MX8MP
 DHCOM PDK2 and generate clock from SoC
Message-ID: <20230924135716.GK7231@dragon>
References: <20230822005007.128571-1-marex@denx.de>
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In-Reply-To: <20230822005007.128571-1-marex@denx.de>

On Tue, Aug 22, 2023 at 02:50:07AM +0200, Marek Vasut wrote:
> The PDK2 carrier board had to be manually patched to obtain working PCIe
> with the i.MX8MP DHCOM SoM so far, because the PCIe clock generator has
> not been connected to the PCIe block REF_PAD_CLK inputs.
> 
> Switch to use of HSIO PLL as the clock source for the PCIe block instead,
> and use the REF_PAD_CLK as outputs to generate PCIe clock from the SoC.
> This way, it is not necessary to patch the PDK2 in any way to obtain a
> working PCIe.
> 
> Note that PDK3 has PCIe clock generator always connected to REF_PAD_CLK
> and is not affected.
> 
> Signed-off-by: Marek Vasut <marex@denx.de>

Applied, thanks!