From: Frank Li <Frank.Li@nxp.com>
To: frank.li@nxp.com, shawnguo@kernel.org
Cc: clin@suse.com, conor+dt@kernel.org, devicetree@vger.kernel.org,
eagle.zhou@nxp.com, festevam@gmail.com, imx@lists.linux.dev,
joy.zou@nxp.com, kernel@pengutronix.de,
krzysztof.kozlowski+dt@linaro.org, leoyang.li@nxp.com,
linux-arm-kernel@lists.infradead.org, linux-imx@nxp.com,
linux-kernel@vger.kernel.org, pierre.gondois@arm.com,
robh+dt@kernel.org, s.hauer@pengutronix.de, shenwei.wang@nxp.com,
sherry.sun@nxp.com
Subject: [PATCH v2 3/7] arm64: dts: imx8: add edma for uart[0..3]
Date: Mon, 25 Sep 2023 16:49:09 -0400 [thread overview]
Message-ID: <20230925204913.3776656-4-Frank.Li@nxp.com> (raw)
In-Reply-To: <20230925204913.3776656-1-Frank.Li@nxp.com>
Add dma support uart[0..3].
Signed-off-by: Frank Li <Frank.Li@nxp.com>
---
arch/arm64/boot/dts/freescale/imx8-ss-dma.dtsi | 8 ++++++++
1 file changed, 8 insertions(+)
diff --git a/arch/arm64/boot/dts/freescale/imx8-ss-dma.dtsi b/arch/arm64/boot/dts/freescale/imx8-ss-dma.dtsi
index 0519edd3f520..8fd924dfb029 100644
--- a/arch/arm64/boot/dts/freescale/imx8-ss-dma.dtsi
+++ b/arch/arm64/boot/dts/freescale/imx8-ss-dma.dtsi
@@ -93,6 +93,8 @@ lpuart0: serial@5a060000 {
assigned-clocks = <&clk IMX_SC_R_UART_0 IMX_SC_PM_CLK_PER>;
assigned-clock-rates = <80000000>;
power-domains = <&pd IMX_SC_R_UART_0>;
+ dma-names = "tx","rx";
+ dmas = <&edma2 9 0 0>, <&edma2 8 0 1>;
status = "disabled";
};
@@ -105,6 +107,8 @@ lpuart1: serial@5a070000 {
assigned-clocks = <&clk IMX_SC_R_UART_1 IMX_SC_PM_CLK_PER>;
assigned-clock-rates = <80000000>;
power-domains = <&pd IMX_SC_R_UART_1>;
+ dma-names = "tx","rx";
+ dmas = <&edma2 11 0 0>, <&edma2 10 0 1>;
status = "disabled";
};
@@ -117,6 +121,8 @@ lpuart2: serial@5a080000 {
assigned-clocks = <&clk IMX_SC_R_UART_2 IMX_SC_PM_CLK_PER>;
assigned-clock-rates = <80000000>;
power-domains = <&pd IMX_SC_R_UART_2>;
+ dma-names = "tx","rx";
+ dmas = <&edma2 13 0 0>, <&edma2 12 0 1>;
status = "disabled";
};
@@ -129,6 +135,8 @@ lpuart3: serial@5a090000 {
assigned-clocks = <&clk IMX_SC_R_UART_3 IMX_SC_PM_CLK_PER>;
assigned-clock-rates = <80000000>;
power-domains = <&pd IMX_SC_R_UART_3>;
+ dma-names = "tx","rx";
+ dmas = <&edma2 15 0 0>, <&edma2 14 0 1>;
status = "disabled";
};
--
2.34.1
next prev parent reply other threads:[~2023-09-25 20:49 UTC|newest]
Thread overview: 9+ messages / expand[flat|nested] mbox.gz Atom feed top
2023-09-25 20:49 [PATCH v2 0/7] arm64: dts: imx8qxp add emda support Frank Li
2023-09-25 20:49 ` [PATCH v2 1/7] genpd: imx: scu-pd: fixed dma2-ch domain defination Frank Li
2023-09-25 20:49 ` [PATCH v2 2/7] arm64: dts: imx8: add edma[0..3] Frank Li
2023-09-25 20:49 ` Frank Li [this message]
2023-09-25 20:49 ` [PATCH v2 4/7] arm64: dts: imx8qm: Update edma channel for uart[0..3] Frank Li
2023-09-25 20:49 ` [PATCH v2 5/7] arm64: dts: imx8: update lpuart[0..3] irq number Frank Li
2023-09-25 20:49 ` [PATCH v2 6/7] arm64: dts: imx8qxp-mek: enable 8qxp lpuart2 and lpuart3 Frank Li
2023-09-25 20:49 ` [PATCH v2 7/7] arm64: dts: imx8qm-mek: enable 8qm " Frank Li
2023-10-09 13:28 ` [PATCH v2 0/7] arm64: dts: imx8qxp add emda support Shawn Guo
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