* [PATCH v5 1/7] arm64: dts: ti: k3-j721s2: Add ESM instances
2023-09-26 13:27 [PATCH v5 0/7] arm64: ti: k3-j7: Add the ESM & main domain watchdog nodes Keerthy
@ 2023-09-26 13:27 ` Keerthy
2023-09-26 13:28 ` [PATCH v5 2/7] arm64: dts: ti: k3-j784s4: " Keerthy
` (5 subsequent siblings)
6 siblings, 0 replies; 14+ messages in thread
From: Keerthy @ 2023-09-26 13:27 UTC (permalink / raw)
To: robh+dt, nm, vigneshr, conor+dt, kristo, krzysztof.kozlowski+dt
Cc: j-keerthy, u-kumar1, linux-arm-kernel, devicetree, linux-kernel
Patch adds the ESM instances for j721s2. It has 3 instances.
One in the main domain and two in the mcu-wakeup domian.
Signed-off-by: Keerthy <j-keerthy@ti.com>
---
arch/arm64/boot/dts/ti/k3-j721s2-main.dtsi | 7 +++++++
arch/arm64/boot/dts/ti/k3-j721s2-mcu-wakeup.dtsi | 14 ++++++++++++++
2 files changed, 21 insertions(+)
diff --git a/arch/arm64/boot/dts/ti/k3-j721s2-main.dtsi b/arch/arm64/boot/dts/ti/k3-j721s2-main.dtsi
index 084f8f5b6699..8a717b592238 100644
--- a/arch/arm64/boot/dts/ti/k3-j721s2-main.dtsi
+++ b/arch/arm64/boot/dts/ti/k3-j721s2-main.dtsi
@@ -1695,4 +1695,11 @@
dss_ports: ports {
};
};
+
+ main_esm: esm@700000 {
+ compatible = "ti,j721e-esm";
+ reg = <0x00 0x700000 0x00 0x1000>;
+ ti,esm-pins = <688>, <689>;
+ bootph-pre-ram;
+ };
};
diff --git a/arch/arm64/boot/dts/ti/k3-j721s2-mcu-wakeup.dtsi b/arch/arm64/boot/dts/ti/k3-j721s2-mcu-wakeup.dtsi
index 2ddad9318554..4b29418a6076 100644
--- a/arch/arm64/boot/dts/ti/k3-j721s2-mcu-wakeup.dtsi
+++ b/arch/arm64/boot/dts/ti/k3-j721s2-mcu-wakeup.dtsi
@@ -655,4 +655,18 @@
power-domains = <&k3_pds 154 TI_SCI_PD_SHARED>;
#thermal-sensor-cells = <1>;
};
+
+ mcu_esm: esm@40800000 {
+ compatible = "ti,j721e-esm";
+ reg = <0x00 0x40800000 0x00 0x1000>;
+ ti,esm-pins = <95>;
+ bootph-pre-ram;
+ };
+
+ wkup_esm: esm@42080000 {
+ compatible = "ti,j721e-esm";
+ reg = <0x00 0x42080000 0x00 0x1000>;
+ ti,esm-pins = <63>;
+ bootph-pre-ram;
+ };
};
--
2.17.1
^ permalink raw reply related [flat|nested] 14+ messages in thread* [PATCH v5 2/7] arm64: dts: ti: k3-j784s4: Add ESM instances
2023-09-26 13:27 [PATCH v5 0/7] arm64: ti: k3-j7: Add the ESM & main domain watchdog nodes Keerthy
2023-09-26 13:27 ` [PATCH v5 1/7] arm64: dts: ti: k3-j721s2: Add ESM instances Keerthy
@ 2023-09-26 13:28 ` Keerthy
2023-09-26 13:28 ` [PATCH v5 3/7] arm64: dts: ti: k3-j7200: Add MCU domain ESM instance Keerthy
` (4 subsequent siblings)
6 siblings, 0 replies; 14+ messages in thread
From: Keerthy @ 2023-09-26 13:28 UTC (permalink / raw)
To: robh+dt, nm, vigneshr, conor+dt, kristo, krzysztof.kozlowski+dt
Cc: j-keerthy, u-kumar1, linux-arm-kernel, devicetree, linux-kernel
Patch adds the ESM instances for j784s4. It has 3 instances.
One in the main domain and two in the mcu-wakeup domian.
Signed-off-by: Keerthy <j-keerthy@ti.com>
---
arch/arm64/boot/dts/ti/k3-j784s4-main.dtsi | 8 ++++++++
arch/arm64/boot/dts/ti/k3-j784s4-mcu-wakeup.dtsi | 14 ++++++++++++++
2 files changed, 22 insertions(+)
diff --git a/arch/arm64/boot/dts/ti/k3-j784s4-main.dtsi b/arch/arm64/boot/dts/ti/k3-j784s4-main.dtsi
index efed2d683f63..26dc3776f911 100644
--- a/arch/arm64/boot/dts/ti/k3-j784s4-main.dtsi
+++ b/arch/arm64/boot/dts/ti/k3-j784s4-main.dtsi
@@ -1568,4 +1568,12 @@
firmware-name = "j784s4-c71_3-fw";
status = "disabled";
};
+
+ main_esm: esm@700000 {
+ compatible = "ti,j721e-esm";
+ reg = <0x00 0x700000 0x00 0x1000>;
+ ti,esm-pins = <688>, <689>, <690>, <691>, <692>, <693>, <694>,
+ <695>;
+ bootph-pre-ram;
+ };
};
diff --git a/arch/arm64/boot/dts/ti/k3-j784s4-mcu-wakeup.dtsi b/arch/arm64/boot/dts/ti/k3-j784s4-mcu-wakeup.dtsi
index 4ab4018d3695..a7b5c4cb7d3e 100644
--- a/arch/arm64/boot/dts/ti/k3-j784s4-mcu-wakeup.dtsi
+++ b/arch/arm64/boot/dts/ti/k3-j784s4-mcu-wakeup.dtsi
@@ -700,4 +700,18 @@
status = "disabled";
};
};
+
+ mcu_esm: esm@40800000 {
+ compatible = "ti,j721e-esm";
+ reg = <0x00 0x40800000 0x00 0x1000>;
+ ti,esm-pins = <95>;
+ bootph-pre-ram;
+ };
+
+ wkup_esm: esm@42080000 {
+ compatible = "ti,j721e-esm";
+ reg = <0x00 0x42080000 0x00 0x1000>;
+ ti,esm-pins = <63>;
+ bootph-pre-ram;
+ };
};
--
2.17.1
^ permalink raw reply related [flat|nested] 14+ messages in thread* [PATCH v5 3/7] arm64: dts: ti: k3-j7200: Add MCU domain ESM instance
2023-09-26 13:27 [PATCH v5 0/7] arm64: ti: k3-j7: Add the ESM & main domain watchdog nodes Keerthy
2023-09-26 13:27 ` [PATCH v5 1/7] arm64: dts: ti: k3-j721s2: Add ESM instances Keerthy
2023-09-26 13:28 ` [PATCH v5 2/7] arm64: dts: ti: k3-j784s4: " Keerthy
@ 2023-09-26 13:28 ` Keerthy
2023-09-26 13:28 ` [PATCH v5 4/7] arm64: dts: ti: k3-j784s4-main: Add the main domain watchdog instances Keerthy
` (3 subsequent siblings)
6 siblings, 0 replies; 14+ messages in thread
From: Keerthy @ 2023-09-26 13:28 UTC (permalink / raw)
To: robh+dt, nm, vigneshr, conor+dt, kristo, krzysztof.kozlowski+dt
Cc: j-keerthy, u-kumar1, linux-arm-kernel, devicetree, linux-kernel
Patch adds the ESM instance for MCU domian of j7200.
Signed-off-by: Keerthy <j-keerthy@ti.com>
---
arch/arm64/boot/dts/ti/k3-j7200-mcu-wakeup.dtsi | 7 +++++++
1 file changed, 7 insertions(+)
diff --git a/arch/arm64/boot/dts/ti/k3-j7200-mcu-wakeup.dtsi b/arch/arm64/boot/dts/ti/k3-j7200-mcu-wakeup.dtsi
index 6ffaf85fa63f..711690c0cba4 100644
--- a/arch/arm64/boot/dts/ti/k3-j7200-mcu-wakeup.dtsi
+++ b/arch/arm64/boot/dts/ti/k3-j7200-mcu-wakeup.dtsi
@@ -637,4 +637,11 @@
power-domains = <&k3_pds 154 TI_SCI_PD_EXCLUSIVE>;
#thermal-sensor-cells = <1>;
};
+
+ mcu_esm: esm@40800000 {
+ compatible = "ti,j721e-esm";
+ reg = <0x00 0x40800000 0x00 0x1000>;
+ ti,esm-pins = <95>;
+ bootph-pre-ram;
+ };
};
--
2.17.1
^ permalink raw reply related [flat|nested] 14+ messages in thread* [PATCH v5 4/7] arm64: dts: ti: k3-j784s4-main: Add the main domain watchdog instances
2023-09-26 13:27 [PATCH v5 0/7] arm64: ti: k3-j7: Add the ESM & main domain watchdog nodes Keerthy
` (2 preceding siblings ...)
2023-09-26 13:28 ` [PATCH v5 3/7] arm64: dts: ti: k3-j7200: Add MCU domain ESM instance Keerthy
@ 2023-09-26 13:28 ` Keerthy
2023-09-26 17:12 ` Nishanth Menon
2023-09-27 7:54 ` Krzysztof Kozlowski
2023-09-26 13:28 ` [PATCH v5 5/7] arm64: dts: ti: k3-j784s4-mcu: Add the mcu " Keerthy
` (2 subsequent siblings)
6 siblings, 2 replies; 14+ messages in thread
From: Keerthy @ 2023-09-26 13:28 UTC (permalink / raw)
To: robh+dt, nm, vigneshr, conor+dt, kristo, krzysztof.kozlowski+dt
Cc: j-keerthy, u-kumar1, linux-arm-kernel, devicetree, linux-kernel
There are totally 19 instances of watchdog module. One each for the
8 A72 cores, one each for the 4 C7x cores, 1 for the GPU, 1 each
for the 6 R5F cores in the main domain. Keeping only the A72 instances
enabled and disabling the rest by default.
Signed-off-by: Keerthy <j-keerthy@ti.com>
---
arch/arm64/boot/dts/ti/k3-j784s4-main.dtsi | 182 +++++++++++++++++++++
1 file changed, 182 insertions(+)
diff --git a/arch/arm64/boot/dts/ti/k3-j784s4-main.dtsi b/arch/arm64/boot/dts/ti/k3-j784s4-main.dtsi
index 26dc3776f911..8c3efe066803 100644
--- a/arch/arm64/boot/dts/ti/k3-j784s4-main.dtsi
+++ b/arch/arm64/boot/dts/ti/k3-j784s4-main.dtsi
@@ -1576,4 +1576,186 @@
<695>;
bootph-pre-ram;
};
+
+ watchdog0: watchdog@2200000 {
+ compatible = "ti,j7-rti-wdt";
+ reg = <0x00 0x2200000 0x00 0x100>;
+ clocks = <&k3_clks 348 1>;
+ power-domains = <&k3_pds 348 TI_SCI_PD_EXCLUSIVE>;
+ assigned-clocks = <&k3_clks 348 0>;
+ assigned-clock-parents = <&k3_clks 348 4>;
+ };
+
+ watchdog1: watchdog@2210000 {
+ compatible = "ti,j7-rti-wdt";
+ reg = <0x00 0x2210000 0x00 0x100>;
+ clocks = <&k3_clks 349 1>;
+ power-domains = <&k3_pds 349 TI_SCI_PD_EXCLUSIVE>;
+ assigned-clocks = <&k3_clks 349 0>;
+ assigned-clock-parents = <&k3_clks 349 4>;
+ };
+
+ watchdog2: watchdog@2220000 {
+ compatible = "ti,j7-rti-wdt";
+ reg = <0x00 0x2220000 0x00 0x100>;
+ clocks = <&k3_clks 350 1>;
+ power-domains = <&k3_pds 350 TI_SCI_PD_EXCLUSIVE>;
+ assigned-clocks = <&k3_clks 350 0>;
+ assigned-clock-parents = <&k3_clks 350 4>;
+ };
+
+ watchdog3: watchdog@2230000 {
+ compatible = "ti,j7-rti-wdt";
+ reg = <0x00 0x2230000 0x00 0x100>;
+ clocks = <&k3_clks 351 1>;
+ power-domains = <&k3_pds 351 TI_SCI_PD_EXCLUSIVE>;
+ assigned-clocks = <&k3_clks 351 0>;
+ assigned-clock-parents = <&k3_clks 351 4>;
+ };
+
+ watchdog4: watchdog@2240000 {
+ compatible = "ti,j7-rti-wdt";
+ reg = <0x00 0x2240000 0x00 0x100>;
+ clocks = <&k3_clks 352 1>;
+ power-domains = <&k3_pds 352 TI_SCI_PD_EXCLUSIVE>;
+ assigned-clocks = <&k3_clks 352 0>;
+ assigned-clock-parents = <&k3_clks 352 4>;
+ };
+
+ watchdog5: watchdog@2250000 {
+ compatible = "ti,j7-rti-wdt";
+ reg = <0x00 0x2250000 0x00 0x100>;
+ clocks = <&k3_clks 353 1>;
+ power-domains = <&k3_pds 353 TI_SCI_PD_EXCLUSIVE>;
+ assigned-clocks = <&k3_clks 353 0>;
+ assigned-clock-parents = <&k3_clks 353 4>;
+ };
+
+ watchdog6: watchdog@2260000 {
+ compatible = "ti,j7-rti-wdt";
+ reg = <0x00 0x2260000 0x00 0x100>;
+ clocks = <&k3_clks 354 1>;
+ power-domains = <&k3_pds 354 TI_SCI_PD_EXCLUSIVE>;
+ assigned-clocks = <&k3_clks 354 0>;
+ assigned-clock-parents = <&k3_clks 354 4>;
+ };
+
+ watchdog7: watchdog@2270000 {
+ compatible = "ti,j7-rti-wdt";
+ reg = <0x00 0x2270000 0x00 0x100>;
+ clocks = <&k3_clks 355 1>;
+ power-domains = <&k3_pds 355 TI_SCI_PD_EXCLUSIVE>;
+ assigned-clocks = <&k3_clks 355 0>;
+ assigned-clock-parents = <&k3_clks 355 4>;
+ };
+
+ watchdog16: watchdog@2300000 {
+ status = "disabled";
+ compatible = "ti,j7-rti-wdt";
+ reg = <0x00 0x2300000 0x00 0x100>;
+ clocks = <&k3_clks 356 1>;
+ power-domains = <&k3_pds 356 TI_SCI_PD_EXCLUSIVE>;
+ assigned-clocks = <&k3_clks 356 0>;
+ assigned-clock-parents = <&k3_clks 356 4>;
+ };
+
+ watchdog17: watchdog@2310000 {
+ status = "disabled";
+ compatible = "ti,j7-rti-wdt";
+ reg = <0x00 0x2310000 0x00 0x100>;
+ clocks = <&k3_clks 357 1>;
+ power-domains = <&k3_pds 357 TI_SCI_PD_EXCLUSIVE>;
+ assigned-clocks = <&k3_clks 357 0>;
+ assigned-clock-parents = <&k3_clks 357 4>;
+ };
+
+ watchdog18: watchdog@2320000 {
+ status = "disabled";
+ compatible = "ti,j7-rti-wdt";
+ reg = <0x00 0x2320000 0x00 0x100>;
+ clocks = <&k3_clks 358 1>;
+ power-domains = <&k3_pds 358 TI_SCI_PD_EXCLUSIVE>;
+ assigned-clocks = <&k3_clks 358 0>;
+ assigned-clock-parents = <&k3_clks 358 4>;
+ };
+
+ watchdog19: watchdog@2330000 {
+ status = "disabled";
+ compatible = "ti,j7-rti-wdt";
+ reg = <0x00 0x2330000 0x00 0x100>;
+ clocks = <&k3_clks 359 1>;
+ power-domains = <&k3_pds 359 TI_SCI_PD_EXCLUSIVE>;
+ assigned-clocks = <&k3_clks 359 0>;
+ assigned-clock-parents = <&k3_clks 359 4>;
+ };
+
+ watchdog15: watchdog@22f0000 {
+ status = "disabled";
+ compatible = "ti,j7-rti-wdt";
+ reg = <0x00 0x22f0000 0x00 0x100>;
+ clocks = <&k3_clks 360 1>;
+ power-domains = <&k3_pds 360 TI_SCI_PD_EXCLUSIVE>;
+ assigned-clocks = <&k3_clks 360 0>;
+ assigned-clock-parents = <&k3_clks 360 4>;
+ };
+
+ watchdog28: watchdog@23c0000 {
+ status = "disabled";
+ compatible = "ti,j7-rti-wdt";
+ reg = <0x00 0x23c0000 0x00 0x100>;
+ clocks = <&k3_clks 361 1>;
+ power-domains = <&k3_pds 361 TI_SCI_PD_EXCLUSIVE>;
+ assigned-clocks = <&k3_clks 361 0>;
+ assigned-clock-parents = <&k3_clks 361 4>;
+ };
+
+ watchdog29: watchdog@23d0000 {
+ status = "disabled";
+ compatible = "ti,j7-rti-wdt";
+ reg = <0x00 0x23d0000 0x00 0x100>;
+ clocks = <&k3_clks 362 1>;
+ power-domains = <&k3_pds 362 TI_SCI_PD_EXCLUSIVE>;
+ assigned-clocks = <&k3_clks 362 0>;
+ assigned-clock-parents = <&k3_clks 362 4>;
+ };
+
+ watchdog30: watchdog@23e0000 {
+ status = "disabled";
+ compatible = "ti,j7-rti-wdt";
+ reg = <0x00 0x23e0000 0x00 0x100>;
+ clocks = <&k3_clks 363 1>;
+ power-domains = <&k3_pds 363 TI_SCI_PD_EXCLUSIVE>;
+ assigned-clocks = <&k3_clks 363 0>;
+ assigned-clock-parents = <&k3_clks 363 4>;
+ };
+
+ watchdog31: watchdog@23f0000 {
+ status = "disabled";
+ compatible = "ti,j7-rti-wdt";
+ reg = <0x00 0x23f0000 0x00 0x100>;
+ clocks = <&k3_clks 364 1>;
+ power-domains = <&k3_pds 364 TI_SCI_PD_EXCLUSIVE>;
+ assigned-clocks = <&k3_clks 364 0>;
+ assigned-clock-parents = <&k3_clks 364 4>;
+ };
+
+ watchdog32: watchdog@2540000 {
+ status = "disabled";
+ compatible = "ti,j7-rti-wdt";
+ reg = <0x00 0x2540000 0x00 0x100>;
+ clocks = <&k3_clks 365 1>;
+ power-domains = <&k3_pds 365 TI_SCI_PD_EXCLUSIVE>;
+ assigned-clocks = <&k3_clks 365 0>;
+ assigned-clock-parents = <&k3_clks 366 4>;
+ };
+
+ watchdog33: watchdog@2550000 {
+ status = "disabled";
+ compatible = "ti,j7-rti-wdt";
+ reg = <0x00 0x2550000 0x00 0x100>;
+ clocks = <&k3_clks 366 1>;
+ power-domains = <&k3_pds 366 TI_SCI_PD_EXCLUSIVE>;
+ assigned-clocks = <&k3_clks 366 0>;
+ assigned-clock-parents = <&k3_clks 366 4>;
+ };
};
--
2.17.1
^ permalink raw reply related [flat|nested] 14+ messages in thread* Re: [PATCH v5 4/7] arm64: dts: ti: k3-j784s4-main: Add the main domain watchdog instances
2023-09-26 13:28 ` [PATCH v5 4/7] arm64: dts: ti: k3-j784s4-main: Add the main domain watchdog instances Keerthy
@ 2023-09-26 17:12 ` Nishanth Menon
2023-09-27 2:33 ` J, KEERTHY
2023-09-27 7:54 ` Krzysztof Kozlowski
1 sibling, 1 reply; 14+ messages in thread
From: Nishanth Menon @ 2023-09-26 17:12 UTC (permalink / raw)
To: Keerthy
Cc: robh+dt, vigneshr, conor+dt, kristo, krzysztof.kozlowski+dt,
u-kumar1, linux-arm-kernel, devicetree, linux-kernel
On 18:58-20230926, Keerthy wrote:
> There are totally 19 instances of watchdog module. One each for the
> 8 A72 cores, one each for the 4 C7x cores, 1 for the GPU, 1 each
> for the 6 R5F cores in the main domain. Keeping only the A72 instances
> enabled and disabling the rest by default.
>
> Signed-off-by: Keerthy <j-keerthy@ti.com>
> ---
> arch/arm64/boot/dts/ti/k3-j784s4-main.dtsi | 182 +++++++++++++++++++++
> 1 file changed, 182 insertions(+)
>
> diff --git a/arch/arm64/boot/dts/ti/k3-j784s4-main.dtsi b/arch/arm64/boot/dts/ti/k3-j784s4-main.dtsi
> index 26dc3776f911..8c3efe066803 100644
> --- a/arch/arm64/boot/dts/ti/k3-j784s4-main.dtsi
> +++ b/arch/arm64/boot/dts/ti/k3-j784s4-main.dtsi
> @@ -1576,4 +1576,186 @@
> <695>;
> bootph-pre-ram;
> };
> +
> + watchdog0: watchdog@2200000 {
> + compatible = "ti,j7-rti-wdt";
> + reg = <0x00 0x2200000 0x00 0x100>;
> + clocks = <&k3_clks 348 1>;
> + power-domains = <&k3_pds 348 TI_SCI_PD_EXCLUSIVE>;
> + assigned-clocks = <&k3_clks 348 0>;
> + assigned-clock-parents = <&k3_clks 348 4>;
> + };
> +
> + watchdog1: watchdog@2210000 {
> + compatible = "ti,j7-rti-wdt";
> + reg = <0x00 0x2210000 0x00 0x100>;
> + clocks = <&k3_clks 349 1>;
> + power-domains = <&k3_pds 349 TI_SCI_PD_EXCLUSIVE>;
> + assigned-clocks = <&k3_clks 349 0>;
> + assigned-clock-parents = <&k3_clks 349 4>;
> + };
> +
> + watchdog2: watchdog@2220000 {
> + compatible = "ti,j7-rti-wdt";
> + reg = <0x00 0x2220000 0x00 0x100>;
> + clocks = <&k3_clks 350 1>;
> + power-domains = <&k3_pds 350 TI_SCI_PD_EXCLUSIVE>;
> + assigned-clocks = <&k3_clks 350 0>;
> + assigned-clock-parents = <&k3_clks 350 4>;
> + };
> +
> + watchdog3: watchdog@2230000 {
> + compatible = "ti,j7-rti-wdt";
> + reg = <0x00 0x2230000 0x00 0x100>;
> + clocks = <&k3_clks 351 1>;
> + power-domains = <&k3_pds 351 TI_SCI_PD_EXCLUSIVE>;
> + assigned-clocks = <&k3_clks 351 0>;
> + assigned-clock-parents = <&k3_clks 351 4>;
> + };
> +
> + watchdog4: watchdog@2240000 {
> + compatible = "ti,j7-rti-wdt";
> + reg = <0x00 0x2240000 0x00 0x100>;
> + clocks = <&k3_clks 352 1>;
> + power-domains = <&k3_pds 352 TI_SCI_PD_EXCLUSIVE>;
> + assigned-clocks = <&k3_clks 352 0>;
> + assigned-clock-parents = <&k3_clks 352 4>;
> + };
> +
> + watchdog5: watchdog@2250000 {
> + compatible = "ti,j7-rti-wdt";
> + reg = <0x00 0x2250000 0x00 0x100>;
> + clocks = <&k3_clks 353 1>;
> + power-domains = <&k3_pds 353 TI_SCI_PD_EXCLUSIVE>;
> + assigned-clocks = <&k3_clks 353 0>;
> + assigned-clock-parents = <&k3_clks 353 4>;
> + };
> +
> + watchdog6: watchdog@2260000 {
> + compatible = "ti,j7-rti-wdt";
> + reg = <0x00 0x2260000 0x00 0x100>;
> + clocks = <&k3_clks 354 1>;
> + power-domains = <&k3_pds 354 TI_SCI_PD_EXCLUSIVE>;
> + assigned-clocks = <&k3_clks 354 0>;
> + assigned-clock-parents = <&k3_clks 354 4>;
> + };
> +
> + watchdog7: watchdog@2270000 {
> + compatible = "ti,j7-rti-wdt";
> + reg = <0x00 0x2270000 0x00 0x100>;
> + clocks = <&k3_clks 355 1>;
> + power-domains = <&k3_pds 355 TI_SCI_PD_EXCLUSIVE>;
> + assigned-clocks = <&k3_clks 355 0>;
> + assigned-clock-parents = <&k3_clks 355 4>;
> + };
> +
> + watchdog16: watchdog@2300000 {
> + status = "disabled";
wow.. lots of watchdogs.. but you seem to have missed the document why
disabled comment here AND missed the comment about using status
as the last property.
https://lore.kernel.org/all/5187c590-ee9a-4c46-b326-655f4c371aaf@linaro.org/
> + compatible = "ti,j7-rti-wdt";
> + reg = <0x00 0x2300000 0x00 0x100>;
> + clocks = <&k3_clks 356 1>;
> + power-domains = <&k3_pds 356 TI_SCI_PD_EXCLUSIVE>;
> + assigned-clocks = <&k3_clks 356 0>;
> + assigned-clock-parents = <&k3_clks 356 4>;
> + };
> +
> + watchdog17: watchdog@2310000 {
> + status = "disabled";
> + compatible = "ti,j7-rti-wdt";
> + reg = <0x00 0x2310000 0x00 0x100>;
> + clocks = <&k3_clks 357 1>;
> + power-domains = <&k3_pds 357 TI_SCI_PD_EXCLUSIVE>;
> + assigned-clocks = <&k3_clks 357 0>;
> + assigned-clock-parents = <&k3_clks 357 4>;
> + };
> +
> + watchdog18: watchdog@2320000 {
> + status = "disabled";
> + compatible = "ti,j7-rti-wdt";
> + reg = <0x00 0x2320000 0x00 0x100>;
> + clocks = <&k3_clks 358 1>;
> + power-domains = <&k3_pds 358 TI_SCI_PD_EXCLUSIVE>;
> + assigned-clocks = <&k3_clks 358 0>;
> + assigned-clock-parents = <&k3_clks 358 4>;
> + };
> +
> + watchdog19: watchdog@2330000 {
> + status = "disabled";
> + compatible = "ti,j7-rti-wdt";
> + reg = <0x00 0x2330000 0x00 0x100>;
> + clocks = <&k3_clks 359 1>;
> + power-domains = <&k3_pds 359 TI_SCI_PD_EXCLUSIVE>;
> + assigned-clocks = <&k3_clks 359 0>;
> + assigned-clock-parents = <&k3_clks 359 4>;
> + };
> +
> + watchdog15: watchdog@22f0000 {
> + status = "disabled";
> + compatible = "ti,j7-rti-wdt";
> + reg = <0x00 0x22f0000 0x00 0x100>;
> + clocks = <&k3_clks 360 1>;
> + power-domains = <&k3_pds 360 TI_SCI_PD_EXCLUSIVE>;
> + assigned-clocks = <&k3_clks 360 0>;
> + assigned-clock-parents = <&k3_clks 360 4>;
> + };
> +
> + watchdog28: watchdog@23c0000 {
> + status = "disabled";
> + compatible = "ti,j7-rti-wdt";
> + reg = <0x00 0x23c0000 0x00 0x100>;
> + clocks = <&k3_clks 361 1>;
> + power-domains = <&k3_pds 361 TI_SCI_PD_EXCLUSIVE>;
> + assigned-clocks = <&k3_clks 361 0>;
> + assigned-clock-parents = <&k3_clks 361 4>;
> + };
> +
> + watchdog29: watchdog@23d0000 {
> + status = "disabled";
> + compatible = "ti,j7-rti-wdt";
> + reg = <0x00 0x23d0000 0x00 0x100>;
> + clocks = <&k3_clks 362 1>;
> + power-domains = <&k3_pds 362 TI_SCI_PD_EXCLUSIVE>;
> + assigned-clocks = <&k3_clks 362 0>;
> + assigned-clock-parents = <&k3_clks 362 4>;
> + };
> +
> + watchdog30: watchdog@23e0000 {
> + status = "disabled";
> + compatible = "ti,j7-rti-wdt";
> + reg = <0x00 0x23e0000 0x00 0x100>;
> + clocks = <&k3_clks 363 1>;
> + power-domains = <&k3_pds 363 TI_SCI_PD_EXCLUSIVE>;
> + assigned-clocks = <&k3_clks 363 0>;
> + assigned-clock-parents = <&k3_clks 363 4>;
> + };
> +
> + watchdog31: watchdog@23f0000 {
> + status = "disabled";
> + compatible = "ti,j7-rti-wdt";
> + reg = <0x00 0x23f0000 0x00 0x100>;
> + clocks = <&k3_clks 364 1>;
> + power-domains = <&k3_pds 364 TI_SCI_PD_EXCLUSIVE>;
> + assigned-clocks = <&k3_clks 364 0>;
> + assigned-clock-parents = <&k3_clks 364 4>;
> + };
> +
> + watchdog32: watchdog@2540000 {
> + status = "disabled";
> + compatible = "ti,j7-rti-wdt";
> + reg = <0x00 0x2540000 0x00 0x100>;
> + clocks = <&k3_clks 365 1>;
> + power-domains = <&k3_pds 365 TI_SCI_PD_EXCLUSIVE>;
> + assigned-clocks = <&k3_clks 365 0>;
> + assigned-clock-parents = <&k3_clks 366 4>;
> + };
> +
> + watchdog33: watchdog@2550000 {
> + status = "disabled";
> + compatible = "ti,j7-rti-wdt";
> + reg = <0x00 0x2550000 0x00 0x100>;
> + clocks = <&k3_clks 366 1>;
> + power-domains = <&k3_pds 366 TI_SCI_PD_EXCLUSIVE>;
> + assigned-clocks = <&k3_clks 366 0>;
> + assigned-clock-parents = <&k3_clks 366 4>;
> + };
> };
> --
> 2.17.1
>
--
Regards,
Nishanth Menon
Key (0xDDB5849D1736249D) / Fingerprint: F8A2 8693 54EB 8232 17A3 1A34 DDB5 849D 1736 249D
^ permalink raw reply [flat|nested] 14+ messages in thread* Re: [PATCH v5 4/7] arm64: dts: ti: k3-j784s4-main: Add the main domain watchdog instances
2023-09-26 17:12 ` Nishanth Menon
@ 2023-09-27 2:33 ` J, KEERTHY
0 siblings, 0 replies; 14+ messages in thread
From: J, KEERTHY @ 2023-09-27 2:33 UTC (permalink / raw)
To: Nishanth Menon
Cc: robh+dt, vigneshr, conor+dt, kristo, krzysztof.kozlowski+dt,
u-kumar1, linux-arm-kernel, devicetree, linux-kernel
On 9/26/2023 10:42 PM, Nishanth Menon wrote:
> On 18:58-20230926, Keerthy wrote:
>> There are totally 19 instances of watchdog module. One each for the
>> 8 A72 cores, one each for the 4 C7x cores, 1 for the GPU, 1 each
>> for the 6 R5F cores in the main domain. Keeping only the A72 instances
>> enabled and disabling the rest by default.
>>
>> Signed-off-by: Keerthy <j-keerthy@ti.com>
>> ---
>> arch/arm64/boot/dts/ti/k3-j784s4-main.dtsi | 182 +++++++++++++++++++++
>> 1 file changed, 182 insertions(+)
>>
>> diff --git a/arch/arm64/boot/dts/ti/k3-j784s4-main.dtsi b/arch/arm64/boot/dts/ti/k3-j784s4-main.dtsi
>> index 26dc3776f911..8c3efe066803 100644
>> --- a/arch/arm64/boot/dts/ti/k3-j784s4-main.dtsi
>> +++ b/arch/arm64/boot/dts/ti/k3-j784s4-main.dtsi
>> @@ -1576,4 +1576,186 @@
>> <695>;
>> bootph-pre-ram;
>> };
>> +
>> + watchdog0: watchdog@2200000 {
>> + compatible = "ti,j7-rti-wdt";
>> + reg = <0x00 0x2200000 0x00 0x100>;
>> + clocks = <&k3_clks 348 1>;
>> + power-domains = <&k3_pds 348 TI_SCI_PD_EXCLUSIVE>;
>> + assigned-clocks = <&k3_clks 348 0>;
>> + assigned-clock-parents = <&k3_clks 348 4>;
>> + };
>> +
>> + watchdog1: watchdog@2210000 {
>> + compatible = "ti,j7-rti-wdt";
>> + reg = <0x00 0x2210000 0x00 0x100>;
>> + clocks = <&k3_clks 349 1>;
>> + power-domains = <&k3_pds 349 TI_SCI_PD_EXCLUSIVE>;
>> + assigned-clocks = <&k3_clks 349 0>;
>> + assigned-clock-parents = <&k3_clks 349 4>;
>> + };
>> +
>> + watchdog2: watchdog@2220000 {
>> + compatible = "ti,j7-rti-wdt";
>> + reg = <0x00 0x2220000 0x00 0x100>;
>> + clocks = <&k3_clks 350 1>;
>> + power-domains = <&k3_pds 350 TI_SCI_PD_EXCLUSIVE>;
>> + assigned-clocks = <&k3_clks 350 0>;
>> + assigned-clock-parents = <&k3_clks 350 4>;
>> + };
>> +
>> + watchdog3: watchdog@2230000 {
>> + compatible = "ti,j7-rti-wdt";
>> + reg = <0x00 0x2230000 0x00 0x100>;
>> + clocks = <&k3_clks 351 1>;
>> + power-domains = <&k3_pds 351 TI_SCI_PD_EXCLUSIVE>;
>> + assigned-clocks = <&k3_clks 351 0>;
>> + assigned-clock-parents = <&k3_clks 351 4>;
>> + };
>> +
>> + watchdog4: watchdog@2240000 {
>> + compatible = "ti,j7-rti-wdt";
>> + reg = <0x00 0x2240000 0x00 0x100>;
>> + clocks = <&k3_clks 352 1>;
>> + power-domains = <&k3_pds 352 TI_SCI_PD_EXCLUSIVE>;
>> + assigned-clocks = <&k3_clks 352 0>;
>> + assigned-clock-parents = <&k3_clks 352 4>;
>> + };
>> +
>> + watchdog5: watchdog@2250000 {
>> + compatible = "ti,j7-rti-wdt";
>> + reg = <0x00 0x2250000 0x00 0x100>;
>> + clocks = <&k3_clks 353 1>;
>> + power-domains = <&k3_pds 353 TI_SCI_PD_EXCLUSIVE>;
>> + assigned-clocks = <&k3_clks 353 0>;
>> + assigned-clock-parents = <&k3_clks 353 4>;
>> + };
>> +
>> + watchdog6: watchdog@2260000 {
>> + compatible = "ti,j7-rti-wdt";
>> + reg = <0x00 0x2260000 0x00 0x100>;
>> + clocks = <&k3_clks 354 1>;
>> + power-domains = <&k3_pds 354 TI_SCI_PD_EXCLUSIVE>;
>> + assigned-clocks = <&k3_clks 354 0>;
>> + assigned-clock-parents = <&k3_clks 354 4>;
>> + };
>> +
>> + watchdog7: watchdog@2270000 {
>> + compatible = "ti,j7-rti-wdt";
>> + reg = <0x00 0x2270000 0x00 0x100>;
>> + clocks = <&k3_clks 355 1>;
>> + power-domains = <&k3_pds 355 TI_SCI_PD_EXCLUSIVE>;
>> + assigned-clocks = <&k3_clks 355 0>;
>> + assigned-clock-parents = <&k3_clks 355 4>;
>> + };
>> +
>> + watchdog16: watchdog@2300000 {
>> + status = "disabled";
>
> wow.. lots of watchdogs.. but you seem to have missed the document why
> disabled comment here AND missed the comment about using status
> as the last property.
> https://lore.kernel.org/all/5187c590-ee9a-4c46-b326-655f4c371aaf@linaro.org/
I will fix it in v6.
>
>> + compatible = "ti,j7-rti-wdt";
>> + reg = <0x00 0x2300000 0x00 0x100>;
>> + clocks = <&k3_clks 356 1>;
>> + power-domains = <&k3_pds 356 TI_SCI_PD_EXCLUSIVE>;
>> + assigned-clocks = <&k3_clks 356 0>;
>> + assigned-clock-parents = <&k3_clks 356 4>;
>> + };
>> +
>> + watchdog17: watchdog@2310000 {
>> + status = "disabled";
>> + compatible = "ti,j7-rti-wdt";
>> + reg = <0x00 0x2310000 0x00 0x100>;
>> + clocks = <&k3_clks 357 1>;
>> + power-domains = <&k3_pds 357 TI_SCI_PD_EXCLUSIVE>;
>> + assigned-clocks = <&k3_clks 357 0>;
>> + assigned-clock-parents = <&k3_clks 357 4>;
>> + };
>> +
>> + watchdog18: watchdog@2320000 {
>> + status = "disabled";
>> + compatible = "ti,j7-rti-wdt";
>> + reg = <0x00 0x2320000 0x00 0x100>;
>> + clocks = <&k3_clks 358 1>;
>> + power-domains = <&k3_pds 358 TI_SCI_PD_EXCLUSIVE>;
>> + assigned-clocks = <&k3_clks 358 0>;
>> + assigned-clock-parents = <&k3_clks 358 4>;
>> + };
>> +
>> + watchdog19: watchdog@2330000 {
>> + status = "disabled";
>> + compatible = "ti,j7-rti-wdt";
>> + reg = <0x00 0x2330000 0x00 0x100>;
>> + clocks = <&k3_clks 359 1>;
>> + power-domains = <&k3_pds 359 TI_SCI_PD_EXCLUSIVE>;
>> + assigned-clocks = <&k3_clks 359 0>;
>> + assigned-clock-parents = <&k3_clks 359 4>;
>> + };
>> +
>> + watchdog15: watchdog@22f0000 {
>> + status = "disabled";
>> + compatible = "ti,j7-rti-wdt";
>> + reg = <0x00 0x22f0000 0x00 0x100>;
>> + clocks = <&k3_clks 360 1>;
>> + power-domains = <&k3_pds 360 TI_SCI_PD_EXCLUSIVE>;
>> + assigned-clocks = <&k3_clks 360 0>;
>> + assigned-clock-parents = <&k3_clks 360 4>;
>> + };
>> +
>> + watchdog28: watchdog@23c0000 {
>> + status = "disabled";
>> + compatible = "ti,j7-rti-wdt";
>> + reg = <0x00 0x23c0000 0x00 0x100>;
>> + clocks = <&k3_clks 361 1>;
>> + power-domains = <&k3_pds 361 TI_SCI_PD_EXCLUSIVE>;
>> + assigned-clocks = <&k3_clks 361 0>;
>> + assigned-clock-parents = <&k3_clks 361 4>;
>> + };
>> +
>> + watchdog29: watchdog@23d0000 {
>> + status = "disabled";
>> + compatible = "ti,j7-rti-wdt";
>> + reg = <0x00 0x23d0000 0x00 0x100>;
>> + clocks = <&k3_clks 362 1>;
>> + power-domains = <&k3_pds 362 TI_SCI_PD_EXCLUSIVE>;
>> + assigned-clocks = <&k3_clks 362 0>;
>> + assigned-clock-parents = <&k3_clks 362 4>;
>> + };
>> +
>> + watchdog30: watchdog@23e0000 {
>> + status = "disabled";
>> + compatible = "ti,j7-rti-wdt";
>> + reg = <0x00 0x23e0000 0x00 0x100>;
>> + clocks = <&k3_clks 363 1>;
>> + power-domains = <&k3_pds 363 TI_SCI_PD_EXCLUSIVE>;
>> + assigned-clocks = <&k3_clks 363 0>;
>> + assigned-clock-parents = <&k3_clks 363 4>;
>> + };
>> +
>> + watchdog31: watchdog@23f0000 {
>> + status = "disabled";
>> + compatible = "ti,j7-rti-wdt";
>> + reg = <0x00 0x23f0000 0x00 0x100>;
>> + clocks = <&k3_clks 364 1>;
>> + power-domains = <&k3_pds 364 TI_SCI_PD_EXCLUSIVE>;
>> + assigned-clocks = <&k3_clks 364 0>;
>> + assigned-clock-parents = <&k3_clks 364 4>;
>> + };
>> +
>> + watchdog32: watchdog@2540000 {
>> + status = "disabled";
>> + compatible = "ti,j7-rti-wdt";
>> + reg = <0x00 0x2540000 0x00 0x100>;
>> + clocks = <&k3_clks 365 1>;
>> + power-domains = <&k3_pds 365 TI_SCI_PD_EXCLUSIVE>;
>> + assigned-clocks = <&k3_clks 365 0>;
>> + assigned-clock-parents = <&k3_clks 366 4>;
>> + };
>> +
>> + watchdog33: watchdog@2550000 {
>> + status = "disabled";
>> + compatible = "ti,j7-rti-wdt";
>> + reg = <0x00 0x2550000 0x00 0x100>;
>> + clocks = <&k3_clks 366 1>;
>> + power-domains = <&k3_pds 366 TI_SCI_PD_EXCLUSIVE>;
>> + assigned-clocks = <&k3_clks 366 0>;
>> + assigned-clock-parents = <&k3_clks 366 4>;
>> + };
>> };
>> --
>> 2.17.1
>>
>
^ permalink raw reply [flat|nested] 14+ messages in thread
* Re: [PATCH v5 4/7] arm64: dts: ti: k3-j784s4-main: Add the main domain watchdog instances
2023-09-26 13:28 ` [PATCH v5 4/7] arm64: dts: ti: k3-j784s4-main: Add the main domain watchdog instances Keerthy
2023-09-26 17:12 ` Nishanth Menon
@ 2023-09-27 7:54 ` Krzysztof Kozlowski
2023-09-27 8:23 ` J, KEERTHY
1 sibling, 1 reply; 14+ messages in thread
From: Krzysztof Kozlowski @ 2023-09-27 7:54 UTC (permalink / raw)
To: Keerthy, robh+dt, nm, vigneshr, conor+dt, kristo,
krzysztof.kozlowski+dt
Cc: u-kumar1, linux-arm-kernel, devicetree, linux-kernel
On 26/09/2023 15:28, Keerthy wrote:
> There are totally 19 instances of watchdog module. One each for the
> 8 A72 cores, one each for the 4 C7x cores, 1 for the GPU, 1 each
> for the 6 R5F cores in the main domain. Keeping only the A72 instances
> enabled and disabling the rest by default.
>
> Signed-off-by: Keerthy <j-keerthy@ti.com>
> ---
> arch/arm64/boot/dts/ti/k3-j784s4-main.dtsi | 182 +++++++++++++++++++++
> 1 file changed, 182 insertions(+)
>
> diff --git a/arch/arm64/boot/dts/ti/k3-j784s4-main.dtsi b/arch/arm64/boot/dts/ti/k3-j784s4-main.dtsi
> index 26dc3776f911..8c3efe066803 100644
> --- a/arch/arm64/boot/dts/ti/k3-j784s4-main.dtsi
> +++ b/arch/arm64/boot/dts/ti/k3-j784s4-main.dtsi
> @@ -1576,4 +1576,186 @@
> <695>;
> bootph-pre-ram;
> };
> +
> + watchdog0: watchdog@2200000 {
> + compatible = "ti,j7-rti-wdt";
> + reg = <0x00 0x2200000 0x00 0x100>;
> + clocks = <&k3_clks 348 1>;
> + power-domains = <&k3_pds 348 TI_SCI_PD_EXCLUSIVE>;
> + assigned-clocks = <&k3_clks 348 0>;
> + assigned-clock-parents = <&k3_clks 348 4>;
> + };
> +
> + watchdog1: watchdog@2210000 {
> + compatible = "ti,j7-rti-wdt";
> + reg = <0x00 0x2210000 0x00 0x100>;
> + clocks = <&k3_clks 349 1>;
> + power-domains = <&k3_pds 349 TI_SCI_PD_EXCLUSIVE>;
> + assigned-clocks = <&k3_clks 349 0>;
> + assigned-clock-parents = <&k3_clks 349 4>;
> + };
> +
> + watchdog2: watchdog@2220000 {
> + compatible = "ti,j7-rti-wdt";
> + reg = <0x00 0x2220000 0x00 0x100>;
> + clocks = <&k3_clks 350 1>;
> + power-domains = <&k3_pds 350 TI_SCI_PD_EXCLUSIVE>;
> + assigned-clocks = <&k3_clks 350 0>;
> + assigned-clock-parents = <&k3_clks 350 4>;
> + };
> +
> + watchdog3: watchdog@2230000 {
> + compatible = "ti,j7-rti-wdt";
> + reg = <0x00 0x2230000 0x00 0x100>;
> + clocks = <&k3_clks 351 1>;
> + power-domains = <&k3_pds 351 TI_SCI_PD_EXCLUSIVE>;
> + assigned-clocks = <&k3_clks 351 0>;
> + assigned-clock-parents = <&k3_clks 351 4>;
> + };
> +
> + watchdog4: watchdog@2240000 {
> + compatible = "ti,j7-rti-wdt";
> + reg = <0x00 0x2240000 0x00 0x100>;
> + clocks = <&k3_clks 352 1>;
> + power-domains = <&k3_pds 352 TI_SCI_PD_EXCLUSIVE>;
> + assigned-clocks = <&k3_clks 352 0>;
> + assigned-clock-parents = <&k3_clks 352 4>;
> + };
> +
> + watchdog5: watchdog@2250000 {
> + compatible = "ti,j7-rti-wdt";
> + reg = <0x00 0x2250000 0x00 0x100>;
> + clocks = <&k3_clks 353 1>;
> + power-domains = <&k3_pds 353 TI_SCI_PD_EXCLUSIVE>;
> + assigned-clocks = <&k3_clks 353 0>;
> + assigned-clock-parents = <&k3_clks 353 4>;
> + };
> +
> + watchdog6: watchdog@2260000 {
> + compatible = "ti,j7-rti-wdt";
> + reg = <0x00 0x2260000 0x00 0x100>;
> + clocks = <&k3_clks 354 1>;
> + power-domains = <&k3_pds 354 TI_SCI_PD_EXCLUSIVE>;
> + assigned-clocks = <&k3_clks 354 0>;
> + assigned-clock-parents = <&k3_clks 354 4>;
> + };
> +
> + watchdog7: watchdog@2270000 {
> + compatible = "ti,j7-rti-wdt";
> + reg = <0x00 0x2270000 0x00 0x100>;
> + clocks = <&k3_clks 355 1>;
> + power-domains = <&k3_pds 355 TI_SCI_PD_EXCLUSIVE>;
> + assigned-clocks = <&k3_clks 355 0>;
> + assigned-clock-parents = <&k3_clks 355 4>;
> + };
> +
> + watchdog16: watchdog@2300000 {
> + status = "disabled";
This is a friendly reminder during the review process.
It seems my previous comments were not fully addressed. Maybe my
feedback got lost between the quotes, maybe you just forgot to apply it.
Please go back to the previous discussion and either implement all
requested changes or keep discussing them.
Thank you.
Best regards,
Krzysztof
^ permalink raw reply [flat|nested] 14+ messages in thread* Re: [PATCH v5 4/7] arm64: dts: ti: k3-j784s4-main: Add the main domain watchdog instances
2023-09-27 7:54 ` Krzysztof Kozlowski
@ 2023-09-27 8:23 ` J, KEERTHY
0 siblings, 0 replies; 14+ messages in thread
From: J, KEERTHY @ 2023-09-27 8:23 UTC (permalink / raw)
To: Krzysztof Kozlowski, robh+dt, nm, vigneshr, conor+dt, kristo,
krzysztof.kozlowski+dt
Cc: u-kumar1, linux-arm-kernel, devicetree, linux-kernel
On 9/27/2023 1:24 PM, Krzysztof Kozlowski wrote:
> On 26/09/2023 15:28, Keerthy wrote:
>> There are totally 19 instances of watchdog module. One each for the
>> 8 A72 cores, one each for the 4 C7x cores, 1 for the GPU, 1 each
>> for the 6 R5F cores in the main domain. Keeping only the A72 instances
>> enabled and disabling the rest by default.
>>
>> Signed-off-by: Keerthy <j-keerthy@ti.com>
>> ---
>> arch/arm64/boot/dts/ti/k3-j784s4-main.dtsi | 182 +++++++++++++++++++++
>> 1 file changed, 182 insertions(+)
>>
>> diff --git a/arch/arm64/boot/dts/ti/k3-j784s4-main.dtsi b/arch/arm64/boot/dts/ti/k3-j784s4-main.dtsi
>> index 26dc3776f911..8c3efe066803 100644
>> --- a/arch/arm64/boot/dts/ti/k3-j784s4-main.dtsi
>> +++ b/arch/arm64/boot/dts/ti/k3-j784s4-main.dtsi
>> @@ -1576,4 +1576,186 @@
>> <695>;
>> bootph-pre-ram;
>> };
>> +
>> + watchdog0: watchdog@2200000 {
>> + compatible = "ti,j7-rti-wdt";
>> + reg = <0x00 0x2200000 0x00 0x100>;
>> + clocks = <&k3_clks 348 1>;
>> + power-domains = <&k3_pds 348 TI_SCI_PD_EXCLUSIVE>;
>> + assigned-clocks = <&k3_clks 348 0>;
>> + assigned-clock-parents = <&k3_clks 348 4>;
>> + };
>> +
>> + watchdog1: watchdog@2210000 {
>> + compatible = "ti,j7-rti-wdt";
>> + reg = <0x00 0x2210000 0x00 0x100>;
>> + clocks = <&k3_clks 349 1>;
>> + power-domains = <&k3_pds 349 TI_SCI_PD_EXCLUSIVE>;
>> + assigned-clocks = <&k3_clks 349 0>;
>> + assigned-clock-parents = <&k3_clks 349 4>;
>> + };
>> +
>> + watchdog2: watchdog@2220000 {
>> + compatible = "ti,j7-rti-wdt";
>> + reg = <0x00 0x2220000 0x00 0x100>;
>> + clocks = <&k3_clks 350 1>;
>> + power-domains = <&k3_pds 350 TI_SCI_PD_EXCLUSIVE>;
>> + assigned-clocks = <&k3_clks 350 0>;
>> + assigned-clock-parents = <&k3_clks 350 4>;
>> + };
>> +
>> + watchdog3: watchdog@2230000 {
>> + compatible = "ti,j7-rti-wdt";
>> + reg = <0x00 0x2230000 0x00 0x100>;
>> + clocks = <&k3_clks 351 1>;
>> + power-domains = <&k3_pds 351 TI_SCI_PD_EXCLUSIVE>;
>> + assigned-clocks = <&k3_clks 351 0>;
>> + assigned-clock-parents = <&k3_clks 351 4>;
>> + };
>> +
>> + watchdog4: watchdog@2240000 {
>> + compatible = "ti,j7-rti-wdt";
>> + reg = <0x00 0x2240000 0x00 0x100>;
>> + clocks = <&k3_clks 352 1>;
>> + power-domains = <&k3_pds 352 TI_SCI_PD_EXCLUSIVE>;
>> + assigned-clocks = <&k3_clks 352 0>;
>> + assigned-clock-parents = <&k3_clks 352 4>;
>> + };
>> +
>> + watchdog5: watchdog@2250000 {
>> + compatible = "ti,j7-rti-wdt";
>> + reg = <0x00 0x2250000 0x00 0x100>;
>> + clocks = <&k3_clks 353 1>;
>> + power-domains = <&k3_pds 353 TI_SCI_PD_EXCLUSIVE>;
>> + assigned-clocks = <&k3_clks 353 0>;
>> + assigned-clock-parents = <&k3_clks 353 4>;
>> + };
>> +
>> + watchdog6: watchdog@2260000 {
>> + compatible = "ti,j7-rti-wdt";
>> + reg = <0x00 0x2260000 0x00 0x100>;
>> + clocks = <&k3_clks 354 1>;
>> + power-domains = <&k3_pds 354 TI_SCI_PD_EXCLUSIVE>;
>> + assigned-clocks = <&k3_clks 354 0>;
>> + assigned-clock-parents = <&k3_clks 354 4>;
>> + };
>> +
>> + watchdog7: watchdog@2270000 {
>> + compatible = "ti,j7-rti-wdt";
>> + reg = <0x00 0x2270000 0x00 0x100>;
>> + clocks = <&k3_clks 355 1>;
>> + power-domains = <&k3_pds 355 TI_SCI_PD_EXCLUSIVE>;
>> + assigned-clocks = <&k3_clks 355 0>;
>> + assigned-clock-parents = <&k3_clks 355 4>;
>> + };
>> +
>> + watchdog16: watchdog@2300000 {
>> + status = "disabled";
>
> This is a friendly reminder during the review process.
>
> It seems my previous comments were not fully addressed. Maybe my
> feedback got lost between the quotes, maybe you just forgot to apply it.
> Please go back to the previous discussion and either implement all
> requested changes or keep discussing them.
Apologies. I have fixed the order in v6.
>
> Thank you.
>
> Best regards,
> Krzysztof
>
^ permalink raw reply [flat|nested] 14+ messages in thread
* [PATCH v5 5/7] arm64: dts: ti: k3-j784s4-mcu: Add the mcu domain watchdog instances
2023-09-26 13:27 [PATCH v5 0/7] arm64: ti: k3-j7: Add the ESM & main domain watchdog nodes Keerthy
` (3 preceding siblings ...)
2023-09-26 13:28 ` [PATCH v5 4/7] arm64: dts: ti: k3-j784s4-main: Add the main domain watchdog instances Keerthy
@ 2023-09-26 13:28 ` Keerthy
2023-09-26 13:28 ` [PATCH v5 6/7] arm64: dts: ti: k3-j721s2-main: Add the main " Keerthy
2023-09-26 13:28 ` [PATCH v5 7/7] dts: ti: k3-j712s2-mcu: Add the mcu " Keerthy
6 siblings, 0 replies; 14+ messages in thread
From: Keerthy @ 2023-09-26 13:28 UTC (permalink / raw)
To: robh+dt, nm, vigneshr, conor+dt, kristo, krzysztof.kozlowski+dt
Cc: j-keerthy, u-kumar1, linux-arm-kernel, devicetree, linux-kernel
There are totally 2 instances of watchdog module in MCU domain.
These instances are coupled with the MCU domain R5F instances.
Disabling them as they are not used by Linux.
Signed-off-by: Keerthy <j-keerthy@ti.com>
---
.../boot/dts/ti/k3-j784s4-mcu-wakeup.dtsi | 24 +++++++++++++++++++
1 file changed, 24 insertions(+)
diff --git a/arch/arm64/boot/dts/ti/k3-j784s4-mcu-wakeup.dtsi b/arch/arm64/boot/dts/ti/k3-j784s4-mcu-wakeup.dtsi
index a7b5c4cb7d3e..809a0b1cf038 100644
--- a/arch/arm64/boot/dts/ti/k3-j784s4-mcu-wakeup.dtsi
+++ b/arch/arm64/boot/dts/ti/k3-j784s4-mcu-wakeup.dtsi
@@ -714,4 +714,28 @@
ti,esm-pins = <63>;
bootph-pre-ram;
};
+
+ /*
+ * The 2 RTI instances are couple with MCU R5Fs so keeping them
+ * disabled as these will be used by their respective firmware
+ */
+ mcu_watchdog0: watchdog@40600000 {
+ compatible = "ti,j7-rti-wdt";
+ reg = <0x00 0x40600000 0x00 0x100>;
+ clocks = <&k3_clks 367 1>;
+ power-domains = <&k3_pds 367 TI_SCI_PD_EXCLUSIVE>;
+ assigned-clocks = <&k3_clks 367 0>;
+ assigned-clock-parents = <&k3_clks 367 4>;
+ status = "disabled";
+ };
+
+ mcu_watchdog1: watchdog@40610000 {
+ compatible = "ti,j7-rti-wdt";
+ reg = <0x00 0x40610000 0x00 0x100>;
+ clocks = <&k3_clks 368 1>;
+ power-domains = <&k3_pds 368 TI_SCI_PD_EXCLUSIVE>;
+ assigned-clocks = <&k3_clks 368 0>;
+ assigned-clock-parents = <&k3_clks 368 4>;
+ status = "disabled";
+ };
};
--
2.17.1
^ permalink raw reply related [flat|nested] 14+ messages in thread* [PATCH v5 6/7] arm64: dts: ti: k3-j721s2-main: Add the main domain watchdog instances
2023-09-26 13:27 [PATCH v5 0/7] arm64: ti: k3-j7: Add the ESM & main domain watchdog nodes Keerthy
` (4 preceding siblings ...)
2023-09-26 13:28 ` [PATCH v5 5/7] arm64: dts: ti: k3-j784s4-mcu: Add the mcu " Keerthy
@ 2023-09-26 13:28 ` Keerthy
2023-09-26 17:13 ` Nishanth Menon
2023-09-26 13:28 ` [PATCH v5 7/7] dts: ti: k3-j712s2-mcu: Add the mcu " Keerthy
6 siblings, 1 reply; 14+ messages in thread
From: Keerthy @ 2023-09-26 13:28 UTC (permalink / raw)
To: robh+dt, nm, vigneshr, conor+dt, kristo, krzysztof.kozlowski+dt
Cc: j-keerthy, u-kumar1, linux-arm-kernel, devicetree, linux-kernel
There are totally 9 instances of watchdog module. One each for the
2 A72 cores, one each for the 2 C7x cores, 1 for the GPU, 1 each
for the 4 R5F cores in the main domain. Keeping only the A72 instances
enabled and disabling the rest by default.
Signed-off-by: Keerthy <j-keerthy@ti.com>
---
arch/arm64/boot/dts/ti/k3-j721s2-main.dtsi | 88 ++++++++++++++++++++++
1 file changed, 88 insertions(+)
diff --git a/arch/arm64/boot/dts/ti/k3-j721s2-main.dtsi b/arch/arm64/boot/dts/ti/k3-j721s2-main.dtsi
index 8a717b592238..5e3c0ef9b10b 100644
--- a/arch/arm64/boot/dts/ti/k3-j721s2-main.dtsi
+++ b/arch/arm64/boot/dts/ti/k3-j721s2-main.dtsi
@@ -1702,4 +1702,92 @@
ti,esm-pins = <688>, <689>;
bootph-pre-ram;
};
+
+ watchdog0: watchdog@2200000 {
+ compatible = "ti,j7-rti-wdt";
+ reg = <0x00 0x2200000 0x00 0x100>;
+ clocks = <&k3_clks 286 1>;
+ power-domains = <&k3_pds 286 TI_SCI_PD_EXCLUSIVE>;
+ assigned-clocks = <&k3_clks 286 1>;
+ assigned-clock-parents = <&k3_clks 286 5>;
+ };
+
+ watchdog1: watchdog@2210000 {
+ compatible = "ti,j7-rti-wdt";
+ reg = <0x00 0x2210000 0x00 0x100>;
+ clocks = <&k3_clks 287 1>;
+ power-domains = <&k3_pds 287 TI_SCI_PD_EXCLUSIVE>;
+ assigned-clocks = <&k3_clks 287 1>;
+ assigned-clock-parents = <&k3_clks 287 5>;
+ };
+
+ watchdog16: watchdog@2300000 {
+ compatible = "ti,j7-rti-wdt";
+ reg = <0x00 0x2300000 0x00 0x100>;
+ clocks = <&k3_clks 288 1>;
+ power-domains = <&k3_pds 288 TI_SCI_PD_EXCLUSIVE>;
+ assigned-clocks = <&k3_clks 288 1>;
+ assigned-clock-parents = <&k3_clks 288 5>;
+ status = "disabled";
+ };
+
+ watchdog17: watchdog@2310000 {
+ compatible = "ti,j7-rti-wdt";
+ reg = <0x00 0x2310000 0x00 0x100>;
+ clocks = <&k3_clks 289 1>;
+ power-domains = <&k3_pds 289 TI_SCI_PD_EXCLUSIVE>;
+ assigned-clocks = <&k3_clks 289 1>;
+ assigned-clock-parents = <&k3_clks 289 5>;
+ status = "disabled";
+ };
+
+ watchdog15: watchdog@22f0000 {
+ compatible = "ti,j7-rti-wdt";
+ reg = <0x00 0x22f0000 0x00 0x100>;
+ clocks = <&k3_clks 290 1>;
+ power-domains = <&k3_pds 290 TI_SCI_PD_EXCLUSIVE>;
+ assigned-clocks = <&k3_clks 290 1>;
+ assigned-clock-parents = <&k3_clks 290 5>;
+ status = "disabled";
+ };
+
+ watchdog28: watchdog@23c0000 {
+ compatible = "ti,j7-rti-wdt";
+ reg = <0x00 0x23c0000 0x00 0x100>;
+ clocks = <&k3_clks 291 1>;
+ power-domains = <&k3_pds 291 TI_SCI_PD_EXCLUSIVE>;
+ assigned-clocks = <&k3_clks 291 1>;
+ assigned-clock-parents = <&k3_clks 291 5>;
+ status = "disabled";
+ };
+
+ watchdog29: watchdog@23d0000 {
+ compatible = "ti,j7-rti-wdt";
+ reg = <0x00 0x23d0000 0x00 0x100>;
+ clocks = <&k3_clks 292 1>;
+ power-domains = <&k3_pds 292 TI_SCI_PD_EXCLUSIVE>;
+ assigned-clocks = <&k3_clks 292 1>;
+ assigned-clock-parents = <&k3_clks 292 5>;
+ status = "disabled";
+ };
+
+ watchdog30: watchdog@23e0000 {
+ compatible = "ti,j7-rti-wdt";
+ reg = <0x00 0x23e0000 0x00 0x100>;
+ clocks = <&k3_clks 293 1>;
+ power-domains = <&k3_pds 293 TI_SCI_PD_EXCLUSIVE>;
+ assigned-clocks = <&k3_clks 293 1>;
+ assigned-clock-parents = <&k3_clks 293 5>;
+ status = "disabled";
+ };
+
+ watchdog31: watchdog@23f0000 {
+ compatible = "ti,j7-rti-wdt";
+ reg = <0x00 0x23f0000 0x00 0x100>;
+ clocks = <&k3_clks 294 1>;
+ power-domains = <&k3_pds 294 TI_SCI_PD_EXCLUSIVE>;
+ assigned-clocks = <&k3_clks 294 1>;
+ assigned-clock-parents = <&k3_clks 294 5>;
+ status = "disabled";
+ };
};
--
2.17.1
^ permalink raw reply related [flat|nested] 14+ messages in thread* Re: [PATCH v5 6/7] arm64: dts: ti: k3-j721s2-main: Add the main domain watchdog instances
2023-09-26 13:28 ` [PATCH v5 6/7] arm64: dts: ti: k3-j721s2-main: Add the main " Keerthy
@ 2023-09-26 17:13 ` Nishanth Menon
2023-09-27 2:32 ` J, KEERTHY
0 siblings, 1 reply; 14+ messages in thread
From: Nishanth Menon @ 2023-09-26 17:13 UTC (permalink / raw)
To: Keerthy
Cc: robh+dt, vigneshr, conor+dt, kristo, krzysztof.kozlowski+dt,
u-kumar1, linux-arm-kernel, devicetree, linux-kernel
On 18:58-20230926, Keerthy wrote:
> There are totally 9 instances of watchdog module. One each for the
> 2 A72 cores, one each for the 2 C7x cores, 1 for the GPU, 1 each
> for the 4 R5F cores in the main domain. Keeping only the A72 instances
> enabled and disabling the rest by default.
Will be good to explain why in the commit message as well.
>
> Signed-off-by: Keerthy <j-keerthy@ti.com>
> ---
> arch/arm64/boot/dts/ti/k3-j721s2-main.dtsi | 88 ++++++++++++++++++++++
> 1 file changed, 88 insertions(+)
>
> diff --git a/arch/arm64/boot/dts/ti/k3-j721s2-main.dtsi b/arch/arm64/boot/dts/ti/k3-j721s2-main.dtsi
> index 8a717b592238..5e3c0ef9b10b 100644
> --- a/arch/arm64/boot/dts/ti/k3-j721s2-main.dtsi
> +++ b/arch/arm64/boot/dts/ti/k3-j721s2-main.dtsi
> @@ -1702,4 +1702,92 @@
> ti,esm-pins = <688>, <689>;
> bootph-pre-ram;
> };
> +
> + watchdog0: watchdog@2200000 {
> + compatible = "ti,j7-rti-wdt";
> + reg = <0x00 0x2200000 0x00 0x100>;
> + clocks = <&k3_clks 286 1>;
> + power-domains = <&k3_pds 286 TI_SCI_PD_EXCLUSIVE>;
> + assigned-clocks = <&k3_clks 286 1>;
> + assigned-clock-parents = <&k3_clks 286 5>;
> + };
> +
> + watchdog1: watchdog@2210000 {
> + compatible = "ti,j7-rti-wdt";
> + reg = <0x00 0x2210000 0x00 0x100>;
> + clocks = <&k3_clks 287 1>;
> + power-domains = <&k3_pds 287 TI_SCI_PD_EXCLUSIVE>;
> + assigned-clocks = <&k3_clks 287 1>;
> + assigned-clock-parents = <&k3_clks 287 5>;
> + };
> +
> + watchdog16: watchdog@2300000 {
> + compatible = "ti,j7-rti-wdt";
> + reg = <0x00 0x2300000 0x00 0x100>;
> + clocks = <&k3_clks 288 1>;
> + power-domains = <&k3_pds 288 TI_SCI_PD_EXCLUSIVE>;
> + assigned-clocks = <&k3_clks 288 1>;
> + assigned-clock-parents = <&k3_clks 288 5>;
> + status = "disabled";
> + };
> +
> + watchdog17: watchdog@2310000 {
> + compatible = "ti,j7-rti-wdt";
> + reg = <0x00 0x2310000 0x00 0x100>;
> + clocks = <&k3_clks 289 1>;
> + power-domains = <&k3_pds 289 TI_SCI_PD_EXCLUSIVE>;
> + assigned-clocks = <&k3_clks 289 1>;
> + assigned-clock-parents = <&k3_clks 289 5>;
> + status = "disabled";
> + };
> +
> + watchdog15: watchdog@22f0000 {
> + compatible = "ti,j7-rti-wdt";
> + reg = <0x00 0x22f0000 0x00 0x100>;
> + clocks = <&k3_clks 290 1>;
> + power-domains = <&k3_pds 290 TI_SCI_PD_EXCLUSIVE>;
> + assigned-clocks = <&k3_clks 290 1>;
> + assigned-clock-parents = <&k3_clks 290 5>;
> + status = "disabled";
> + };
> +
> + watchdog28: watchdog@23c0000 {
> + compatible = "ti,j7-rti-wdt";
> + reg = <0x00 0x23c0000 0x00 0x100>;
> + clocks = <&k3_clks 291 1>;
> + power-domains = <&k3_pds 291 TI_SCI_PD_EXCLUSIVE>;
> + assigned-clocks = <&k3_clks 291 1>;
> + assigned-clock-parents = <&k3_clks 291 5>;
> + status = "disabled";
> + };
> +
> + watchdog29: watchdog@23d0000 {
> + compatible = "ti,j7-rti-wdt";
> + reg = <0x00 0x23d0000 0x00 0x100>;
> + clocks = <&k3_clks 292 1>;
> + power-domains = <&k3_pds 292 TI_SCI_PD_EXCLUSIVE>;
> + assigned-clocks = <&k3_clks 292 1>;
> + assigned-clock-parents = <&k3_clks 292 5>;
> + status = "disabled";
> + };
> +
> + watchdog30: watchdog@23e0000 {
> + compatible = "ti,j7-rti-wdt";
> + reg = <0x00 0x23e0000 0x00 0x100>;
> + clocks = <&k3_clks 293 1>;
> + power-domains = <&k3_pds 293 TI_SCI_PD_EXCLUSIVE>;
> + assigned-clocks = <&k3_clks 293 1>;
> + assigned-clock-parents = <&k3_clks 293 5>;
> + status = "disabled";
> + };
> +
> + watchdog31: watchdog@23f0000 {
> + compatible = "ti,j7-rti-wdt";
> + reg = <0x00 0x23f0000 0x00 0x100>;
> + clocks = <&k3_clks 294 1>;
> + power-domains = <&k3_pds 294 TI_SCI_PD_EXCLUSIVE>;
> + assigned-clocks = <&k3_clks 294 1>;
> + assigned-clock-parents = <&k3_clks 294 5>;
> + status = "disabled";
Missing documentation here as well.
> + };
> };
> --
> 2.17.1
>
--
Regards,
Nishanth Menon
Key (0xDDB5849D1736249D) / Fingerprint: F8A2 8693 54EB 8232 17A3 1A34 DDB5 849D 1736 249D
^ permalink raw reply [flat|nested] 14+ messages in thread* Re: [PATCH v5 6/7] arm64: dts: ti: k3-j721s2-main: Add the main domain watchdog instances
2023-09-26 17:13 ` Nishanth Menon
@ 2023-09-27 2:32 ` J, KEERTHY
0 siblings, 0 replies; 14+ messages in thread
From: J, KEERTHY @ 2023-09-27 2:32 UTC (permalink / raw)
To: Nishanth Menon
Cc: robh+dt, vigneshr, conor+dt, kristo, krzysztof.kozlowski+dt,
u-kumar1, linux-arm-kernel, devicetree, linux-kernel
On 9/26/2023 10:43 PM, Nishanth Menon wrote:
> On 18:58-20230926, Keerthy wrote:
>> There are totally 9 instances of watchdog module. One each for the
>> 2 A72 cores, one each for the 2 C7x cores, 1 for the GPU, 1 each
>> for the 4 R5F cores in the main domain. Keeping only the A72 instances
>> enabled and disabling the rest by default.
>
> Will be good to explain why in the commit message as well.
I will add that.
>
>>
>> Signed-off-by: Keerthy <j-keerthy@ti.com>
>> ---
>> arch/arm64/boot/dts/ti/k3-j721s2-main.dtsi | 88 ++++++++++++++++++++++
>> 1 file changed, 88 insertions(+)
>>
>> diff --git a/arch/arm64/boot/dts/ti/k3-j721s2-main.dtsi b/arch/arm64/boot/dts/ti/k3-j721s2-main.dtsi
>> index 8a717b592238..5e3c0ef9b10b 100644
>> --- a/arch/arm64/boot/dts/ti/k3-j721s2-main.dtsi
>> +++ b/arch/arm64/boot/dts/ti/k3-j721s2-main.dtsi
>> @@ -1702,4 +1702,92 @@
>> ti,esm-pins = <688>, <689>;
>> bootph-pre-ram;
>> };
>> +
>> + watchdog0: watchdog@2200000 {
>> + compatible = "ti,j7-rti-wdt";
>> + reg = <0x00 0x2200000 0x00 0x100>;
>> + clocks = <&k3_clks 286 1>;
>> + power-domains = <&k3_pds 286 TI_SCI_PD_EXCLUSIVE>;
>> + assigned-clocks = <&k3_clks 286 1>;
>> + assigned-clock-parents = <&k3_clks 286 5>;
>> + };
>> +
>> + watchdog1: watchdog@2210000 {
>> + compatible = "ti,j7-rti-wdt";
>> + reg = <0x00 0x2210000 0x00 0x100>;
>> + clocks = <&k3_clks 287 1>;
>> + power-domains = <&k3_pds 287 TI_SCI_PD_EXCLUSIVE>;
>> + assigned-clocks = <&k3_clks 287 1>;
>> + assigned-clock-parents = <&k3_clks 287 5>;
>> + };
>> +
>> + watchdog16: watchdog@2300000 {
>> + compatible = "ti,j7-rti-wdt";
>> + reg = <0x00 0x2300000 0x00 0x100>;
>> + clocks = <&k3_clks 288 1>;
>> + power-domains = <&k3_pds 288 TI_SCI_PD_EXCLUSIVE>;
>> + assigned-clocks = <&k3_clks 288 1>;
>> + assigned-clock-parents = <&k3_clks 288 5>;
>> + status = "disabled";
>> + };
>> +
>> + watchdog17: watchdog@2310000 {
>> + compatible = "ti,j7-rti-wdt";
>> + reg = <0x00 0x2310000 0x00 0x100>;
>> + clocks = <&k3_clks 289 1>;
>> + power-domains = <&k3_pds 289 TI_SCI_PD_EXCLUSIVE>;
>> + assigned-clocks = <&k3_clks 289 1>;
>> + assigned-clock-parents = <&k3_clks 289 5>;
>> + status = "disabled";
>> + };
>> +
>> + watchdog15: watchdog@22f0000 {
>> + compatible = "ti,j7-rti-wdt";
>> + reg = <0x00 0x22f0000 0x00 0x100>;
>> + clocks = <&k3_clks 290 1>;
>> + power-domains = <&k3_pds 290 TI_SCI_PD_EXCLUSIVE>;
>> + assigned-clocks = <&k3_clks 290 1>;
>> + assigned-clock-parents = <&k3_clks 290 5>;
>> + status = "disabled";
>> + };
>> +
>> + watchdog28: watchdog@23c0000 {
>> + compatible = "ti,j7-rti-wdt";
>> + reg = <0x00 0x23c0000 0x00 0x100>;
>> + clocks = <&k3_clks 291 1>;
>> + power-domains = <&k3_pds 291 TI_SCI_PD_EXCLUSIVE>;
>> + assigned-clocks = <&k3_clks 291 1>;
>> + assigned-clock-parents = <&k3_clks 291 5>;
>> + status = "disabled";
>> + };
>> +
>> + watchdog29: watchdog@23d0000 {
>> + compatible = "ti,j7-rti-wdt";
>> + reg = <0x00 0x23d0000 0x00 0x100>;
>> + clocks = <&k3_clks 292 1>;
>> + power-domains = <&k3_pds 292 TI_SCI_PD_EXCLUSIVE>;
>> + assigned-clocks = <&k3_clks 292 1>;
>> + assigned-clock-parents = <&k3_clks 292 5>;
>> + status = "disabled";
>> + };
>> +
>> + watchdog30: watchdog@23e0000 {
>> + compatible = "ti,j7-rti-wdt";
>> + reg = <0x00 0x23e0000 0x00 0x100>;
>> + clocks = <&k3_clks 293 1>;
>> + power-domains = <&k3_pds 293 TI_SCI_PD_EXCLUSIVE>;
>> + assigned-clocks = <&k3_clks 293 1>;
>> + assigned-clock-parents = <&k3_clks 293 5>;
>> + status = "disabled";
>> + };
>> +
>> + watchdog31: watchdog@23f0000 {
>> + compatible = "ti,j7-rti-wdt";
>> + reg = <0x00 0x23f0000 0x00 0x100>;
>> + clocks = <&k3_clks 294 1>;
>> + power-domains = <&k3_pds 294 TI_SCI_PD_EXCLUSIVE>;
>> + assigned-clocks = <&k3_clks 294 1>;
>> + assigned-clock-parents = <&k3_clks 294 5>;
>> + status = "disabled";
>
> Missing documentation here as well.
Sure. I will add that.
>
>> + };
>> };
>> --
>> 2.17.1
>>
>
^ permalink raw reply [flat|nested] 14+ messages in thread
* [PATCH v5 7/7] dts: ti: k3-j712s2-mcu: Add the mcu domain watchdog instances
2023-09-26 13:27 [PATCH v5 0/7] arm64: ti: k3-j7: Add the ESM & main domain watchdog nodes Keerthy
` (5 preceding siblings ...)
2023-09-26 13:28 ` [PATCH v5 6/7] arm64: dts: ti: k3-j721s2-main: Add the main " Keerthy
@ 2023-09-26 13:28 ` Keerthy
6 siblings, 0 replies; 14+ messages in thread
From: Keerthy @ 2023-09-26 13:28 UTC (permalink / raw)
To: robh+dt, nm, vigneshr, conor+dt, kristo, krzysztof.kozlowski+dt
Cc: j-keerthy, u-kumar1, linux-arm-kernel, devicetree, linux-kernel
There are totally 2 instances of watchdog module in MCU domain.
These instances are coupled with the MCU domain R5F instances.
Disabling them as they are not used by Linux.
Signed-off-by: Keerthy <j-keerthy@ti.com>
---
.../boot/dts/ti/k3-j721s2-mcu-wakeup.dtsi | 24 +++++++++++++++++++
1 file changed, 24 insertions(+)
diff --git a/arch/arm64/boot/dts/ti/k3-j721s2-mcu-wakeup.dtsi b/arch/arm64/boot/dts/ti/k3-j721s2-mcu-wakeup.dtsi
index 4b29418a6076..83377c47e709 100644
--- a/arch/arm64/boot/dts/ti/k3-j721s2-mcu-wakeup.dtsi
+++ b/arch/arm64/boot/dts/ti/k3-j721s2-mcu-wakeup.dtsi
@@ -669,4 +669,28 @@
ti,esm-pins = <63>;
bootph-pre-ram;
};
+
+ /*
+ * The 2 RTI instances are couple with MCU R5Fs so keeping them
+ * disabled as these will be used by their respective firmware
+ */
+ mcu_watchdog0: watchdog@40600000 {
+ compatible = "ti,j7-rti-wdt";
+ reg = <0x00 0x40600000 0x00 0x100>;
+ clocks = <&k3_clks 295 1>;
+ power-domains = <&k3_pds 295 TI_SCI_PD_EXCLUSIVE>;
+ assigned-clocks = <&k3_clks 295 1>;
+ assigned-clock-parents = <&k3_clks 295 5>;
+ status = "disabled";
+ };
+
+ mcu_watchdog1: watchdog@40610000 {
+ compatible = "ti,j7-rti-wdt";
+ reg = <0x00 0x40610000 0x00 0x100>;
+ clocks = <&k3_clks 296 1>;
+ power-domains = <&k3_pds 296 TI_SCI_PD_EXCLUSIVE>;
+ assigned-clocks = <&k3_clks 296 1>;
+ assigned-clock-parents = <&k3_clks 296 5>;
+ status = "disabled";
+ };
};
--
2.17.1
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