From: Conor Dooley <conor.dooley@microchip.com>
To: Inochi Amaoto <inochiama@outlook.com>
Cc: Conor Dooley <conor@kernel.org>, <aou@eecs.berkeley.edu>,
<chao.wei@sophgo.com>, <devicetree@vger.kernel.org>,
<emil.renner.berthing@canonical.com>, <guoren@kernel.org>,
<jszhang@kernel.org>, <krzysztof.kozlowski+dt@linaro.org>,
<linux-kernel@vger.kernel.org>, <linux-riscv@lists.infradead.org>,
<palmer@dabbelt.com>, <paul.walmsley@sifive.com>,
<robh+dt@kernel.org>, <xiaoguang.xing@sophgo.com>,
Anup Patel <apatel@ventanamicro.com>,
Chen Wang <wangchen20@iscas.ac.cn>
Subject: Re: [PATCH v3 06/11] dt-bindings: timer: Add Sophgo sg2042 CLINT timer
Date: Thu, 28 Sep 2023 10:55:59 +0100 [thread overview]
Message-ID: <20230928-scorer-study-0de8672fca01@wendy> (raw)
In-Reply-To: <IA1PR20MB495373BAA77A74C5EEB7BE49BBC1A@IA1PR20MB4953.namprd20.prod.outlook.com>
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On Thu, Sep 28, 2023 at 05:39:17PM +0800, Inochi Amaoto wrote:
> >>>> If so, whether we should replace the "thead,c900-clint" with these separate
> >>>> DT to describe the thead clint?
> >>>
> >>> No, since that's a different device, right?
> >>>
> >>
> >> Yes. It seems sophgo defined these by themselves, but the T-HEAD. Sorry
> >> for my mistake.
> >
> >I'm sorry, I don't quite understand this. Do you mean that the IP is not
> >T-Head, but rather designed by Sophgo? If the IP is made by T-Head, then
> >I would expect to see something like
> >
> >compatible = "sophgo,sg2042-aclint-mtimer", "thead,c900-aclint-mtimer";
> >
> >in the dts.
> >
>
> AFAIK, the clint IP is designed by T-HEAD, not Sophgo. Sophgo change this
> IP layout to fit its weird cpu design. But in my test, the timer and mswi
> of clint is compatible with the T-HEAD one.
> So we should treat this as T-HEAD IP, not Sophgo?
Yes, in the way I demonstrated above probably.
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next prev parent reply other threads:[~2023-09-28 9:56 UTC|newest]
Thread overview: 25+ messages / expand[flat|nested] mbox.gz Atom feed top
2023-09-27 8:54 [PATCH v3 00/11] Add Milk-V Pioneer RISC-V board support Chen Wang
2023-09-27 8:58 ` [PATCH v3 01/11] riscv: Add SOPHGO SOC family Kconfig support Chen Wang
2023-09-27 9:00 ` [PATCH v3 02/11] dt-bindings: vendor-prefixes: add milkv/sophgo Chen Wang
2023-09-27 9:00 ` [PATCH v3 03/11] dt-bindings: riscv: add sophgo sg2042 bindings Chen Wang
2023-09-27 9:01 ` [PATCH v3 04/11] dt-bindings: riscv: Add T-HEAD C920 compatibles Chen Wang
2023-09-27 9:01 ` [PATCH v3 05/11] dt-bindings: interrupt-controller: Add Sophgo SG2042 PLIC Chen Wang
2023-09-27 9:01 ` [PATCH v3 06/11] dt-bindings: timer: Add Sophgo sg2042 CLINT timer Chen Wang
2023-09-27 16:01 ` Conor Dooley
2023-09-28 0:34 ` Inochi Amaoto
2023-09-28 6:27 ` Conor Dooley
2023-09-28 8:24 ` Inochi Amaoto
2023-09-28 9:03 ` Conor Dooley
2023-09-28 9:39 ` Inochi Amaoto
2023-09-28 9:55 ` Conor Dooley [this message]
2023-09-27 9:01 ` [PATCH v3 07/11] dt-bindings: interrupt-controller: Add Sophgo sg2042 CLINT mswi Chen Wang
2023-09-27 16:01 ` Conor Dooley
2023-09-27 9:02 ` [PATCH v3 08/11] MAINTAINERS: add two files to sophgo devicetrees entry Chen Wang
2023-09-27 9:02 ` [PATCH v3 09/11] riscv: dts: add initial Sophgo SG2042 SoC device tree Chen Wang
2023-09-27 16:07 ` Conor Dooley
2023-09-27 9:02 ` [PATCH v3 10/11] riscv: dts: sophgo: add Milk-V Pioneer board " Chen Wang
2023-09-27 9:02 ` [PATCH v3 11/11] riscv: defconfig: enable SOPHGO SoC Chen Wang
2023-09-27 16:09 ` [PATCH v3 00/11] Add Milk-V Pioneer RISC-V board support Conor Dooley
2023-09-27 23:39 ` Chen Wang
2023-09-28 7:48 ` Chen Wang
2023-09-28 7:54 ` Conor Dooley
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