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From: Rob Herring <robh@kernel.org>
To: shravan chippa <shravan.chippa@microchip.com>
Cc: green.wan@sifive.com, vkoul@kernel.org,
	krzysztof.kozlowski+dt@linaro.org, palmer@dabbelt.com,
	paul.walmsley@sifive.com, conor+dt@kernel.org,
	dmaengine@vger.kernel.org, devicetree@vger.kernel.org,
	linux-riscv@lists.infradead.org, linux-kernel@vger.kernel.org,
	nagasuresh.relli@microchip.com, praveen.kumar@microchip.com,
	Conor Dooley <conor.dooley@microchip.com>
Subject: Re: [PATCH v2 2/4] dt-bindings: dma: sf-pdma: add new compatible name
Date: Wed, 4 Oct 2023 08:30:21 -0500	[thread overview]
Message-ID: <20231004133021.GB2743005-robh@kernel.org> (raw)
In-Reply-To: <20231003042215.142678-3-shravan.chippa@microchip.com>

On Tue, Oct 03, 2023 at 09:52:13AM +0530, shravan chippa wrote:
> From: Shravan Chippa <shravan.chippa@microchip.com>
> 
> Add new compatible name microchip,mpfs-pdma to support
> out of order dma transfers
> 
> Reviewed-by: Conor Dooley <conor.dooley@microchip.com>
> Signed-off-by: Shravan Chippa <shravan.chippa@microchip.com>
> ---
>  .../bindings/dma/sifive,fu540-c000-pdma.yaml         | 12 ++++++++----
>  1 file changed, 8 insertions(+), 4 deletions(-)
> 
> diff --git a/Documentation/devicetree/bindings/dma/sifive,fu540-c000-pdma.yaml b/Documentation/devicetree/bindings/dma/sifive,fu540-c000-pdma.yaml
> index a1af0b906365..974467c4bacb 100644
> --- a/Documentation/devicetree/bindings/dma/sifive,fu540-c000-pdma.yaml
> +++ b/Documentation/devicetree/bindings/dma/sifive,fu540-c000-pdma.yaml
> @@ -27,10 +27,14 @@ allOf:
>  
>  properties:
>    compatible:
> -    items:
> -      - enum:
> -          - sifive,fu540-c000-pdma
> -      - const: sifive,pdma0
> +    oneOf:
> +      - items:
> +          - const: microchip,mpfs-pdma # Microchip out of order DMA transfer
> +          - const: sifive,fu540-c000-pdma # Sifive in-order DMA transfer

This doesn't really make sense. microchip,mpfs-pdma is compatible with 
sifive,fu540-c000-pdma and sifive,fu540-c000-pdma is compatible with 
sifive,pdma0, but microchip,mpfs-pdma is not compatible with 
sifive,pdma0? (Or replace "compatible with" with "a superset of")

Any fallback is only useful if an OS only understanding the fallback 
will work with the h/w. Does this h/w work without the driver changes?

Rob

  reply	other threads:[~2023-10-04 13:30 UTC|newest]

Thread overview: 16+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2023-10-03  4:22 [PATCH v2 0/4] dma: sf-pdma: various sf-pdma updates for the mpfs platform shravan chippa
2023-10-03  4:22 ` [PATCH v2 1/4] dmaengine: sf-pdma: Support of_dma_controller_register() shravan chippa
2023-10-03  7:36   ` Emil Renner Berthing
2023-10-17 18:33   ` Samuel Holland
2023-10-18  9:16     ` Shravan.Chippa
2023-10-03  4:22 ` [PATCH v2 2/4] dt-bindings: dma: sf-pdma: add new compatible name shravan chippa
2023-10-04 13:30   ` Rob Herring [this message]
2023-10-05 10:54     ` Conor Dooley
2023-10-12  9:22       ` Shravan.Chippa
2023-10-12  9:35         ` Conor Dooley
2023-10-17 17:42       ` Samuel Holland
2023-10-03  4:22 ` [PATCH v2 3/4] dmaengine: sf-pdma: add mpfs-pdma " shravan chippa
2023-10-03  7:35   ` Emil Renner Berthing
2023-10-04  3:47     ` Shravan.Chippa
2023-10-04 13:22   ` Rob Herring
2023-10-03  4:22 ` [PATCH v2 4/4] riscv: dts: microchip: add specific compatible for mpfs' pdma shravan chippa

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