* [PATCH 0/7] Update the device tree for Ampere's BMC platform
@ 2023-10-05 3:55 Chanh Nguyen
2023-10-05 3:55 ` [PATCH 1/7] ARM: dts: aspeed: mtjade, mtmitchell: Update gpio-line-names Chanh Nguyen
` (7 more replies)
0 siblings, 8 replies; 18+ messages in thread
From: Chanh Nguyen @ 2023-10-05 3:55 UTC (permalink / raw)
To: OpenBMC Maillist, Rob Herring, Krzysztof Kozlowski, Conor Dooley,
Joel Stanley, Andrew Jeffery, devicetree, linux-arm-kernel,
linux-aspeed, linux-kernel
Cc: Chanh Nguyen
Updates the device tree to support some features on Ampere's
Mt.Mitchell BMC and Ampere's Mt.Jade BMC.
Chanh Nguyen (7):
ARM: dts: aspeed: mtjade, mtmitchell: Update gpio-line-names
ARM: dts: aspeed: mtjade, mtmitchell: Add new gpio-line-names
ARM: dts: aspeed: mtjade: Add the gpio-hog
ARM: dts: aspeed: mtmitchell: Add LEDs
ARM: dts: aspeed: mtmitchell: Add inlet temperature sensor
ARM: dts: aspeed: mtmitchell: Remove redundant ADC configurations
ARM: dts: aspeed: mtmitchell: Add I2C NVMe alias port
.../dts/aspeed/aspeed-bmc-ampere-mtjade.dts | 66 ++--
.../aspeed/aspeed-bmc-ampere-mtmitchell.dts | 315 ++++++++++++++++--
2 files changed, 334 insertions(+), 47 deletions(-)
--
2.17.1
^ permalink raw reply [flat|nested] 18+ messages in thread
* [PATCH 1/7] ARM: dts: aspeed: mtjade, mtmitchell: Update gpio-line-names
2023-10-05 3:55 [PATCH 0/7] Update the device tree for Ampere's BMC platform Chanh Nguyen
@ 2023-10-05 3:55 ` Chanh Nguyen
2023-10-11 1:48 ` Joel Stanley
2023-10-05 3:55 ` [PATCH 2/7] ARM: dts: aspeed: mtjade, mtmitchell: Add new gpio-line-names Chanh Nguyen
` (6 subsequent siblings)
7 siblings, 1 reply; 18+ messages in thread
From: Chanh Nguyen @ 2023-10-05 3:55 UTC (permalink / raw)
To: OpenBMC Maillist, Rob Herring, Krzysztof Kozlowski, Conor Dooley,
Joel Stanley, Andrew Jeffery, devicetree, linux-arm-kernel,
linux-aspeed, linux-kernel
Cc: Chanh Nguyen
Update GPIO line-name to follow naming convention specified at
github.com/openbmc/docs/blob/master/designs/device-tree-gpio-naming.md
Signed-off-by: Chanh Nguyen <chanh@os.amperecomputing.com>
---
.../dts/aspeed/aspeed-bmc-ampere-mtjade.dts | 42 +++++++++----------
.../aspeed/aspeed-bmc-ampere-mtmitchell.dts | 6 +--
2 files changed, 24 insertions(+), 24 deletions(-)
diff --git a/arch/arm/boot/dts/aspeed/aspeed-bmc-ampere-mtjade.dts b/arch/arm/boot/dts/aspeed/aspeed-bmc-ampere-mtjade.dts
index 0a51d2e32fab..e57efcc8522a 100644
--- a/arch/arm/boot/dts/aspeed/aspeed-bmc-ampere-mtjade.dts
+++ b/arch/arm/boot/dts/aspeed/aspeed-bmc-ampere-mtjade.dts
@@ -760,30 +760,30 @@
&gpio {
gpio-line-names =
- /*A0-A7*/ "","","","S0_BMC_SPECIAL_BOOT","","","","",
- /*B0-B7*/ "BMC_SELECT_EEPROM","","","",
- "POWER_BUTTON","","","",
+ /*A0-A7*/ "","","","host0-special-boot","","","","",
+ /*B0-B7*/ "i2c-backup-sel","","","",
+ "power-button","","","",
/*C0-C7*/ "","","","","","","","",
/*D0-D7*/ "","","","","","","","",
/*E0-E7*/ "","","","","","","","",
- /*F0-F7*/ "","","BMC_SYS_PSON_L","S0_DDR_SAVE","PGOOD",
- "S1_DDR_SAVE","","",
- /*G0-G7*/ "host0-ready","SHD_REQ_L","","S0_OVERTEMP_L","","",
+ /*F0-F7*/ "","","power-chassis-control","s0-ddr-save","power-chassis-good",
+ "s1-ddr-save","","",
+ /*G0-G7*/ "host0-ready","host0-shd-req-n","","s0-overtemp-n","","",
"","",
- /*H0-H7*/ "","","","","PSU1_VIN_GOOD","PSU2_VIN_GOOD","","",
- /*I0-I7*/ "PSU1_PRESENT","PSU2_PRESENT","S1_BMC_SPECIAL_BOOT",
- "","","","","",
- /*J0-J7*/ "S0_HIGHTEMP_L","S0_FAULT_L","S0_SCP_AUTH_FAIL_L","",
+ /*H0-H7*/ "","","","","ps0-vin-good","ps1-vin-good","","",
+ /*I0-I7*/ "presence-ps0","presence-ps1","s1-special-boot",
+ "","","","","",
+ /*J0-J7*/ "s0-hightemp-n","s0-fault-alert","s0-sys-auth-failure-n","",
"","","","",
/*K0-K7*/ "","","","","","","","",
- /*L0-L7*/ "","","","BMC_SYSRESET_L","SPI_AUTH_FAIL_L","","","",
+ /*L0-L7*/ "","","","host0-sysreset-n","s0-spi-auth-fail-n","","","",
/*M0-M7*/ "","","","","","","","",
/*N0-N7*/ "","","","","","","","",
/*O0-O7*/ "","","","","","","","",
/*P0-P7*/ "","","","","","","","",
- /*Q0-Q7*/ "","","","","","UID_BUTTON","","",
- /*R0-R7*/ "","","BMC_EXT_HIGHTEMP_L","OCP_AUX_PWREN",
- "OCP_MAIN_PWREN","RESET_BUTTON","","",
+ /*Q0-Q7*/ "","","","","","identify-button","","",
+ /*R0-R7*/ "","","ext-hightemp-n","",
+ "ocp-main-pwren","reset-button","","",
/*S0-S7*/ "","","","","rtc-battery-voltage-read-enable","","","",
/*T0-T7*/ "","","","","","","","",
/*U0-U7*/ "","","","","","","","",
@@ -791,18 +791,18 @@
/*W0-W7*/ "","","","","","","","",
/*X0-X7*/ "","","","","","","","",
/*Y0-Y7*/ "","","","","","","","",
- /*Z0-Z7*/ "S0_BMC_PLIMIT","S1_FAULT_L","S1_FW_BOOT_OK","","",
- "S1_SCP_AUTH_FAIL_L","S1_OVERTEMP_L","",
+ /*Z0-Z7*/ "s0-plimit","s1-fault-alert","s1-fw-boot-ok","","",
+ "s1-sys-auth-failure-n","s1-overtemp-n","",
/*AA0-AA7*/ "","","","","","","","",
- /*AB0-AB7*/ "S1_HIGHTEMP_L","S1_BMC_PLIMIT","S0_BMC_DDR_ADDR",
- "S1_BMC_DDR_ADR","","","","",
- /*AC0-AC7*/ "SYS_PWR_GD","","","","","BMC_READY","SLAVE_PRESENT_L",
- "BMC_OCP_PG";
+ /*AB0-AB7*/ "s1-hightemp-n","s1-plimit","s0-ddr-addr",
+ "s1-ddr-addr","","","","",
+ /*AC0-AC7*/ "sys-pwr-gd","","","","","","presence-cpu1",
+ "ocp-pgood";
i2c4-o-en-hog {
gpio-hog;
gpios = <ASPEED_GPIO(Y, 2) GPIO_ACTIVE_HIGH>;
output-high;
- line-name = "BMC_I2C4_O_EN";
+ line-name = "i2c4-o-en";
};
};
diff --git a/arch/arm/boot/dts/aspeed/aspeed-bmc-ampere-mtmitchell.dts b/arch/arm/boot/dts/aspeed/aspeed-bmc-ampere-mtmitchell.dts
index 0715cb9ab30c..2f571b43106d 100644
--- a/arch/arm/boot/dts/aspeed/aspeed-bmc-ampere-mtmitchell.dts
+++ b/arch/arm/boot/dts/aspeed/aspeed-bmc-ampere-mtmitchell.dts
@@ -599,17 +599,17 @@
/*Q0-Q7*/ "","","","","","","","",
/*R0-R7*/ "","","","","","","","",
/*S0-S7*/ "","","identify-button","led-identify",
- "s1-ddr-save","spi-nor-access","sys-pgood","presence-cpu1",
+ "s1-ddr-save","spi-nor-access","host0-ready","presence-cpu1",
/*T0-T7*/ "","","","","","","","",
/*U0-U7*/ "","","","","","","","",
/*V0-V7*/ "s0-hightemp-n","s0-fault-alert","s0-sys-auth-failure-n",
- "host0-reboot-ack-n","host0-ready","host0-shd-req-n",
+ "host0-reboot-ack-n","s0-fw-boot-ok","host0-shd-req-n",
"host0-shd-ack-n","s0-overtemp-n",
/*W0-W7*/ "","ocp-main-pwren","ocp-pgood","",
"bmc-ok","bmc-ready","spi0-program-sel","spi0-backup-sel",
/*X0-X7*/ "i2c-backup-sel","s1-fault-alert","s1-fw-boot-ok",
"s1-hightemp-n","s0-spi-auth-fail-n","s1-sys-auth-failure-n",
- "s1-overtemp-n","s1-spi-auth-fail-n",
+ "s1-overtemp-n","cpld-s1-spi-auth-fail-n",
/*Y0-Y7*/ "","","","","","","","host0-special-boot",
/*Z0-Z7*/ "reset-button","ps0-pgood","ps1-pgood","","","","","";
--
2.17.1
^ permalink raw reply related [flat|nested] 18+ messages in thread
* [PATCH 2/7] ARM: dts: aspeed: mtjade, mtmitchell: Add new gpio-line-names
2023-10-05 3:55 [PATCH 0/7] Update the device tree for Ampere's BMC platform Chanh Nguyen
2023-10-05 3:55 ` [PATCH 1/7] ARM: dts: aspeed: mtjade, mtmitchell: Update gpio-line-names Chanh Nguyen
@ 2023-10-05 3:55 ` Chanh Nguyen
2023-10-11 1:48 ` Joel Stanley
2023-10-05 3:55 ` [PATCH 3/7] ARM: dts: aspeed: mtjade: Add the gpio-hog Chanh Nguyen
` (5 subsequent siblings)
7 siblings, 1 reply; 18+ messages in thread
From: Chanh Nguyen @ 2023-10-05 3:55 UTC (permalink / raw)
To: OpenBMC Maillist, Rob Herring, Krzysztof Kozlowski, Conor Dooley,
Joel Stanley, Andrew Jeffery, devicetree, linux-arm-kernel,
linux-aspeed, linux-kernel
Cc: Chanh Nguyen
Add new gpio-line-names from the Mt.Jade and Mt.Mitchell
HW schematic.
Mt.Jade
GPIOB5: presence-cpu0
GPIOF0: ps0-pgood
GPIOF1: ps1-pgood
GPIOG2: host0-shd-ack-n
GPIOH0: uart1-mode1
GPIOH1: uart2-mode1
GPIOH2: uart3-mode1
GPIOH3: uart4-mode1
GPIOH7: i2c6-reset-n
GPIOH3: host0-reboot-ack-n
GPIOM4: s0-i2c9-alert-n
GPIOM5: s1-i2c9-alert-n
GPIOQ6: led-identify
GPIOS0: s0-vr-hot-n
GPIOS1: s1-vr-hot-n
GPIOS5: vr-pmbus-sel-n
GPIOY3: bmc-vga-en-n
GPIOZ3: s0-rtc-lock
GPIOAC2: spi0-program-sel
GPIOAC3: spi0-backup-sel
Mt.Mitchell:
GPIOC3: bmc-debug-mode
GPIOE1: eth-phy-int-n
GPIOH0: jtag-program-sel
GPIOH1: fpga-program-b
GPIOW3: s1-pcp-pgood
Signed-off-by: Chanh Nguyen <chanh@os.amperecomputing.com>
---
.../dts/aspeed/aspeed-bmc-ampere-mtjade.dts | 42 +++++++++----------
.../aspeed/aspeed-bmc-ampere-mtmitchell.dts | 9 ++--
2 files changed, 26 insertions(+), 25 deletions(-)
diff --git a/arch/arm/boot/dts/aspeed/aspeed-bmc-ampere-mtjade.dts b/arch/arm/boot/dts/aspeed/aspeed-bmc-ampere-mtjade.dts
index e57efcc8522a..c87be433bdd0 100644
--- a/arch/arm/boot/dts/aspeed/aspeed-bmc-ampere-mtjade.dts
+++ b/arch/arm/boot/dts/aspeed/aspeed-bmc-ampere-mtjade.dts
@@ -762,42 +762,42 @@
gpio-line-names =
/*A0-A7*/ "","","","host0-special-boot","","","","",
/*B0-B7*/ "i2c-backup-sel","","","",
- "power-button","","","",
+ "power-button","presence-cpu0","","",
/*C0-C7*/ "","","","","","","","",
/*D0-D7*/ "","","","","","","","",
/*E0-E7*/ "","","","","","","","",
- /*F0-F7*/ "","","power-chassis-control","s0-ddr-save","power-chassis-good",
- "s1-ddr-save","","",
- /*G0-G7*/ "host0-ready","host0-shd-req-n","","s0-overtemp-n","","",
- "","",
- /*H0-H7*/ "","","","","ps0-vin-good","ps1-vin-good","","",
- /*I0-I7*/ "presence-ps0","presence-ps1","s1-special-boot",
- "","","","","",
- /*J0-J7*/ "s0-hightemp-n","s0-fault-alert","s0-sys-auth-failure-n","",
- "","","","",
+ /*F0-F7*/ "ps0-pgood","ps1-pgood","power-chassis-control","s0-ddr-save",
+ "power-chassis-good", "s1-ddr-save","","",
+ /*G0-G7*/ "host0-ready","host0-shd-req-n","host0-shd-ack-n",
+ "s0-overtemp-n","","","","",
+ /*H0-H7*/ "uart1-mode1","uart2-mode1","uart3-mode1","uart4-mode1",
+ "ps0-vin-good","ps1-vin-good","","i2c6-reset-n",
+ /*I0-I7*/ "presence-ps0","presence-ps1","s1-special-boot","","","","","",
+ /*J0-J7*/ "s0-hightemp-n","s0-fault-alert","s0-sys-auth-failure-n",
+ "host0-reboot-ack-n","","","","",
/*K0-K7*/ "","","","","","","","",
/*L0-L7*/ "","","","host0-sysreset-n","s0-spi-auth-fail-n","","","",
- /*M0-M7*/ "","","","","","","","",
+ /*M0-M7*/ "","","","","s0-i2c9-alert-n","s1-i2c9-alert-n","","",
/*N0-N7*/ "","","","","","","","",
/*O0-O7*/ "","","","","","","","",
/*P0-P7*/ "","","","","","","","",
- /*Q0-Q7*/ "","","","","","identify-button","","",
- /*R0-R7*/ "","","ext-hightemp-n","",
- "ocp-main-pwren","reset-button","","",
- /*S0-S7*/ "","","","","rtc-battery-voltage-read-enable","","","",
+ /*Q0-Q7*/ "","","","","","identify-button","led-identify","",
+ /*R0-R7*/ "","","ext-hightemp-n","","ocp-main-pwren","reset-button","","",
+ /*S0-S7*/ "s0-vr-hot-n","s1-vr-hot-n","","",
+ "rtc-battery-voltage-read-enable","vr-pmbus-sel-n","","",
/*T0-T7*/ "","","","","","","","",
/*U0-U7*/ "","","","","","","","",
/*V0-V7*/ "","","","","","","","",
/*W0-W7*/ "","","","","","","","",
/*X0-X7*/ "","","","","","","","",
- /*Y0-Y7*/ "","","","","","","","",
- /*Z0-Z7*/ "s0-plimit","s1-fault-alert","s1-fw-boot-ok","","",
+ /*Y0-Y7*/ "","","","bmc-vga-en-n","","","","",
+ /*Z0-Z7*/ "s0-plimit","s1-fault-alert","s1-fw-boot-ok","s0-rtc-lock","",
"s1-sys-auth-failure-n","s1-overtemp-n","",
/*AA0-AA7*/ "","","","","","","","",
- /*AB0-AB7*/ "s1-hightemp-n","s1-plimit","s0-ddr-addr",
- "s1-ddr-addr","","","","",
- /*AC0-AC7*/ "sys-pwr-gd","","","","","","presence-cpu1",
- "ocp-pgood";
+ /*AB0-AB7*/ "s1-hightemp-n","s1-plimit","s0-ddr-addr","s1-ddr-addr","","",
+ "","",
+ /*AC0-AC7*/ "sys-pwr-gd","","spi0-program-sel","spi0-backup-sel","bmc-ok",
+ "","presence-cpu1","ocp-pgood";
i2c4-o-en-hog {
gpio-hog;
diff --git a/arch/arm/boot/dts/aspeed/aspeed-bmc-ampere-mtmitchell.dts b/arch/arm/boot/dts/aspeed/aspeed-bmc-ampere-mtmitchell.dts
index 2f571b43106d..b7c4f7cfad07 100644
--- a/arch/arm/boot/dts/aspeed/aspeed-bmc-ampere-mtmitchell.dts
+++ b/arch/arm/boot/dts/aspeed/aspeed-bmc-ampere-mtmitchell.dts
@@ -575,16 +575,17 @@
gpio-line-names =
/*A0-A7*/ "","","","","","i2c2-reset-n","i2c6-reset-n","i2c4-reset-n",
/*B0-B7*/ "","","","","host0-sysreset-n","host0-pmin-n","","",
- /*C0-C7*/ "s0-vrd-fault-n","s1-vrd-fault-n","","",
+ /*C0-C7*/ "s0-vrd-fault-n","s1-vrd-fault-n","bmc-debug-mode","",
"irq-n","","vrd-sel","spd-sel",
/*D0-D7*/ "presence-ps0","presence-ps1","hsc-12vmain-alt2-n","ext-high-temp-n",
"","bmc-ncsi-txen","","",
- /*E0-E7*/ "","","clk50m-bmc-ncsi","","","","","",
+ /*E0-E7*/ "","eth-phy-int-n","clk50m-bmc-ncsi","","","","","",
/*F0-F7*/ "s0-pcp-oc-warn-n","s1-pcp-oc-warn-n","power-chassis-control",
"cpu-bios-recover","s0-heartbeat","hs-csout-prochot",
"s0-vr-hot-n","s1-vr-hot-n",
/*G0-G7*/ "","","hsc-12vmain-alt1-n","","","","","",
- /*H0-H7*/ "","","wd-disable-n","power-chassis-good","","","","",
+ /*H0-H7*/ "jtag-program-sel","fpga-program-b","wd-disable-n",
+ "power-chassis-good","","","","",
/*I0-I7*/ "","","","","","adc-sw","power-button","rtc-battery-voltage-read-enable",
/*J0-J7*/ "","","","","","","","",
/*K0-K7*/ "","","","","","","","",
@@ -605,7 +606,7 @@
/*V0-V7*/ "s0-hightemp-n","s0-fault-alert","s0-sys-auth-failure-n",
"host0-reboot-ack-n","s0-fw-boot-ok","host0-shd-req-n",
"host0-shd-ack-n","s0-overtemp-n",
- /*W0-W7*/ "","ocp-main-pwren","ocp-pgood","",
+ /*W0-W7*/ "ocp-aux-pwren","ocp-main-pwren","ocp-pgood","s1-pcp-pgood",
"bmc-ok","bmc-ready","spi0-program-sel","spi0-backup-sel",
/*X0-X7*/ "i2c-backup-sel","s1-fault-alert","s1-fw-boot-ok",
"s1-hightemp-n","s0-spi-auth-fail-n","s1-sys-auth-failure-n",
--
2.17.1
^ permalink raw reply related [flat|nested] 18+ messages in thread
* [PATCH 3/7] ARM: dts: aspeed: mtjade: Add the gpio-hog
2023-10-05 3:55 [PATCH 0/7] Update the device tree for Ampere's BMC platform Chanh Nguyen
2023-10-05 3:55 ` [PATCH 1/7] ARM: dts: aspeed: mtjade, mtmitchell: Update gpio-line-names Chanh Nguyen
2023-10-05 3:55 ` [PATCH 2/7] ARM: dts: aspeed: mtjade, mtmitchell: Add new gpio-line-names Chanh Nguyen
@ 2023-10-05 3:55 ` Chanh Nguyen
2023-10-11 1:49 ` Joel Stanley
2023-10-05 3:55 ` [PATCH 4/7] ARM: dts: aspeed: mtmitchell: Add LEDs Chanh Nguyen
` (4 subsequent siblings)
7 siblings, 1 reply; 18+ messages in thread
From: Chanh Nguyen @ 2023-10-05 3:55 UTC (permalink / raw)
To: OpenBMC Maillist, Rob Herring, Krzysztof Kozlowski, Conor Dooley,
Joel Stanley, Andrew Jeffery, devicetree, linux-arm-kernel,
linux-aspeed, linux-kernel
Cc: Chanh Nguyen
Add the GPIOR5 as a gpio-hog with output high so that can
power the OCP card once the BMC booting.
Add the GPIOAC5 as a gpio-hog with output high to notice
the BMC state.
Signed-off-by: Chanh Nguyen <chanh@os.amperecomputing.com>
---
.../boot/dts/aspeed/aspeed-bmc-ampere-mtjade.dts | 14 ++++++++++++++
1 file changed, 14 insertions(+)
diff --git a/arch/arm/boot/dts/aspeed/aspeed-bmc-ampere-mtjade.dts b/arch/arm/boot/dts/aspeed/aspeed-bmc-ampere-mtjade.dts
index c87be433bdd0..8ab5f301f926 100644
--- a/arch/arm/boot/dts/aspeed/aspeed-bmc-ampere-mtjade.dts
+++ b/arch/arm/boot/dts/aspeed/aspeed-bmc-ampere-mtjade.dts
@@ -805,4 +805,18 @@
output-high;
line-name = "i2c4-o-en";
};
+
+ ocp-aux-pwren-hog {
+ gpio-hog;
+ gpios = <ASPEED_GPIO(R, 3) GPIO_ACTIVE_HIGH>;
+ output-high;
+ line-name = "ocp-aux-pwren";
+ };
+
+ bmc-ready {
+ gpio-hog;
+ gpios = <ASPEED_GPIO(AC, 5) GPIO_ACTIVE_HIGH>;
+ output-high;
+ line-name = "bmc-ready";
+ };
};
--
2.17.1
^ permalink raw reply related [flat|nested] 18+ messages in thread
* [PATCH 4/7] ARM: dts: aspeed: mtmitchell: Add LEDs
2023-10-05 3:55 [PATCH 0/7] Update the device tree for Ampere's BMC platform Chanh Nguyen
` (2 preceding siblings ...)
2023-10-05 3:55 ` [PATCH 3/7] ARM: dts: aspeed: mtjade: Add the gpio-hog Chanh Nguyen
@ 2023-10-05 3:55 ` Chanh Nguyen
2023-10-05 7:31 ` Krzysztof Kozlowski
2023-10-05 3:55 ` [PATCH 5/7] ARM: dts: aspeed: mtmitchell: Add inlet temperature sensor Chanh Nguyen
` (3 subsequent siblings)
7 siblings, 1 reply; 18+ messages in thread
From: Chanh Nguyen @ 2023-10-05 3:55 UTC (permalink / raw)
To: OpenBMC Maillist, Rob Herring, Krzysztof Kozlowski, Conor Dooley,
Joel Stanley, Andrew Jeffery, devicetree, linux-arm-kernel,
linux-aspeed, linux-kernel
Cc: Chanh Nguyen
Use gpio-leds to configure GPIOW5 to GPIO_ACTIVE_HIGH and
GPIO_TRANSITORY flags as a bmc ready led. The GPIOW5 pin
is reset when watchdog timeout occurs.
Configure the GPIOS3 to GPIO_ACTIVE_HIGH as an identify led.
Signed-off-by: Chanh Nguyen <chanh@os.amperecomputing.com>
---
.../dts/aspeed/aspeed-bmc-ampere-mtmitchell.dts | 13 +++++++++++++
1 file changed, 13 insertions(+)
diff --git a/arch/arm/boot/dts/aspeed/aspeed-bmc-ampere-mtmitchell.dts b/arch/arm/boot/dts/aspeed/aspeed-bmc-ampere-mtmitchell.dts
index b7c4f7cfad07..88693c2b2dbe 100644
--- a/arch/arm/boot/dts/aspeed/aspeed-bmc-ampere-mtmitchell.dts
+++ b/arch/arm/boot/dts/aspeed/aspeed-bmc-ampere-mtmitchell.dts
@@ -51,6 +51,19 @@
};
};
+ leds {
+ compatible = "gpio-leds";
+
+ bmc-ready {
+ gpios = <&gpio0 ASPEED_GPIO(W, 5) (GPIO_ACTIVE_HIGH |
+ GPIO_TRANSITORY)>;
+ };
+
+ identify {
+ gpios = <&gpio0 ASPEED_GPIO(S, 3) GPIO_ACTIVE_HIGH>;
+ };
+ };
+
voltage_mon_reg: voltage-mon-regulator {
compatible = "regulator-fixed";
regulator-name = "ltc2497_reg";
--
2.17.1
^ permalink raw reply related [flat|nested] 18+ messages in thread
* [PATCH 5/7] ARM: dts: aspeed: mtmitchell: Add inlet temperature sensor
2023-10-05 3:55 [PATCH 0/7] Update the device tree for Ampere's BMC platform Chanh Nguyen
` (3 preceding siblings ...)
2023-10-05 3:55 ` [PATCH 4/7] ARM: dts: aspeed: mtmitchell: Add LEDs Chanh Nguyen
@ 2023-10-05 3:55 ` Chanh Nguyen
2023-10-11 1:51 ` Joel Stanley
2023-10-05 3:55 ` [PATCH 6/7] ARM: dts: aspeed: mtmitchell: Remove redundant ADC configurations Chanh Nguyen
` (2 subsequent siblings)
7 siblings, 1 reply; 18+ messages in thread
From: Chanh Nguyen @ 2023-10-05 3:55 UTC (permalink / raw)
To: OpenBMC Maillist, Rob Herring, Krzysztof Kozlowski, Conor Dooley,
Joel Stanley, Andrew Jeffery, devicetree, linux-arm-kernel,
linux-aspeed, linux-kernel
Cc: Chanh Nguyen
Add the inlet temperature at address 0x48, which is connected
via BMC I2C8.
Signed-off-by: Chanh Nguyen <chanh@os.amperecomputing.com>
---
arch/arm/boot/dts/aspeed/aspeed-bmc-ampere-mtmitchell.dts | 5 +++++
1 file changed, 5 insertions(+)
diff --git a/arch/arm/boot/dts/aspeed/aspeed-bmc-ampere-mtmitchell.dts b/arch/arm/boot/dts/aspeed/aspeed-bmc-ampere-mtmitchell.dts
index 88693c2b2dbe..c676172f0dbf 100644
--- a/arch/arm/boot/dts/aspeed/aspeed-bmc-ampere-mtmitchell.dts
+++ b/arch/arm/boot/dts/aspeed/aspeed-bmc-ampere-mtmitchell.dts
@@ -510,6 +510,11 @@
&i2c8 {
status = "okay";
+ temperature-sensor@48 {
+ compatible = "ti,tmp112";
+ reg = <0x48>;
+ };
+
gpio@77 {
compatible = "nxp,pca9539";
reg = <0x77>;
--
2.17.1
^ permalink raw reply related [flat|nested] 18+ messages in thread
* [PATCH 6/7] ARM: dts: aspeed: mtmitchell: Remove redundant ADC configurations
2023-10-05 3:55 [PATCH 0/7] Update the device tree for Ampere's BMC platform Chanh Nguyen
` (4 preceding siblings ...)
2023-10-05 3:55 ` [PATCH 5/7] ARM: dts: aspeed: mtmitchell: Add inlet temperature sensor Chanh Nguyen
@ 2023-10-05 3:55 ` Chanh Nguyen
2023-10-11 1:51 ` Joel Stanley
2023-10-05 3:55 ` [PATCH 7/7] ARM: dts: aspeed: mtmitchell: Add I2C NVMe alias port Chanh Nguyen
2023-10-11 8:31 ` [PATCH 0/7] Update the device tree for Ampere's BMC platform Joel Stanley
7 siblings, 1 reply; 18+ messages in thread
From: Chanh Nguyen @ 2023-10-05 3:55 UTC (permalink / raw)
To: OpenBMC Maillist, Rob Herring, Krzysztof Kozlowski, Conor Dooley,
Joel Stanley, Andrew Jeffery, devicetree, linux-arm-kernel,
linux-aspeed, linux-kernel
Cc: Chanh Nguyen
Mt.Mitchell DVT and later hardware do not use adc1. It only uses
adc0 with channels 0, 1 and 2. This commit removes redundant ADC
configurations.
Signed-off-by: Chanh Nguyen <chanh@os.amperecomputing.com>
---
.../dts/aspeed/aspeed-bmc-ampere-mtmitchell.dts | 15 +--------------
1 file changed, 1 insertion(+), 14 deletions(-)
diff --git a/arch/arm/boot/dts/aspeed/aspeed-bmc-ampere-mtmitchell.dts b/arch/arm/boot/dts/aspeed/aspeed-bmc-ampere-mtmitchell.dts
index c676172f0dbf..eb8d5e367276 100644
--- a/arch/arm/boot/dts/aspeed/aspeed-bmc-ampere-mtmitchell.dts
+++ b/arch/arm/boot/dts/aspeed/aspeed-bmc-ampere-mtmitchell.dts
@@ -564,20 +564,7 @@
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_adc0_default &pinctrl_adc1_default
- &pinctrl_adc2_default &pinctrl_adc3_default
- &pinctrl_adc4_default &pinctrl_adc5_default
- &pinctrl_adc6_default &pinctrl_adc7_default>;
-};
-
-&adc1 {
- ref_voltage = <2500>;
- status = "okay";
-
- pinctrl-names = "default";
- pinctrl-0 = <&pinctrl_adc8_default &pinctrl_adc9_default
- &pinctrl_adc10_default &pinctrl_adc11_default
- &pinctrl_adc12_default &pinctrl_adc13_default
- &pinctrl_adc14_default &pinctrl_adc15_default>;
+ &pinctrl_adc2_default>;
};
&vhub {
--
2.17.1
^ permalink raw reply related [flat|nested] 18+ messages in thread
* [PATCH 7/7] ARM: dts: aspeed: mtmitchell: Add I2C NVMe alias port
2023-10-05 3:55 [PATCH 0/7] Update the device tree for Ampere's BMC platform Chanh Nguyen
` (5 preceding siblings ...)
2023-10-05 3:55 ` [PATCH 6/7] ARM: dts: aspeed: mtmitchell: Remove redundant ADC configurations Chanh Nguyen
@ 2023-10-05 3:55 ` Chanh Nguyen
2023-10-11 1:52 ` Joel Stanley
2023-10-11 8:31 ` [PATCH 0/7] Update the device tree for Ampere's BMC platform Joel Stanley
7 siblings, 1 reply; 18+ messages in thread
From: Chanh Nguyen @ 2023-10-05 3:55 UTC (permalink / raw)
To: OpenBMC Maillist, Rob Herring, Krzysztof Kozlowski, Conor Dooley,
Joel Stanley, Andrew Jeffery, devicetree, linux-arm-kernel,
linux-aspeed, linux-kernel
Cc: Chanh Nguyen
Adds the I2C alias ports to each NVMe drive via the
backplane card.
Besides that, it also adds the eeprom and temperature sensor
on the backplane card.
Signed-off-by: Chanh Nguyen <chanh@os.amperecomputing.com>
---
.../aspeed/aspeed-bmc-ampere-mtmitchell.dts | 267 ++++++++++++++++++
1 file changed, 267 insertions(+)
diff --git a/arch/arm/boot/dts/aspeed/aspeed-bmc-ampere-mtmitchell.dts b/arch/arm/boot/dts/aspeed/aspeed-bmc-ampere-mtmitchell.dts
index eb8d5e367276..1f70e3e4e83b 100644
--- a/arch/arm/boot/dts/aspeed/aspeed-bmc-ampere-mtmitchell.dts
+++ b/arch/arm/boot/dts/aspeed/aspeed-bmc-ampere-mtmitchell.dts
@@ -14,6 +14,42 @@
aliases {
serial7 = &uart8;
serial8 = &uart9;
+
+ /*
+ * I2C NVMe alias port
+ */
+ i2c100 = &backplane_0;
+ i2c48 = &nvmeslot_0;
+ i2c49 = &nvmeslot_1;
+ i2c50 = &nvmeslot_2;
+ i2c51 = &nvmeslot_3;
+ i2c52 = &nvmeslot_4;
+ i2c53 = &nvmeslot_5;
+ i2c54 = &nvmeslot_6;
+ i2c55 = &nvmeslot_7;
+
+ i2c101 = &backplane_1;
+ i2c56 = &nvmeslot_8;
+ i2c57 = &nvmeslot_9;
+ i2c58 = &nvmeslot_10;
+ i2c59 = &nvmeslot_11;
+ i2c60 = &nvmeslot_12;
+ i2c61 = &nvmeslot_13;
+ i2c62 = &nvmeslot_14;
+ i2c63 = &nvmeslot_15;
+
+ i2c102 = &backplane_2;
+ i2c64 = &nvmeslot_16;
+ i2c65 = &nvmeslot_17;
+ i2c66 = &nvmeslot_18;
+ i2c67 = &nvmeslot_19;
+ i2c68 = &nvmeslot_20;
+ i2c69 = &nvmeslot_21;
+ i2c70 = &nvmeslot_22;
+ i2c71 = &nvmeslot_23;
+
+ i2c80 = &nvme_m2_0;
+ i2c81 = &nvme_m2_1;
};
chosen {
@@ -534,6 +570,237 @@
&i2c9 {
status = "okay";
+ i2c-mux@70 {
+ compatible = "nxp,pca9548";
+ #address-cells = <1>;
+ #size-cells = <0>;
+ reg = <0x70>;
+ i2c-mux-idle-disconnect;
+
+ backplane_1: i2c@0 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ reg = <0x0>;
+
+ eeprom@50 {
+ compatible = "atmel,24c64";
+ reg = <0x50>;
+ pagesize = <32>;
+ };
+
+ i2c-mux@71 {
+ compatible = "nxp,pca9548";
+ #address-cells = <1>;
+ #size-cells = <0>;
+ reg = <0x71>;
+ i2c-mux-idle-disconnect;
+
+ nvmeslot_8: i2c@0 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ reg = <0x0>;
+ };
+ nvmeslot_9: i2c@1 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ reg = <0x1>;
+ };
+ nvmeslot_10: i2c@2 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ reg = <0x2>;
+ };
+ nvmeslot_11: i2c@3 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ reg = <0x3>;
+ };
+ nvmeslot_12: i2c@4 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ reg = <0x4>;
+ };
+ nvmeslot_13: i2c@5 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ reg = <0x5>;
+ };
+ nvmeslot_14: i2c@6 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ reg = <0x6>;
+ };
+ nvmeslot_15: i2c@7 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ reg = <0x7>;
+ };
+ };
+
+ tmp432@4c {
+ compatible = "ti,tmp75";
+ reg = <0x4c>;
+ };
+ };
+
+ backplane_2: i2c@2 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ reg = <0x2>;
+
+ eeprom@50 {
+ compatible = "atmel,24c64";
+ reg = <0x50>;
+ pagesize = <32>;
+ };
+
+ i2c-mux@71 {
+ compatible = "nxp,pca9548";
+ #address-cells = <1>;
+ #size-cells = <0>;
+ reg = <0x71>;
+ i2c-mux-idle-disconnect;
+
+ nvmeslot_16: i2c@0 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ reg = <0x0>;
+ };
+ nvmeslot_17: i2c@1 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ reg = <0x1>;
+ };
+ nvmeslot_18: i2c@2 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ reg = <0x2>;
+ };
+ nvmeslot_19: i2c@3 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ reg = <0x3>;
+ };
+ nvmeslot_20: i2c@4 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ reg = <0x4>;
+ };
+ nvmeslot_21: i2c@5 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ reg = <0x5>;
+ };
+ nvmeslot_22: i2c@6 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ reg = <0x6>;
+ };
+ nvmeslot_23: i2c@7 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ reg = <0x7>;
+ };
+ };
+
+ tmp432@4c {
+ compatible = "ti,tmp75";
+ reg = <0x4c>;
+ };
+ };
+
+ backplane_0: i2c@4 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ reg = <0x4>;
+
+ eeprom@50 {
+ compatible = "atmel,24c64";
+ reg = <0x50>;
+ pagesize = <32>;
+ };
+
+ i2c-mux@71 {
+ compatible = "nxp,pca9548";
+ #address-cells = <1>;
+ #size-cells = <0>;
+ reg = <0x71>;
+ i2c-mux-idle-disconnect;
+
+ nvmeslot_0: i2c@0 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ reg = <0x0>;
+ };
+ nvmeslot_1: i2c@1 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ reg = <0x1>;
+ };
+ nvmeslot_2: i2c@2 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ reg = <0x2>;
+ };
+ nvmeslot_3: i2c@3 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ reg = <0x3>;
+ };
+ nvmeslot_4: i2c@4 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ reg = <0x4>;
+ };
+ nvmeslot_5: i2c@5 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ reg = <0x5>;
+ };
+ nvmeslot_6: i2c@6 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ reg = <0x6>;
+ };
+ nvmeslot_7: i2c@7 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ reg = <0x7>;
+ };
+ };
+
+ tmp432@4c {
+ compatible = "ti,tmp75";
+ reg = <0x4c>;
+ };
+ };
+
+ i2c@7 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ reg = <0x7>;
+
+ i2c-mux@71 {
+ compatible = "nxp,pca9546";
+ #address-cells = <1>;
+ #size-cells = <0>;
+ reg = <0x71>;
+ i2c-mux-idle-disconnect;
+
+ nvme_m2_0: i2c@0 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ reg = <0x0>;
+ };
+
+ nvme_m2_1: i2c@1 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ reg = <0x1>;
+ };
+ };
+ };
+ };
};
&i2c11 {
--
2.17.1
^ permalink raw reply related [flat|nested] 18+ messages in thread
* Re: [PATCH 4/7] ARM: dts: aspeed: mtmitchell: Add LEDs
2023-10-05 3:55 ` [PATCH 4/7] ARM: dts: aspeed: mtmitchell: Add LEDs Chanh Nguyen
@ 2023-10-05 7:31 ` Krzysztof Kozlowski
2023-10-10 3:28 ` Chanh Nguyen
0 siblings, 1 reply; 18+ messages in thread
From: Krzysztof Kozlowski @ 2023-10-05 7:31 UTC (permalink / raw)
To: Chanh Nguyen, OpenBMC Maillist, Rob Herring, Krzysztof Kozlowski,
Conor Dooley, Joel Stanley, Andrew Jeffery, devicetree,
linux-arm-kernel, linux-aspeed, linux-kernel
On 05/10/2023 05:55, Chanh Nguyen wrote:
> Use gpio-leds to configure GPIOW5 to GPIO_ACTIVE_HIGH and
> GPIO_TRANSITORY flags as a bmc ready led. The GPIOW5 pin
> is reset when watchdog timeout occurs.
>
> Configure the GPIOS3 to GPIO_ACTIVE_HIGH as an identify led.
>
> Signed-off-by: Chanh Nguyen <chanh@os.amperecomputing.com>
> ---
> .../dts/aspeed/aspeed-bmc-ampere-mtmitchell.dts | 13 +++++++++++++
> 1 file changed, 13 insertions(+)
>
> diff --git a/arch/arm/boot/dts/aspeed/aspeed-bmc-ampere-mtmitchell.dts b/arch/arm/boot/dts/aspeed/aspeed-bmc-ampere-mtmitchell.dts
> index b7c4f7cfad07..88693c2b2dbe 100644
> --- a/arch/arm/boot/dts/aspeed/aspeed-bmc-ampere-mtmitchell.dts
> +++ b/arch/arm/boot/dts/aspeed/aspeed-bmc-ampere-mtmitchell.dts
> @@ -51,6 +51,19 @@
> };
> };
>
> + leds {
> + compatible = "gpio-leds";
> +
> + bmc-ready {
Missing led name.
It does not look like you tested the DTS against bindings. Please run
`make dtbs_check W=1` (see
Documentation/devicetree/bindings/writing-schema.rst or
https://www.linaro.org/blog/tips-and-tricks-for-validating-devicetree-sources-with-the-devicetree-schema/
for instructions).
Best regards,
Krzysztof
^ permalink raw reply [flat|nested] 18+ messages in thread
* Re: [PATCH 4/7] ARM: dts: aspeed: mtmitchell: Add LEDs
2023-10-05 7:31 ` Krzysztof Kozlowski
@ 2023-10-10 3:28 ` Chanh Nguyen
0 siblings, 0 replies; 18+ messages in thread
From: Chanh Nguyen @ 2023-10-10 3:28 UTC (permalink / raw)
To: Krzysztof Kozlowski, Chanh Nguyen, OpenBMC Maillist, Rob Herring,
Krzysztof Kozlowski, Conor Dooley, Joel Stanley, Andrew Jeffery,
devicetree, linux-arm-kernel, linux-aspeed, linux-kernel
On 05/10/2023 14:31, Krzysztof Kozlowski wrote:
> On 05/10/2023 05:55, Chanh Nguyen wrote:
>> Use gpio-leds to configure GPIOW5 to GPIO_ACTIVE_HIGH and
>> GPIO_TRANSITORY flags as a bmc ready led. The GPIOW5 pin
>> is reset when watchdog timeout occurs.
>>
>> Configure the GPIOS3 to GPIO_ACTIVE_HIGH as an identify led.
>>
>> Signed-off-by: Chanh Nguyen <chanh@os.amperecomputing.com>
>> ---
>> .../dts/aspeed/aspeed-bmc-ampere-mtmitchell.dts | 13 +++++++++++++
>> 1 file changed, 13 insertions(+)
>>
>> diff --git a/arch/arm/boot/dts/aspeed/aspeed-bmc-ampere-mtmitchell.dts b/arch/arm/boot/dts/aspeed/aspeed-bmc-ampere-mtmitchell.dts
>> index b7c4f7cfad07..88693c2b2dbe 100644
>> --- a/arch/arm/boot/dts/aspeed/aspeed-bmc-ampere-mtmitchell.dts
>> +++ b/arch/arm/boot/dts/aspeed/aspeed-bmc-ampere-mtmitchell.dts
>> @@ -51,6 +51,19 @@
>> };
>> };
>>
>> + leds {
>> + compatible = "gpio-leds";
>> +
>> + bmc-ready {
>
> Missing led name.
>
> It does not look like you tested the DTS against bindings. Please run
> `make dtbs_check W=1` (see
> Documentation/devicetree/bindings/writing-schema.rst or
> https://www.linaro.org/blog/tips-and-tricks-for-validating-devicetree-sources-with-the-devicetree-schema/
> for instructions).
>
> Best regards,
> Krzysztof
>
Thank Krzysztof! I'll test the DTS against bindings and update it in
patch series v2.
^ permalink raw reply [flat|nested] 18+ messages in thread
* Re: [PATCH 1/7] ARM: dts: aspeed: mtjade, mtmitchell: Update gpio-line-names
2023-10-05 3:55 ` [PATCH 1/7] ARM: dts: aspeed: mtjade, mtmitchell: Update gpio-line-names Chanh Nguyen
@ 2023-10-11 1:48 ` Joel Stanley
0 siblings, 0 replies; 18+ messages in thread
From: Joel Stanley @ 2023-10-11 1:48 UTC (permalink / raw)
To: Chanh Nguyen
Cc: OpenBMC Maillist, Rob Herring, Krzysztof Kozlowski, Conor Dooley,
Andrew Jeffery, devicetree, linux-arm-kernel, linux-aspeed,
linux-kernel
On Thu, 5 Oct 2023 at 14:26, Chanh Nguyen <chanh@os.amperecomputing.com> wrote:
>
> Update GPIO line-name to follow naming convention specified at
> github.com/openbmc/docs/blob/master/designs/device-tree-gpio-naming.md
>
> Signed-off-by: Chanh Nguyen <chanh@os.amperecomputing.com>
Reviewed-by: Joel Stanley <joel@jms.id.au>
> ---
> .../dts/aspeed/aspeed-bmc-ampere-mtjade.dts | 42 +++++++++----------
> .../aspeed/aspeed-bmc-ampere-mtmitchell.dts | 6 +--
> 2 files changed, 24 insertions(+), 24 deletions(-)
>
> diff --git a/arch/arm/boot/dts/aspeed/aspeed-bmc-ampere-mtjade.dts b/arch/arm/boot/dts/aspeed/aspeed-bmc-ampere-mtjade.dts
> index 0a51d2e32fab..e57efcc8522a 100644
> --- a/arch/arm/boot/dts/aspeed/aspeed-bmc-ampere-mtjade.dts
> +++ b/arch/arm/boot/dts/aspeed/aspeed-bmc-ampere-mtjade.dts
> @@ -760,30 +760,30 @@
>
> &gpio {
> gpio-line-names =
> - /*A0-A7*/ "","","","S0_BMC_SPECIAL_BOOT","","","","",
> - /*B0-B7*/ "BMC_SELECT_EEPROM","","","",
> - "POWER_BUTTON","","","",
> + /*A0-A7*/ "","","","host0-special-boot","","","","",
> + /*B0-B7*/ "i2c-backup-sel","","","",
> + "power-button","","","",
> /*C0-C7*/ "","","","","","","","",
> /*D0-D7*/ "","","","","","","","",
> /*E0-E7*/ "","","","","","","","",
> - /*F0-F7*/ "","","BMC_SYS_PSON_L","S0_DDR_SAVE","PGOOD",
> - "S1_DDR_SAVE","","",
> - /*G0-G7*/ "host0-ready","SHD_REQ_L","","S0_OVERTEMP_L","","",
> + /*F0-F7*/ "","","power-chassis-control","s0-ddr-save","power-chassis-good",
> + "s1-ddr-save","","",
> + /*G0-G7*/ "host0-ready","host0-shd-req-n","","s0-overtemp-n","","",
> "","",
> - /*H0-H7*/ "","","","","PSU1_VIN_GOOD","PSU2_VIN_GOOD","","",
> - /*I0-I7*/ "PSU1_PRESENT","PSU2_PRESENT","S1_BMC_SPECIAL_BOOT",
> - "","","","","",
> - /*J0-J7*/ "S0_HIGHTEMP_L","S0_FAULT_L","S0_SCP_AUTH_FAIL_L","",
> + /*H0-H7*/ "","","","","ps0-vin-good","ps1-vin-good","","",
> + /*I0-I7*/ "presence-ps0","presence-ps1","s1-special-boot",
> + "","","","","",
> + /*J0-J7*/ "s0-hightemp-n","s0-fault-alert","s0-sys-auth-failure-n","",
> "","","","",
> /*K0-K7*/ "","","","","","","","",
> - /*L0-L7*/ "","","","BMC_SYSRESET_L","SPI_AUTH_FAIL_L","","","",
> + /*L0-L7*/ "","","","host0-sysreset-n","s0-spi-auth-fail-n","","","",
> /*M0-M7*/ "","","","","","","","",
> /*N0-N7*/ "","","","","","","","",
> /*O0-O7*/ "","","","","","","","",
> /*P0-P7*/ "","","","","","","","",
> - /*Q0-Q7*/ "","","","","","UID_BUTTON","","",
> - /*R0-R7*/ "","","BMC_EXT_HIGHTEMP_L","OCP_AUX_PWREN",
> - "OCP_MAIN_PWREN","RESET_BUTTON","","",
> + /*Q0-Q7*/ "","","","","","identify-button","","",
> + /*R0-R7*/ "","","ext-hightemp-n","",
> + "ocp-main-pwren","reset-button","","",
> /*S0-S7*/ "","","","","rtc-battery-voltage-read-enable","","","",
> /*T0-T7*/ "","","","","","","","",
> /*U0-U7*/ "","","","","","","","",
> @@ -791,18 +791,18 @@
> /*W0-W7*/ "","","","","","","","",
> /*X0-X7*/ "","","","","","","","",
> /*Y0-Y7*/ "","","","","","","","",
> - /*Z0-Z7*/ "S0_BMC_PLIMIT","S1_FAULT_L","S1_FW_BOOT_OK","","",
> - "S1_SCP_AUTH_FAIL_L","S1_OVERTEMP_L","",
> + /*Z0-Z7*/ "s0-plimit","s1-fault-alert","s1-fw-boot-ok","","",
> + "s1-sys-auth-failure-n","s1-overtemp-n","",
> /*AA0-AA7*/ "","","","","","","","",
> - /*AB0-AB7*/ "S1_HIGHTEMP_L","S1_BMC_PLIMIT","S0_BMC_DDR_ADDR",
> - "S1_BMC_DDR_ADR","","","","",
> - /*AC0-AC7*/ "SYS_PWR_GD","","","","","BMC_READY","SLAVE_PRESENT_L",
> - "BMC_OCP_PG";
> + /*AB0-AB7*/ "s1-hightemp-n","s1-plimit","s0-ddr-addr",
> + "s1-ddr-addr","","","","",
> + /*AC0-AC7*/ "sys-pwr-gd","","","","","","presence-cpu1",
> + "ocp-pgood";
>
> i2c4-o-en-hog {
> gpio-hog;
> gpios = <ASPEED_GPIO(Y, 2) GPIO_ACTIVE_HIGH>;
> output-high;
> - line-name = "BMC_I2C4_O_EN";
> + line-name = "i2c4-o-en";
> };
> };
> diff --git a/arch/arm/boot/dts/aspeed/aspeed-bmc-ampere-mtmitchell.dts b/arch/arm/boot/dts/aspeed/aspeed-bmc-ampere-mtmitchell.dts
> index 0715cb9ab30c..2f571b43106d 100644
> --- a/arch/arm/boot/dts/aspeed/aspeed-bmc-ampere-mtmitchell.dts
> +++ b/arch/arm/boot/dts/aspeed/aspeed-bmc-ampere-mtmitchell.dts
> @@ -599,17 +599,17 @@
> /*Q0-Q7*/ "","","","","","","","",
> /*R0-R7*/ "","","","","","","","",
> /*S0-S7*/ "","","identify-button","led-identify",
> - "s1-ddr-save","spi-nor-access","sys-pgood","presence-cpu1",
> + "s1-ddr-save","spi-nor-access","host0-ready","presence-cpu1",
> /*T0-T7*/ "","","","","","","","",
> /*U0-U7*/ "","","","","","","","",
> /*V0-V7*/ "s0-hightemp-n","s0-fault-alert","s0-sys-auth-failure-n",
> - "host0-reboot-ack-n","host0-ready","host0-shd-req-n",
> + "host0-reboot-ack-n","s0-fw-boot-ok","host0-shd-req-n",
> "host0-shd-ack-n","s0-overtemp-n",
> /*W0-W7*/ "","ocp-main-pwren","ocp-pgood","",
> "bmc-ok","bmc-ready","spi0-program-sel","spi0-backup-sel",
> /*X0-X7*/ "i2c-backup-sel","s1-fault-alert","s1-fw-boot-ok",
> "s1-hightemp-n","s0-spi-auth-fail-n","s1-sys-auth-failure-n",
> - "s1-overtemp-n","s1-spi-auth-fail-n",
> + "s1-overtemp-n","cpld-s1-spi-auth-fail-n",
> /*Y0-Y7*/ "","","","","","","","host0-special-boot",
> /*Z0-Z7*/ "reset-button","ps0-pgood","ps1-pgood","","","","","";
>
> --
> 2.17.1
>
^ permalink raw reply [flat|nested] 18+ messages in thread
* Re: [PATCH 2/7] ARM: dts: aspeed: mtjade, mtmitchell: Add new gpio-line-names
2023-10-05 3:55 ` [PATCH 2/7] ARM: dts: aspeed: mtjade, mtmitchell: Add new gpio-line-names Chanh Nguyen
@ 2023-10-11 1:48 ` Joel Stanley
0 siblings, 0 replies; 18+ messages in thread
From: Joel Stanley @ 2023-10-11 1:48 UTC (permalink / raw)
To: Chanh Nguyen
Cc: OpenBMC Maillist, Rob Herring, Krzysztof Kozlowski, Conor Dooley,
Andrew Jeffery, devicetree, linux-arm-kernel, linux-aspeed,
linux-kernel
On Thu, 5 Oct 2023 at 14:26, Chanh Nguyen <chanh@os.amperecomputing.com> wrote:
>
> Add new gpio-line-names from the Mt.Jade and Mt.Mitchell
> HW schematic.
>
> Mt.Jade
> GPIOB5: presence-cpu0
> GPIOF0: ps0-pgood
> GPIOF1: ps1-pgood
> GPIOG2: host0-shd-ack-n
> GPIOH0: uart1-mode1
> GPIOH1: uart2-mode1
> GPIOH2: uart3-mode1
> GPIOH3: uart4-mode1
> GPIOH7: i2c6-reset-n
> GPIOH3: host0-reboot-ack-n
> GPIOM4: s0-i2c9-alert-n
> GPIOM5: s1-i2c9-alert-n
> GPIOQ6: led-identify
> GPIOS0: s0-vr-hot-n
> GPIOS1: s1-vr-hot-n
> GPIOS5: vr-pmbus-sel-n
> GPIOY3: bmc-vga-en-n
> GPIOZ3: s0-rtc-lock
> GPIOAC2: spi0-program-sel
> GPIOAC3: spi0-backup-sel
>
> Mt.Mitchell:
> GPIOC3: bmc-debug-mode
> GPIOE1: eth-phy-int-n
> GPIOH0: jtag-program-sel
> GPIOH1: fpga-program-b
> GPIOW3: s1-pcp-pgood
>
> Signed-off-by: Chanh Nguyen <chanh@os.amperecomputing.com>
I didn't check that you had the assignments correct, but the structure
looks good.
Reviewed-by: Joel Stanley <joel@jms.id.au>
> ---
> .../dts/aspeed/aspeed-bmc-ampere-mtjade.dts | 42 +++++++++----------
> .../aspeed/aspeed-bmc-ampere-mtmitchell.dts | 9 ++--
> 2 files changed, 26 insertions(+), 25 deletions(-)
>
> diff --git a/arch/arm/boot/dts/aspeed/aspeed-bmc-ampere-mtjade.dts b/arch/arm/boot/dts/aspeed/aspeed-bmc-ampere-mtjade.dts
> index e57efcc8522a..c87be433bdd0 100644
> --- a/arch/arm/boot/dts/aspeed/aspeed-bmc-ampere-mtjade.dts
> +++ b/arch/arm/boot/dts/aspeed/aspeed-bmc-ampere-mtjade.dts
> @@ -762,42 +762,42 @@
> gpio-line-names =
> /*A0-A7*/ "","","","host0-special-boot","","","","",
> /*B0-B7*/ "i2c-backup-sel","","","",
> - "power-button","","","",
> + "power-button","presence-cpu0","","",
> /*C0-C7*/ "","","","","","","","",
> /*D0-D7*/ "","","","","","","","",
> /*E0-E7*/ "","","","","","","","",
> - /*F0-F7*/ "","","power-chassis-control","s0-ddr-save","power-chassis-good",
> - "s1-ddr-save","","",
> - /*G0-G7*/ "host0-ready","host0-shd-req-n","","s0-overtemp-n","","",
> - "","",
> - /*H0-H7*/ "","","","","ps0-vin-good","ps1-vin-good","","",
> - /*I0-I7*/ "presence-ps0","presence-ps1","s1-special-boot",
> - "","","","","",
> - /*J0-J7*/ "s0-hightemp-n","s0-fault-alert","s0-sys-auth-failure-n","",
> - "","","","",
> + /*F0-F7*/ "ps0-pgood","ps1-pgood","power-chassis-control","s0-ddr-save",
> + "power-chassis-good", "s1-ddr-save","","",
> + /*G0-G7*/ "host0-ready","host0-shd-req-n","host0-shd-ack-n",
> + "s0-overtemp-n","","","","",
> + /*H0-H7*/ "uart1-mode1","uart2-mode1","uart3-mode1","uart4-mode1",
> + "ps0-vin-good","ps1-vin-good","","i2c6-reset-n",
> + /*I0-I7*/ "presence-ps0","presence-ps1","s1-special-boot","","","","","",
> + /*J0-J7*/ "s0-hightemp-n","s0-fault-alert","s0-sys-auth-failure-n",
> + "host0-reboot-ack-n","","","","",
> /*K0-K7*/ "","","","","","","","",
> /*L0-L7*/ "","","","host0-sysreset-n","s0-spi-auth-fail-n","","","",
> - /*M0-M7*/ "","","","","","","","",
> + /*M0-M7*/ "","","","","s0-i2c9-alert-n","s1-i2c9-alert-n","","",
> /*N0-N7*/ "","","","","","","","",
> /*O0-O7*/ "","","","","","","","",
> /*P0-P7*/ "","","","","","","","",
> - /*Q0-Q7*/ "","","","","","identify-button","","",
> - /*R0-R7*/ "","","ext-hightemp-n","",
> - "ocp-main-pwren","reset-button","","",
> - /*S0-S7*/ "","","","","rtc-battery-voltage-read-enable","","","",
> + /*Q0-Q7*/ "","","","","","identify-button","led-identify","",
> + /*R0-R7*/ "","","ext-hightemp-n","","ocp-main-pwren","reset-button","","",
> + /*S0-S7*/ "s0-vr-hot-n","s1-vr-hot-n","","",
> + "rtc-battery-voltage-read-enable","vr-pmbus-sel-n","","",
> /*T0-T7*/ "","","","","","","","",
> /*U0-U7*/ "","","","","","","","",
> /*V0-V7*/ "","","","","","","","",
> /*W0-W7*/ "","","","","","","","",
> /*X0-X7*/ "","","","","","","","",
> - /*Y0-Y7*/ "","","","","","","","",
> - /*Z0-Z7*/ "s0-plimit","s1-fault-alert","s1-fw-boot-ok","","",
> + /*Y0-Y7*/ "","","","bmc-vga-en-n","","","","",
> + /*Z0-Z7*/ "s0-plimit","s1-fault-alert","s1-fw-boot-ok","s0-rtc-lock","",
> "s1-sys-auth-failure-n","s1-overtemp-n","",
> /*AA0-AA7*/ "","","","","","","","",
> - /*AB0-AB7*/ "s1-hightemp-n","s1-plimit","s0-ddr-addr",
> - "s1-ddr-addr","","","","",
> - /*AC0-AC7*/ "sys-pwr-gd","","","","","","presence-cpu1",
> - "ocp-pgood";
> + /*AB0-AB7*/ "s1-hightemp-n","s1-plimit","s0-ddr-addr","s1-ddr-addr","","",
> + "","",
> + /*AC0-AC7*/ "sys-pwr-gd","","spi0-program-sel","spi0-backup-sel","bmc-ok",
> + "","presence-cpu1","ocp-pgood";
>
> i2c4-o-en-hog {
> gpio-hog;
> diff --git a/arch/arm/boot/dts/aspeed/aspeed-bmc-ampere-mtmitchell.dts b/arch/arm/boot/dts/aspeed/aspeed-bmc-ampere-mtmitchell.dts
> index 2f571b43106d..b7c4f7cfad07 100644
> --- a/arch/arm/boot/dts/aspeed/aspeed-bmc-ampere-mtmitchell.dts
> +++ b/arch/arm/boot/dts/aspeed/aspeed-bmc-ampere-mtmitchell.dts
> @@ -575,16 +575,17 @@
> gpio-line-names =
> /*A0-A7*/ "","","","","","i2c2-reset-n","i2c6-reset-n","i2c4-reset-n",
> /*B0-B7*/ "","","","","host0-sysreset-n","host0-pmin-n","","",
> - /*C0-C7*/ "s0-vrd-fault-n","s1-vrd-fault-n","","",
> + /*C0-C7*/ "s0-vrd-fault-n","s1-vrd-fault-n","bmc-debug-mode","",
> "irq-n","","vrd-sel","spd-sel",
> /*D0-D7*/ "presence-ps0","presence-ps1","hsc-12vmain-alt2-n","ext-high-temp-n",
> "","bmc-ncsi-txen","","",
> - /*E0-E7*/ "","","clk50m-bmc-ncsi","","","","","",
> + /*E0-E7*/ "","eth-phy-int-n","clk50m-bmc-ncsi","","","","","",
> /*F0-F7*/ "s0-pcp-oc-warn-n","s1-pcp-oc-warn-n","power-chassis-control",
> "cpu-bios-recover","s0-heartbeat","hs-csout-prochot",
> "s0-vr-hot-n","s1-vr-hot-n",
> /*G0-G7*/ "","","hsc-12vmain-alt1-n","","","","","",
> - /*H0-H7*/ "","","wd-disable-n","power-chassis-good","","","","",
> + /*H0-H7*/ "jtag-program-sel","fpga-program-b","wd-disable-n",
> + "power-chassis-good","","","","",
> /*I0-I7*/ "","","","","","adc-sw","power-button","rtc-battery-voltage-read-enable",
> /*J0-J7*/ "","","","","","","","",
> /*K0-K7*/ "","","","","","","","",
> @@ -605,7 +606,7 @@
> /*V0-V7*/ "s0-hightemp-n","s0-fault-alert","s0-sys-auth-failure-n",
> "host0-reboot-ack-n","s0-fw-boot-ok","host0-shd-req-n",
> "host0-shd-ack-n","s0-overtemp-n",
> - /*W0-W7*/ "","ocp-main-pwren","ocp-pgood","",
> + /*W0-W7*/ "ocp-aux-pwren","ocp-main-pwren","ocp-pgood","s1-pcp-pgood",
> "bmc-ok","bmc-ready","spi0-program-sel","spi0-backup-sel",
> /*X0-X7*/ "i2c-backup-sel","s1-fault-alert","s1-fw-boot-ok",
> "s1-hightemp-n","s0-spi-auth-fail-n","s1-sys-auth-failure-n",
> --
> 2.17.1
>
^ permalink raw reply [flat|nested] 18+ messages in thread
* Re: [PATCH 3/7] ARM: dts: aspeed: mtjade: Add the gpio-hog
2023-10-05 3:55 ` [PATCH 3/7] ARM: dts: aspeed: mtjade: Add the gpio-hog Chanh Nguyen
@ 2023-10-11 1:49 ` Joel Stanley
0 siblings, 0 replies; 18+ messages in thread
From: Joel Stanley @ 2023-10-11 1:49 UTC (permalink / raw)
To: Chanh Nguyen
Cc: OpenBMC Maillist, Rob Herring, Krzysztof Kozlowski, Conor Dooley,
Andrew Jeffery, devicetree, linux-arm-kernel, linux-aspeed,
linux-kernel
On Thu, 5 Oct 2023 at 14:26, Chanh Nguyen <chanh@os.amperecomputing.com> wrote:
>
> Add the GPIOR5 as a gpio-hog with output high so that can
> power the OCP card once the BMC booting.
>
> Add the GPIOAC5 as a gpio-hog with output high to notice
> the BMC state.
>
> Signed-off-by: Chanh Nguyen <chanh@os.amperecomputing.com>
Could be two patches as it does two different things, but not worth
re-spinning just for that.
Reviewed-by: Joel Stanley <joel@jms.id.au>
> ---
> .../boot/dts/aspeed/aspeed-bmc-ampere-mtjade.dts | 14 ++++++++++++++
> 1 file changed, 14 insertions(+)
>
> diff --git a/arch/arm/boot/dts/aspeed/aspeed-bmc-ampere-mtjade.dts b/arch/arm/boot/dts/aspeed/aspeed-bmc-ampere-mtjade.dts
> index c87be433bdd0..8ab5f301f926 100644
> --- a/arch/arm/boot/dts/aspeed/aspeed-bmc-ampere-mtjade.dts
> +++ b/arch/arm/boot/dts/aspeed/aspeed-bmc-ampere-mtjade.dts
> @@ -805,4 +805,18 @@
> output-high;
> line-name = "i2c4-o-en";
> };
> +
> + ocp-aux-pwren-hog {
> + gpio-hog;
> + gpios = <ASPEED_GPIO(R, 3) GPIO_ACTIVE_HIGH>;
> + output-high;
> + line-name = "ocp-aux-pwren";
> + };
> +
> + bmc-ready {
> + gpio-hog;
> + gpios = <ASPEED_GPIO(AC, 5) GPIO_ACTIVE_HIGH>;
> + output-high;
> + line-name = "bmc-ready";
> + };
> };
> --
> 2.17.1
>
^ permalink raw reply [flat|nested] 18+ messages in thread
* Re: [PATCH 5/7] ARM: dts: aspeed: mtmitchell: Add inlet temperature sensor
2023-10-05 3:55 ` [PATCH 5/7] ARM: dts: aspeed: mtmitchell: Add inlet temperature sensor Chanh Nguyen
@ 2023-10-11 1:51 ` Joel Stanley
0 siblings, 0 replies; 18+ messages in thread
From: Joel Stanley @ 2023-10-11 1:51 UTC (permalink / raw)
To: Chanh Nguyen
Cc: OpenBMC Maillist, Rob Herring, Krzysztof Kozlowski, Conor Dooley,
Andrew Jeffery, devicetree, linux-arm-kernel, linux-aspeed,
linux-kernel
On Thu, 5 Oct 2023 at 14:26, Chanh Nguyen <chanh@os.amperecomputing.com> wrote:
>
> Add the inlet temperature at address 0x48, which is connected
> via BMC I2C8.
>
> Signed-off-by: Chanh Nguyen <chanh@os.amperecomputing.com>
Reviewed-by: Joel Stanley <joel@jms.id.au>
> ---
> arch/arm/boot/dts/aspeed/aspeed-bmc-ampere-mtmitchell.dts | 5 +++++
> 1 file changed, 5 insertions(+)
>
> diff --git a/arch/arm/boot/dts/aspeed/aspeed-bmc-ampere-mtmitchell.dts b/arch/arm/boot/dts/aspeed/aspeed-bmc-ampere-mtmitchell.dts
> index 88693c2b2dbe..c676172f0dbf 100644
> --- a/arch/arm/boot/dts/aspeed/aspeed-bmc-ampere-mtmitchell.dts
> +++ b/arch/arm/boot/dts/aspeed/aspeed-bmc-ampere-mtmitchell.dts
> @@ -510,6 +510,11 @@
> &i2c8 {
> status = "okay";
>
> + temperature-sensor@48 {
> + compatible = "ti,tmp112";
> + reg = <0x48>;
> + };
> +
> gpio@77 {
> compatible = "nxp,pca9539";
> reg = <0x77>;
> --
> 2.17.1
>
^ permalink raw reply [flat|nested] 18+ messages in thread
* Re: [PATCH 6/7] ARM: dts: aspeed: mtmitchell: Remove redundant ADC configurations
2023-10-05 3:55 ` [PATCH 6/7] ARM: dts: aspeed: mtmitchell: Remove redundant ADC configurations Chanh Nguyen
@ 2023-10-11 1:51 ` Joel Stanley
0 siblings, 0 replies; 18+ messages in thread
From: Joel Stanley @ 2023-10-11 1:51 UTC (permalink / raw)
To: Chanh Nguyen
Cc: OpenBMC Maillist, Rob Herring, Krzysztof Kozlowski, Conor Dooley,
Andrew Jeffery, devicetree, linux-arm-kernel, linux-aspeed,
linux-kernel
On Thu, 5 Oct 2023 at 14:26, Chanh Nguyen <chanh@os.amperecomputing.com> wrote:
>
> Mt.Mitchell DVT and later hardware do not use adc1. It only uses
> adc0 with channels 0, 1 and 2. This commit removes redundant ADC
> configurations.
>
> Signed-off-by: Chanh Nguyen <chanh@os.amperecomputing.com>
Reviewed-by: Joel Stanley <joel@jms.id.au>
> ---
> .../dts/aspeed/aspeed-bmc-ampere-mtmitchell.dts | 15 +--------------
> 1 file changed, 1 insertion(+), 14 deletions(-)
>
> diff --git a/arch/arm/boot/dts/aspeed/aspeed-bmc-ampere-mtmitchell.dts b/arch/arm/boot/dts/aspeed/aspeed-bmc-ampere-mtmitchell.dts
> index c676172f0dbf..eb8d5e367276 100644
> --- a/arch/arm/boot/dts/aspeed/aspeed-bmc-ampere-mtmitchell.dts
> +++ b/arch/arm/boot/dts/aspeed/aspeed-bmc-ampere-mtmitchell.dts
> @@ -564,20 +564,7 @@
>
> pinctrl-names = "default";
> pinctrl-0 = <&pinctrl_adc0_default &pinctrl_adc1_default
> - &pinctrl_adc2_default &pinctrl_adc3_default
> - &pinctrl_adc4_default &pinctrl_adc5_default
> - &pinctrl_adc6_default &pinctrl_adc7_default>;
> -};
> -
> -&adc1 {
> - ref_voltage = <2500>;
> - status = "okay";
> -
> - pinctrl-names = "default";
> - pinctrl-0 = <&pinctrl_adc8_default &pinctrl_adc9_default
> - &pinctrl_adc10_default &pinctrl_adc11_default
> - &pinctrl_adc12_default &pinctrl_adc13_default
> - &pinctrl_adc14_default &pinctrl_adc15_default>;
> + &pinctrl_adc2_default>;
> };
>
> &vhub {
> --
> 2.17.1
>
^ permalink raw reply [flat|nested] 18+ messages in thread
* Re: [PATCH 7/7] ARM: dts: aspeed: mtmitchell: Add I2C NVMe alias port
2023-10-05 3:55 ` [PATCH 7/7] ARM: dts: aspeed: mtmitchell: Add I2C NVMe alias port Chanh Nguyen
@ 2023-10-11 1:52 ` Joel Stanley
0 siblings, 0 replies; 18+ messages in thread
From: Joel Stanley @ 2023-10-11 1:52 UTC (permalink / raw)
To: Chanh Nguyen
Cc: OpenBMC Maillist, Rob Herring, Krzysztof Kozlowski, Conor Dooley,
Andrew Jeffery, devicetree, linux-arm-kernel, linux-aspeed,
linux-kernel
On Thu, 5 Oct 2023 at 14:26, Chanh Nguyen <chanh@os.amperecomputing.com> wrote:
>
> Adds the I2C alias ports to each NVMe drive via the
> backplane card.
>
> Besides that, it also adds the eeprom and temperature sensor
> on the backplane card.
>
> Signed-off-by: Chanh Nguyen <chanh@os.amperecomputing.com>
Reviewed-by: Joel Stanley <joel@jms.id.au>
> ---
> .../aspeed/aspeed-bmc-ampere-mtmitchell.dts | 267 ++++++++++++++++++
> 1 file changed, 267 insertions(+)
>
> diff --git a/arch/arm/boot/dts/aspeed/aspeed-bmc-ampere-mtmitchell.dts b/arch/arm/boot/dts/aspeed/aspeed-bmc-ampere-mtmitchell.dts
> index eb8d5e367276..1f70e3e4e83b 100644
> --- a/arch/arm/boot/dts/aspeed/aspeed-bmc-ampere-mtmitchell.dts
> +++ b/arch/arm/boot/dts/aspeed/aspeed-bmc-ampere-mtmitchell.dts
> @@ -14,6 +14,42 @@
> aliases {
> serial7 = &uart8;
> serial8 = &uart9;
> +
> + /*
> + * I2C NVMe alias port
> + */
> + i2c100 = &backplane_0;
> + i2c48 = &nvmeslot_0;
> + i2c49 = &nvmeslot_1;
> + i2c50 = &nvmeslot_2;
> + i2c51 = &nvmeslot_3;
> + i2c52 = &nvmeslot_4;
> + i2c53 = &nvmeslot_5;
> + i2c54 = &nvmeslot_6;
> + i2c55 = &nvmeslot_7;
> +
> + i2c101 = &backplane_1;
> + i2c56 = &nvmeslot_8;
> + i2c57 = &nvmeslot_9;
> + i2c58 = &nvmeslot_10;
> + i2c59 = &nvmeslot_11;
> + i2c60 = &nvmeslot_12;
> + i2c61 = &nvmeslot_13;
> + i2c62 = &nvmeslot_14;
> + i2c63 = &nvmeslot_15;
> +
> + i2c102 = &backplane_2;
> + i2c64 = &nvmeslot_16;
> + i2c65 = &nvmeslot_17;
> + i2c66 = &nvmeslot_18;
> + i2c67 = &nvmeslot_19;
> + i2c68 = &nvmeslot_20;
> + i2c69 = &nvmeslot_21;
> + i2c70 = &nvmeslot_22;
> + i2c71 = &nvmeslot_23;
> +
> + i2c80 = &nvme_m2_0;
> + i2c81 = &nvme_m2_1;
> };
>
> chosen {
> @@ -534,6 +570,237 @@
>
> &i2c9 {
> status = "okay";
> + i2c-mux@70 {
> + compatible = "nxp,pca9548";
> + #address-cells = <1>;
> + #size-cells = <0>;
> + reg = <0x70>;
> + i2c-mux-idle-disconnect;
> +
> + backplane_1: i2c@0 {
> + #address-cells = <1>;
> + #size-cells = <0>;
> + reg = <0x0>;
> +
> + eeprom@50 {
> + compatible = "atmel,24c64";
> + reg = <0x50>;
> + pagesize = <32>;
> + };
> +
> + i2c-mux@71 {
> + compatible = "nxp,pca9548";
> + #address-cells = <1>;
> + #size-cells = <0>;
> + reg = <0x71>;
> + i2c-mux-idle-disconnect;
> +
> + nvmeslot_8: i2c@0 {
> + #address-cells = <1>;
> + #size-cells = <0>;
> + reg = <0x0>;
> + };
> + nvmeslot_9: i2c@1 {
> + #address-cells = <1>;
> + #size-cells = <0>;
> + reg = <0x1>;
> + };
> + nvmeslot_10: i2c@2 {
> + #address-cells = <1>;
> + #size-cells = <0>;
> + reg = <0x2>;
> + };
> + nvmeslot_11: i2c@3 {
> + #address-cells = <1>;
> + #size-cells = <0>;
> + reg = <0x3>;
> + };
> + nvmeslot_12: i2c@4 {
> + #address-cells = <1>;
> + #size-cells = <0>;
> + reg = <0x4>;
> + };
> + nvmeslot_13: i2c@5 {
> + #address-cells = <1>;
> + #size-cells = <0>;
> + reg = <0x5>;
> + };
> + nvmeslot_14: i2c@6 {
> + #address-cells = <1>;
> + #size-cells = <0>;
> + reg = <0x6>;
> + };
> + nvmeslot_15: i2c@7 {
> + #address-cells = <1>;
> + #size-cells = <0>;
> + reg = <0x7>;
> + };
> + };
> +
> + tmp432@4c {
> + compatible = "ti,tmp75";
> + reg = <0x4c>;
> + };
> + };
> +
> + backplane_2: i2c@2 {
> + #address-cells = <1>;
> + #size-cells = <0>;
> + reg = <0x2>;
> +
> + eeprom@50 {
> + compatible = "atmel,24c64";
> + reg = <0x50>;
> + pagesize = <32>;
> + };
> +
> + i2c-mux@71 {
> + compatible = "nxp,pca9548";
> + #address-cells = <1>;
> + #size-cells = <0>;
> + reg = <0x71>;
> + i2c-mux-idle-disconnect;
> +
> + nvmeslot_16: i2c@0 {
> + #address-cells = <1>;
> + #size-cells = <0>;
> + reg = <0x0>;
> + };
> + nvmeslot_17: i2c@1 {
> + #address-cells = <1>;
> + #size-cells = <0>;
> + reg = <0x1>;
> + };
> + nvmeslot_18: i2c@2 {
> + #address-cells = <1>;
> + #size-cells = <0>;
> + reg = <0x2>;
> + };
> + nvmeslot_19: i2c@3 {
> + #address-cells = <1>;
> + #size-cells = <0>;
> + reg = <0x3>;
> + };
> + nvmeslot_20: i2c@4 {
> + #address-cells = <1>;
> + #size-cells = <0>;
> + reg = <0x4>;
> + };
> + nvmeslot_21: i2c@5 {
> + #address-cells = <1>;
> + #size-cells = <0>;
> + reg = <0x5>;
> + };
> + nvmeslot_22: i2c@6 {
> + #address-cells = <1>;
> + #size-cells = <0>;
> + reg = <0x6>;
> + };
> + nvmeslot_23: i2c@7 {
> + #address-cells = <1>;
> + #size-cells = <0>;
> + reg = <0x7>;
> + };
> + };
> +
> + tmp432@4c {
> + compatible = "ti,tmp75";
> + reg = <0x4c>;
> + };
> + };
> +
> + backplane_0: i2c@4 {
> + #address-cells = <1>;
> + #size-cells = <0>;
> + reg = <0x4>;
> +
> + eeprom@50 {
> + compatible = "atmel,24c64";
> + reg = <0x50>;
> + pagesize = <32>;
> + };
> +
> + i2c-mux@71 {
> + compatible = "nxp,pca9548";
> + #address-cells = <1>;
> + #size-cells = <0>;
> + reg = <0x71>;
> + i2c-mux-idle-disconnect;
> +
> + nvmeslot_0: i2c@0 {
> + #address-cells = <1>;
> + #size-cells = <0>;
> + reg = <0x0>;
> + };
> + nvmeslot_1: i2c@1 {
> + #address-cells = <1>;
> + #size-cells = <0>;
> + reg = <0x1>;
> + };
> + nvmeslot_2: i2c@2 {
> + #address-cells = <1>;
> + #size-cells = <0>;
> + reg = <0x2>;
> + };
> + nvmeslot_3: i2c@3 {
> + #address-cells = <1>;
> + #size-cells = <0>;
> + reg = <0x3>;
> + };
> + nvmeslot_4: i2c@4 {
> + #address-cells = <1>;
> + #size-cells = <0>;
> + reg = <0x4>;
> + };
> + nvmeslot_5: i2c@5 {
> + #address-cells = <1>;
> + #size-cells = <0>;
> + reg = <0x5>;
> + };
> + nvmeslot_6: i2c@6 {
> + #address-cells = <1>;
> + #size-cells = <0>;
> + reg = <0x6>;
> + };
> + nvmeslot_7: i2c@7 {
> + #address-cells = <1>;
> + #size-cells = <0>;
> + reg = <0x7>;
> + };
> + };
> +
> + tmp432@4c {
> + compatible = "ti,tmp75";
> + reg = <0x4c>;
> + };
> + };
> +
> + i2c@7 {
> + #address-cells = <1>;
> + #size-cells = <0>;
> + reg = <0x7>;
> +
> + i2c-mux@71 {
> + compatible = "nxp,pca9546";
> + #address-cells = <1>;
> + #size-cells = <0>;
> + reg = <0x71>;
> + i2c-mux-idle-disconnect;
> +
> + nvme_m2_0: i2c@0 {
> + #address-cells = <1>;
> + #size-cells = <0>;
> + reg = <0x0>;
> + };
> +
> + nvme_m2_1: i2c@1 {
> + #address-cells = <1>;
> + #size-cells = <0>;
> + reg = <0x1>;
> + };
> + };
> + };
> + };
> };
>
> &i2c11 {
> --
> 2.17.1
>
^ permalink raw reply [flat|nested] 18+ messages in thread
* Re: [PATCH 0/7] Update the device tree for Ampere's BMC platform
2023-10-05 3:55 [PATCH 0/7] Update the device tree for Ampere's BMC platform Chanh Nguyen
` (6 preceding siblings ...)
2023-10-05 3:55 ` [PATCH 7/7] ARM: dts: aspeed: mtmitchell: Add I2C NVMe alias port Chanh Nguyen
@ 2023-10-11 8:31 ` Joel Stanley
2023-10-11 11:27 ` Chanh Nguyen
7 siblings, 1 reply; 18+ messages in thread
From: Joel Stanley @ 2023-10-11 8:31 UTC (permalink / raw)
To: Chanh Nguyen
Cc: OpenBMC Maillist, Rob Herring, Krzysztof Kozlowski, Conor Dooley,
Andrew Jeffery, devicetree, linux-arm-kernel, linux-aspeed,
linux-kernel
On Thu, 5 Oct 2023 at 14:26, Chanh Nguyen <chanh@os.amperecomputing.com> wrote:
>
> Updates the device tree to support some features on Ampere's
> Mt.Mitchell BMC and Ampere's Mt.Jade BMC.
>
> Chanh Nguyen (7):
> ARM: dts: aspeed: mtjade, mtmitchell: Update gpio-line-names
> ARM: dts: aspeed: mtjade, mtmitchell: Add new gpio-line-names
> ARM: dts: aspeed: mtjade: Add the gpio-hog
> ARM: dts: aspeed: mtmitchell: Add LEDs
> ARM: dts: aspeed: mtmitchell: Add inlet temperature sensor
> ARM: dts: aspeed: mtmitchell: Remove redundant ADC configurations
> ARM: dts: aspeed: mtmitchell: Add I2C NVMe alias port
I'll merge all patches except patch 4. Please resend that on its own
once you've added names.
We should consider creating openbmc documenatiton on recommended LED
names. Would you be able to help with that?
Cheers,
Joel
>
> .../dts/aspeed/aspeed-bmc-ampere-mtjade.dts | 66 ++--
> .../aspeed/aspeed-bmc-ampere-mtmitchell.dts | 315 ++++++++++++++++--
> 2 files changed, 334 insertions(+), 47 deletions(-)
>
> --
> 2.17.1
>
^ permalink raw reply [flat|nested] 18+ messages in thread
* Re: [PATCH 0/7] Update the device tree for Ampere's BMC platform
2023-10-11 8:31 ` [PATCH 0/7] Update the device tree for Ampere's BMC platform Joel Stanley
@ 2023-10-11 11:27 ` Chanh Nguyen
0 siblings, 0 replies; 18+ messages in thread
From: Chanh Nguyen @ 2023-10-11 11:27 UTC (permalink / raw)
To: Joel Stanley, Chanh Nguyen
Cc: OpenBMC Maillist, Rob Herring, Krzysztof Kozlowski, Conor Dooley,
Andrew Jeffery, devicetree, linux-arm-kernel, linux-aspeed,
linux-kernel
On 11/10/2023 15:31, Joel Stanley wrote:
> On Thu, 5 Oct 2023 at 14:26, Chanh Nguyen <chanh@os.amperecomputing.com> wrote:
>>
>> Updates the device tree to support some features on Ampere's
>> Mt.Mitchell BMC and Ampere's Mt.Jade BMC.
>>
>> Chanh Nguyen (7):
>> ARM: dts: aspeed: mtjade, mtmitchell: Update gpio-line-names
>> ARM: dts: aspeed: mtjade, mtmitchell: Add new gpio-line-names
>> ARM: dts: aspeed: mtjade: Add the gpio-hog
>> ARM: dts: aspeed: mtmitchell: Add LEDs
>> ARM: dts: aspeed: mtmitchell: Add inlet temperature sensor
>> ARM: dts: aspeed: mtmitchell: Remove redundant ADC configurations
>> ARM: dts: aspeed: mtmitchell: Add I2C NVMe alias port
>
> I'll merge all patches except patch 4. Please resend that on its own
> once you've added names.
Thank Joel very much! Please also help me push them up at
https://github.com/openbmc/linux !
I'll resend patch 4 later.
>
> We should consider creating openbmc documenatiton on recommended LED
> names. Would you be able to help with that?
>
> Cheers,
>
> Joel
>
Yes Joel! I'm glad to help that.
>
>>
>> .../dts/aspeed/aspeed-bmc-ampere-mtjade.dts | 66 ++--
>> .../aspeed/aspeed-bmc-ampere-mtmitchell.dts | 315 ++++++++++++++++--
>> 2 files changed, 334 insertions(+), 47 deletions(-)
>>
>> --
>> 2.17.1
>>
^ permalink raw reply [flat|nested] 18+ messages in thread
end of thread, other threads:[~2023-10-11 11:27 UTC | newest]
Thread overview: 18+ messages (download: mbox.gz follow: Atom feed
-- links below jump to the message on this page --
2023-10-05 3:55 [PATCH 0/7] Update the device tree for Ampere's BMC platform Chanh Nguyen
2023-10-05 3:55 ` [PATCH 1/7] ARM: dts: aspeed: mtjade, mtmitchell: Update gpio-line-names Chanh Nguyen
2023-10-11 1:48 ` Joel Stanley
2023-10-05 3:55 ` [PATCH 2/7] ARM: dts: aspeed: mtjade, mtmitchell: Add new gpio-line-names Chanh Nguyen
2023-10-11 1:48 ` Joel Stanley
2023-10-05 3:55 ` [PATCH 3/7] ARM: dts: aspeed: mtjade: Add the gpio-hog Chanh Nguyen
2023-10-11 1:49 ` Joel Stanley
2023-10-05 3:55 ` [PATCH 4/7] ARM: dts: aspeed: mtmitchell: Add LEDs Chanh Nguyen
2023-10-05 7:31 ` Krzysztof Kozlowski
2023-10-10 3:28 ` Chanh Nguyen
2023-10-05 3:55 ` [PATCH 5/7] ARM: dts: aspeed: mtmitchell: Add inlet temperature sensor Chanh Nguyen
2023-10-11 1:51 ` Joel Stanley
2023-10-05 3:55 ` [PATCH 6/7] ARM: dts: aspeed: mtmitchell: Remove redundant ADC configurations Chanh Nguyen
2023-10-11 1:51 ` Joel Stanley
2023-10-05 3:55 ` [PATCH 7/7] ARM: dts: aspeed: mtmitchell: Add I2C NVMe alias port Chanh Nguyen
2023-10-11 1:52 ` Joel Stanley
2023-10-11 8:31 ` [PATCH 0/7] Update the device tree for Ampere's BMC platform Joel Stanley
2023-10-11 11:27 ` Chanh Nguyen
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