Re: [PATCH] arm64: dts: imx8mp: Describe VDD_ARM run and standby voltage for Data Modul i.MX8M Plus eDM SBC

[Shawn Guo <shawnguo@kernel.org>]

On Sun, Oct 08, 2023 at 08:37:34PM +0200, Marek Vasut wrote:
> On 9/24/23 16:21, Shawn Guo wrote:
> > On Thu, Aug 31, 2023 at 08:18:50PM +0200, Marek Vasut wrote:
> > > Describe VDD_ARM (BUCK2) run and standby voltage in DT.
> > > 
> > > Signed-off-by: Marek Vasut <marex@denx.de>
> > > ---
> > > Cc: Conor Dooley <conor+dt@kernel.org>
> > > Cc: Fabio Estevam <festevam@gmail.com>
> > > Cc: Frieder Schrempf <frieder.schrempf@kontron.de>
> > > Cc: Geert Uytterhoeven <geert+renesas@glider.be>
> > > Cc: Krzysztof Kozlowski <krzysztof.kozlowski+dt@linaro.org>
> > > Cc: Magnus Damm <magnus.damm@gmail.com>
> > > Cc: Marek Vasut <marex@denx.de>
> > > Cc: NXP Linux Team <linux-imx@nxp.com>
> > > Cc: Peng Fan <peng.fan@nxp.com>
> > > Cc: Pengutronix Kernel Team <kernel@pengutronix.de>
> > > Cc: Rob Herring <robh+dt@kernel.org>
> > > Cc: Sascha Hauer <s.hauer@pengutronix.de>
> > > Cc: Shawn Guo <shawnguo@kernel.org>
> > > Cc: devicetree@vger.kernel.org
> > > Cc: linux-arm-kernel@lists.infradead.org
> > > ---
> > >   arch/arm64/boot/dts/freescale/imx8mp-data-modul-edm-sbc.dts | 2 ++
> > >   1 file changed, 2 insertions(+)
> > > 
> > > diff --git a/arch/arm64/boot/dts/freescale/imx8mp-data-modul-edm-sbc.dts b/arch/arm64/boot/dts/freescale/imx8mp-data-modul-edm-sbc.dts
> > > index 13674dc64be9d..d98a040860a48 100644
> > > --- a/arch/arm64/boot/dts/freescale/imx8mp-data-modul-edm-sbc.dts
> > > +++ b/arch/arm64/boot/dts/freescale/imx8mp-data-modul-edm-sbc.dts
> > > @@ -362,6 +362,8 @@ buck1: BUCK1 {	/* VDD_SOC (dual-phase with BUCK3) */
> > >   			};
> > >   			buck2: BUCK2 {	/* VDD_ARM */
> > > +				nxp,dvs-run-voltage = <950000>;
> > > +				nxp,dvs-standby-voltage = <850000>;
> > 
> > Buck2 is not turned off in DSM on i.MX8MP?
> 
> It is turned off in SUSPEND/SNVS/OFF , not in IDLE/RUN .

Right.  But nxp,dvs-standby-voltage specifies the voltage when PMIC
is in STANDBY mode.  My understanding is that the SoC will be in SUSPEND
state while PMIC is in STANDBY mode.  Is it possible that the SoC in
IDLE/RUN while PMIC is in STANDBY mode at all?

Shawn