From: Shawn Guo <shawnguo@kernel.org>
To: Marek Vasut <marex@denx.de>
Cc: linux-arm-kernel@lists.infradead.org,
Conor Dooley <conor+dt@kernel.org>,
Fabio Estevam <festevam@gmail.com>,
Frieder Schrempf <frieder.schrempf@kontron.de>,
Geert Uytterhoeven <geert+renesas@glider.be>,
Krzysztof Kozlowski <krzysztof.kozlowski+dt@linaro.org>,
Magnus Damm <magnus.damm@gmail.com>,
NXP Linux Team <linux-imx@nxp.com>, Peng Fan <peng.fan@nxp.com>,
Pengutronix Kernel Team <kernel@pengutronix.de>,
Rob Herring <robh+dt@kernel.org>,
Sascha Hauer <s.hauer@pengutronix.de>,
devicetree@vger.kernel.org
Subject: Re: [PATCH] arm64: dts: imx8mp: Describe VDD_ARM run and standby voltage for Data Modul i.MX8M Plus eDM SBC
Date: Tue, 10 Oct 2023 08:58:13 +0800 [thread overview]
Message-ID: <20231010005813.GG733979@dragon> (raw)
In-Reply-To: <18174105-de83-436c-9e77-2c61e1ef2c71@denx.de>
On Mon, Oct 09, 2023 at 04:03:01PM +0200, Marek Vasut wrote:
> On 10/9/23 14:36, Shawn Guo wrote:
> > On Sun, Oct 08, 2023 at 08:37:34PM +0200, Marek Vasut wrote:
> > > On 9/24/23 16:21, Shawn Guo wrote:
> > > > On Thu, Aug 31, 2023 at 08:18:50PM +0200, Marek Vasut wrote:
> > > > > Describe VDD_ARM (BUCK2) run and standby voltage in DT.
> > > > >
> > > > > Signed-off-by: Marek Vasut <marex@denx.de>
> > > > > ---
> > > > > Cc: Conor Dooley <conor+dt@kernel.org>
> > > > > Cc: Fabio Estevam <festevam@gmail.com>
> > > > > Cc: Frieder Schrempf <frieder.schrempf@kontron.de>
> > > > > Cc: Geert Uytterhoeven <geert+renesas@glider.be>
> > > > > Cc: Krzysztof Kozlowski <krzysztof.kozlowski+dt@linaro.org>
> > > > > Cc: Magnus Damm <magnus.damm@gmail.com>
> > > > > Cc: Marek Vasut <marex@denx.de>
> > > > > Cc: NXP Linux Team <linux-imx@nxp.com>
> > > > > Cc: Peng Fan <peng.fan@nxp.com>
> > > > > Cc: Pengutronix Kernel Team <kernel@pengutronix.de>
> > > > > Cc: Rob Herring <robh+dt@kernel.org>
> > > > > Cc: Sascha Hauer <s.hauer@pengutronix.de>
> > > > > Cc: Shawn Guo <shawnguo@kernel.org>
> > > > > Cc: devicetree@vger.kernel.org
> > > > > Cc: linux-arm-kernel@lists.infradead.org
> > > > > ---
> > > > > arch/arm64/boot/dts/freescale/imx8mp-data-modul-edm-sbc.dts | 2 ++
> > > > > 1 file changed, 2 insertions(+)
> > > > >
> > > > > diff --git a/arch/arm64/boot/dts/freescale/imx8mp-data-modul-edm-sbc.dts b/arch/arm64/boot/dts/freescale/imx8mp-data-modul-edm-sbc.dts
> > > > > index 13674dc64be9d..d98a040860a48 100644
> > > > > --- a/arch/arm64/boot/dts/freescale/imx8mp-data-modul-edm-sbc.dts
> > > > > +++ b/arch/arm64/boot/dts/freescale/imx8mp-data-modul-edm-sbc.dts
> > > > > @@ -362,6 +362,8 @@ buck1: BUCK1 { /* VDD_SOC (dual-phase with BUCK3) */
> > > > > };
> > > > > buck2: BUCK2 { /* VDD_ARM */
> > > > > + nxp,dvs-run-voltage = <950000>;
> > > > > + nxp,dvs-standby-voltage = <850000>;
> > > >
> > > > Buck2 is not turned off in DSM on i.MX8MP?
> > >
> > > It is turned off in SUSPEND/SNVS/OFF , not in IDLE/RUN .
> >
> > Right. But nxp,dvs-standby-voltage specifies the voltage when PMIC
> > is in STANDBY mode. My understanding is that the SoC will be in SUSPEND
> > state while PMIC is in STANDBY mode.
>
> I agree
>
> > Is it possible that the SoC in
> > IDLE/RUN while PMIC is in STANDBY mode at all?
>
> No, I don't think so, but there's still the PMIC part:
>
> https://www.nxp.com/docs/en/data-sheet/PCA9450.pdf
>
> 7.3.7 STANDBY mode
> "
> PCA9450 transitions to STANDBY mode from RUN mode when
> both PMIC_ON_REQ and PMIC_STBY_REQ are driven high. BUCK1
> and BUCK3 output voltage is set to BUCK1OUT_DVS1 and
> BUCK3OUT_DVS1 and BUCK2 are turned off when DVS_CTRL bit
> in each BUCKx_CTRL register is configured to 1.
> "
>
> Specifically
> "
> BUCK2 are turned off when DVS_CTRL bit in each
> BUCKx_CTRL register is configured to 1.
> "
>
> 8.2.19 0x13 BUCK2CTRL
> "
> 4
> DVS_CTRL
> DVS Control configuration
> 0b = BUCK voltage is determined by BUCK2VOUT_DVS0 register regardless of
> PMIC_STBY_REQ
> 1b = DVS control through PMIC_STBY_REQ
> "
>
> Notice that the reset-default is '0b' , so unless the PMIC is reconfigured,
> the BUCK2 will stay powered on even in STANDBY/SUSPEND.
Hmm, isn't B2_ENMODE controlling on/off of BUCK2?
BUCK2 enable mode
00b = OFF
01b = ON by PMIC_ON_REQ = H
10b = ON by PMIC_ON_REQ = H && PMIC_STBY_REQ = L (default)
11b = Always ON
So unless you reconfigure the field, BUCK2 will be off when PMIC_STBY_REQ
goes high, right?
Shawn
next prev parent reply other threads:[~2023-10-10 0:58 UTC|newest]
Thread overview: 11+ messages / expand[flat|nested] mbox.gz Atom feed top
2023-08-31 18:18 [PATCH] arm64: dts: imx8mp: Describe VDD_ARM run and standby voltage for Data Modul i.MX8M Plus eDM SBC Marek Vasut
2023-09-24 14:21 ` Shawn Guo
2023-10-08 18:37 ` Marek Vasut
2023-10-09 12:36 ` Shawn Guo
2023-10-09 14:03 ` Marek Vasut
2023-10-10 0:58 ` Shawn Guo [this message]
2023-10-10 13:42 ` Marek Vasut
2023-10-11 2:12 ` Shawn Guo
2023-10-12 3:39 ` Marek Vasut
2023-10-12 9:22 ` Shawn Guo
2023-10-12 10:12 ` Shawn Guo
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