From: Xianwei Zhao <xianwei.zhao@amlogic.com>
To: <linux-arm-kernel@lists.infradead.org>,
<linux-amlogic@lists.infradead.org>, <linux-clk@vger.kernel.org>,
<devicetree@vger.kernel.org>, <linux-kernel@vger.kernel.org>
Cc: Neil Armstrong <neil.armstrong@linaro.org>,
Jerome Brunet <jbrunet@baylibre.com>,
Michael Turquette <mturquette@baylibre.com>,
"Stephen Boyd" <sboyd@kernel.org>,
Rob Herring <robh+dt@kernel.org>,
"Krzysztof Kozlowski" <krzysztof.kozlowski+dt@linaro.org>,
Kevin Hilman <khilman@baylibre.com>,
Martin Blumenstingl <martin.blumenstingl@googlemail.com>,
Chuan Liu <chuan.liu@amlogic.com>,
Xianwei Zhao <xianwei.zhao@amlogic.com>
Subject: [PATCH V2 0/4] Add C3 SoC PLLs and Peripheral clock
Date: Tue, 10 Oct 2023 14:29:13 +0800 [thread overview]
Message-ID: <20231010062917.3624223-1-xianwei.zhao@amlogic.com> (raw)
Add C3 SoC PLLs and Peripheral clock controller dt-bindings.
Add PLLs and Peripheral clock controller driver for C3 SOC.
V1 -> V2:
1. Fix errors when check binding by using "make dt_binding_check"
2. Delete macro definition
Xianwei Zhao (4):
dt-bindings: clock: add Amlogic C3 PLL clock controller bindings
dt-bindings: clock: add Amlogic C3 peripherals clock controller
bindings
clk: meson: c3: add support for the C3 SoC PLL clock
clk: meson: c3: add c3 clock peripherals controller driver
.../clock/amlogic,c3-peripherals-clkc.yaml | 92 +
.../bindings/clock/amlogic,c3-pll-clkc.yaml | 59 +
drivers/clk/meson/Kconfig | 25 +
drivers/clk/meson/Makefile | 2 +
drivers/clk/meson/c3-peripherals.c | 3096 +++++++++++++++++
drivers/clk/meson/c3-peripherals.h | 48 +
drivers/clk/meson/c3-pll.c | 808 +++++
drivers/clk/meson/c3-pll.h | 35 +
.../clock/amlogic,c3-peripherals-clkc.h | 230 ++
.../dt-bindings/clock/amlogic,c3-pll-clkc.h | 42 +
10 files changed, 4437 insertions(+)
create mode 100644 Documentation/devicetree/bindings/clock/amlogic,c3-peripherals-clkc.yaml
create mode 100644 Documentation/devicetree/bindings/clock/amlogic,c3-pll-clkc.yaml
create mode 100644 drivers/clk/meson/c3-peripherals.c
create mode 100644 drivers/clk/meson/c3-peripherals.h
create mode 100644 drivers/clk/meson/c3-pll.c
create mode 100644 drivers/clk/meson/c3-pll.h
create mode 100644 include/dt-bindings/clock/amlogic,c3-peripherals-clkc.h
create mode 100644 include/dt-bindings/clock/amlogic,c3-pll-clkc.h
base-commit: 57b55c76aaf1ba50ecc6dcee5cd6843dc4d85239
--
2.37.1
next reply other threads:[~2023-10-10 6:29 UTC|newest]
Thread overview: 27+ messages / expand[flat|nested] mbox.gz Atom feed top
2023-10-10 6:29 Xianwei Zhao [this message]
2023-10-10 6:29 ` [PATCH V2 1/4] dt-bindings: clock: add Amlogic C3 PLL clock controller bindings Xianwei Zhao
2023-10-10 7:22 ` Rob Herring
2023-10-10 13:21 ` Rob Herring
2023-10-11 2:50 ` Xianwei Zhao
2023-10-13 7:35 ` Jerome Brunet
2023-10-16 6:41 ` Xianwei Zhao
2023-10-10 6:29 ` [PATCH V2 2/4] dt-bindings: clock: add Amlogic C3 peripherals " Xianwei Zhao
2023-10-10 7:22 ` Rob Herring
2023-10-10 13:25 ` Rob Herring
2023-10-11 2:54 ` Xianwei Zhao
2023-10-10 6:29 ` [PATCH V2 3/4] clk: meson: c3: add support for the C3 SoC PLL clock Xianwei Zhao
2023-10-13 7:49 ` Jerome Brunet
2023-10-17 6:15 ` Xianwei Zhao
2023-10-17 13:06 ` Jerome Brunet
2023-10-17 14:39 ` Chuan Liu
2023-10-17 14:42 ` Jerome Brunet
2023-10-10 6:29 ` [PATCH V2 4/4] clk: meson: c3: add c3 clock peripherals controller driver Xianwei Zhao
2023-10-12 23:51 ` Stephen Boyd
2023-10-13 7:38 ` Jerome Brunet
2023-10-13 22:01 ` Stephen Boyd
2023-10-16 6:49 ` Xianwei Zhao
2023-10-13 8:46 ` Jerome Brunet
2023-10-17 3:25 ` Xianwei Zhao
2023-10-17 13:28 ` Jerome Brunet
2023-10-17 14:59 ` Chuan Liu
2023-10-17 15:21 ` Jerome Brunet
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