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From: Andrew Jones <ajones@ventanamicro.com>
To: Conor Dooley <conor@kernel.org>
Cc: "Clément Léger" <cleger@rivosinc.com>,
	linux-riscv@lists.infradead.org, devicetree@vger.kernel.org,
	linux-kernel@vger.kernel.org, linux-doc@vger.kernel.org,
	"Palmer Dabbelt" <palmer@rivosinc.com>,
	"Paul Walmsley" <paul.walmsley@sifive.com>,
	"Rob Herring" <robh+dt@kernel.org>,
	"Krzysztof Kozlowski" <krzysztof.kozlowski+dt@linaro.org>,
	"Albert Ou" <aou@eecs.berkeley.edu>,
	"Jonathan Corbet" <corbet@lwn.net>,
	"Evan Green" <evan@rivosinc.com>
Subject: Re: [PATCH v1 01/13] riscv: fatorize hwprobe ISA extension reporting
Date: Thu, 12 Oct 2023 18:32:03 +0200	[thread overview]
Message-ID: <20231012-8d049a0366f3333ff4a3223b@orel> (raw)
In-Reply-To: <20231012-matriarch-lunar-819c1d2d7996@spud>

On Thu, Oct 12, 2023 at 02:53:43PM +0100, Conor Dooley wrote:
> Drew,
> 
> On Wed, Oct 11, 2023 at 01:14:26PM +0200, Clément Léger wrote:
> > Factorize ISA extension reporting by using a macro rather than
> > copy/pasting extension names. This will allow adding new extensions more
> > easily.
> > 
> > Signed-off-by: Clément Léger <cleger@rivosinc.com>
> > ---
> >  arch/riscv/kernel/sys_riscv.c | 26 ++++++++++++--------------
> >  1 file changed, 12 insertions(+), 14 deletions(-)
> > 
> > diff --git a/arch/riscv/kernel/sys_riscv.c b/arch/riscv/kernel/sys_riscv.c
> > index 473159b5f303..5ce593ce07a4 100644
> > --- a/arch/riscv/kernel/sys_riscv.c
> > +++ b/arch/riscv/kernel/sys_riscv.c
> > @@ -145,20 +145,18 @@ static void hwprobe_isa_ext0(struct riscv_hwprobe *pair,
> >  	for_each_cpu(cpu, cpus) {
> 
> We were gonna add a comment here about when it is and is not safe to use
> riscv_isa_extension_available() IIRC. Did that ever end up in a patch?

Yup, it's in [1]. But that series may be hung up on spec stuff, so maybe
it'd be better for Clément to integrate it. And, it appears we definitely
need this macro, because it has now been suggested by three different
people :-) (I later saw Samuel was first[2], but I hadn't seen his before
submitting mine, otherwise I would have given him the credit.)

[1] https://lore.kernel.org/all/20230918131518.56803-11-ajones@ventanamicro.com/
[2] https://lore.kernel.org/all/20230712084134.1648008-4-sameo@rivosinc.com/

Thanks,
drew

> 
> >  		struct riscv_isainfo *isainfo = &hart_isa[cpu];
> >  
> > -		if (riscv_isa_extension_available(isainfo->isa, ZBA))
> > -			pair->value |= RISCV_HWPROBE_EXT_ZBA;
> > -		else
> > -			missing |= RISCV_HWPROBE_EXT_ZBA;
> > -
> > -		if (riscv_isa_extension_available(isainfo->isa, ZBB))
> > -			pair->value |= RISCV_HWPROBE_EXT_ZBB;
> > -		else
> > -			missing |= RISCV_HWPROBE_EXT_ZBB;
> > -
> > -		if (riscv_isa_extension_available(isainfo->isa, ZBS))
> > -			pair->value |= RISCV_HWPROBE_EXT_ZBS;
> > -		else
> > -			missing |= RISCV_HWPROBE_EXT_ZBS;
> > +#define CHECK_ISA_EXT(__ext)							\
> > +		do {								\
> > +			if (riscv_isa_extension_available(isainfo->isa, __ext))	\
> > +				pair->value |= RISCV_HWPROBE_EXT_##__ext;	\
> > +			else							\
> > +				missing |= RISCV_HWPROBE_EXT_##__ext;		\
> > +		} while (false)							\
> > +
> > +		CHECK_ISA_EXT(ZBA);
> > +		CHECK_ISA_EXT(ZBB);
> > +		CHECK_ISA_EXT(ZBS);
> > +#undef CHECK_ISA_EXT
> >  	}
> >  
> >  	/* Now turn off reporting features if any CPU is missing it. */
> > -- 
> > 2.42.0
> > 



  reply	other threads:[~2023-10-12 16:32 UTC|newest]

Thread overview: 29+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2023-10-11 11:14 [PATCH v1 00/13] riscv: report more ISA extensions through hwprobe Clément Léger
2023-10-11 11:14 ` [PATCH v1 01/13] riscv: fatorize hwprobe ISA extension reporting Clément Léger
2023-10-11 11:37   ` Robert P. J. Day
2023-10-12 13:53   ` Conor Dooley
2023-10-12 16:32     ` Andrew Jones [this message]
2023-10-11 11:14 ` [PATCH v1 02/13] riscv: add ISA extension probing for Zv* extensions Clément Léger
2023-10-12 13:17   ` Clément Léger
2023-10-12 14:10     ` Conor Dooley
2023-10-12 15:15       ` Clément Léger
2023-10-12 16:29         ` Conor Dooley
2023-10-11 11:14 ` [PATCH v1 03/13] riscv: hwprobe: export Zv* ISA extensions Clément Léger
2023-10-11 11:14 ` [PATCH v1 04/13] dt-bindings: riscv: add Zv* ratified crypto ISA extensions description Clément Léger
2023-10-12 13:47   ` Conor Dooley
2023-10-11 11:14 ` [PATCH v1 05/13] riscv: add ISA extension probing for Zfh/Zfhmin Clément Léger
2023-10-11 11:14 ` [PATCH v1 06/13] riscv: hwprobe: export Zfh/Zfhmin ISA extensions Clément Léger
2023-10-11 11:14 ` [PATCH v1 07/13] dt-bindings: riscv: add Zfh/Zfhmin ISA extensions description Clément Léger
2023-10-12 13:49   ` Conor Dooley
2023-10-11 11:14 ` [PATCH v1 08/13] riscv: add ISA extension probing for Zihintntl Clément Léger
2023-10-11 11:14 ` [PATCH v1 09/13] riscv: hwprobe: export Zhintntl ISA extension Clément Léger
2023-10-11 11:14 ` [PATCH v1 10/13] dt-bindings: riscv: add Zihintntl ISA extension description Clément Léger
2023-10-12 13:50   ` Conor Dooley
2023-10-12 13:58     ` Clément Léger
2023-10-11 11:14 ` [PATCH v1 11/13] riscv: add ISA extension probing for Zvfh[min] Clément Léger
2023-10-11 11:14 ` [PATCH v1 12/13] riscv: hwprobe: export Zvfh[min] ISA extensions Clément Léger
2023-10-11 11:14 ` [PATCH v1 13/13] dt-bindings: riscv: add Zvfh[min] ISA extension description Clément Léger
2023-10-12 13:51   ` Conor Dooley
2023-10-12  7:15 ` [PATCH v1 00/13] riscv: report more ISA extensions through hwprobe Clément Léger
2023-10-12  8:21   ` Conor Dooley
2023-10-12  8:25     ` Clément Léger

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