From: Xingyu Wu <xingyu.wu@starfivetech.com>
To: Daniel Lezcano <daniel.lezcano@linaro.org>,
Thomas Gleixner <tglx@linutronix.de>,
Emil Renner Berthing <emil.renner.berthing@canonical.com>,
Walker Chen <walker.chen@starfivetech.com>
Cc: <linux-riscv@lists.infradead.org>, <devicetree@vger.kernel.org>,
"Rob Herring" <robh+dt@kernel.org>,
Krzysztof Kozlowski <krzysztof.kozlowski+dt@linaro.org>,
Paul Walmsley <paul.walmsley@sifive.com>,
Palmer Dabbelt <palmer@dabbelt.com>,
Albert Ou <aou@eecs.berkeley.edu>,
Philipp Zabel <p.zabel@pengutronix.de>,
Xingyu Wu <xingyu.wu@starfivetech.com>,
Samin Guo <samin.guo@starfivetech.com>,
<linux-kernel@vger.kernel.org>, Conor Dooley <conor@kernel.org>
Subject: [PATCH v6 0/3] Add timer driver for StarFive JH7110 RISC-V SoC
Date: Thu, 12 Oct 2023 16:10:12 +0800 [thread overview]
Message-ID: <20231012081015.33121-1-xingyu.wu@starfivetech.com> (raw)
This patch serises are to add timer driver for the StarFive JH7110
RISC-V SoC. The first patch adds documentation to describe device
tree bindings. The subsequent patch adds timer driver and support
JH7110 SoC. The last patch adds device node about timer in JH7110
dts.
This timer has four free-running 32 bit counters and runs in 24MHz
clock on StarFive JH7110 SoC. And each channel(counter) triggers
an interrupt when timeout. They support one-shot mode and
continuous-run mode.
Changes since v5:
- Rebased on 6.6-rc5.
- Chnaged the number about characters of name.
- Made the clkevt->periodic to a local variable.
- Dropped the variables of device and base.
- Used clkevt->evt.irq directly and dropped the extra copy of irq.
V5: https://lore.kernel.org/all/20230907053742.250444-1-xingyu.wu@starfivetech.com/
Changes since v4:
- Rebased on 6.5.
- Dropped the useless enum and used value directly when writing
registers.
- Modified the description in Kconfig.
- Add the reviewed tag in patch 3.
v4: https://lore.kernel.org/all/20230814101603.166951-1-xingyu.wu@starfivetech.com/
Changes since v3:
- Rebased on 6.5-rc6
- Dropped the useless enum names like 'JH7110_TIMER_CH_0'.
- Dropped the platform data about JH7110 and used the register offsets
directly.
- Drroped the useless functions of clk_disable_unprepare().
v3: https://lore.kernel.org/all/20230627055313.252519-1-xingyu.wu@starfivetech.com/
Changes since v2:
- Rebased on 6.4-rc7.
- Merged the header file into the c file.
- Renamed the functions from 'starfive_' to 'jh7110_'
- Used function 'clocksource_register_hz' instead of
'clocksource_mmio_init'.
v2: https://lore.kernel.org/all/20230320135433.144832-1-xingyu.wu@starfivetech.com/
Changes since v1:
- Added description about timer and modified properties' description
in dt-bindings.
- Dropped the 'interrupt-names' and 'clock-frequency' in dt-bindings.
- Renamed the functions and added 'starfive_'
- Modified that the driver probe by platform bus.
v1: https://lore.kernel.org/all/20221223094801.181315-1-xingyu.wu@starfivetech.com/
Xingyu Wu (3):
dt-bindings: timer: Add timer for StarFive JH7110 SoC
clocksource: Add JH7110 timer driver
riscv: dts: jh7110: starfive: Add timer node
.../bindings/timer/starfive,jh7110-timer.yaml | 96 +++++
MAINTAINERS | 7 +
arch/riscv/boot/dts/starfive/jh7110.dtsi | 20 +
drivers/clocksource/Kconfig | 11 +
drivers/clocksource/Makefile | 1 +
drivers/clocksource/timer-jh7110.c | 387 ++++++++++++++++++
6 files changed, 522 insertions(+)
create mode 100644 Documentation/devicetree/bindings/timer/starfive,jh7110-timer.yaml
create mode 100644 drivers/clocksource/timer-jh7110.c
--
2.25.1
next reply other threads:[~2023-10-12 8:10 UTC|newest]
Thread overview: 15+ messages / expand[flat|nested] mbox.gz Atom feed top
2023-10-12 8:10 Xingyu Wu [this message]
2023-10-12 8:10 ` [PATCH v6 1/3] dt-bindings: timer: Add timer for StarFive JH7110 SoC Xingyu Wu
2023-10-12 8:10 ` [PATCH v6 2/3] clocksource: Add JH7110 timer driver Xingyu Wu
2023-10-12 17:53 ` Christophe JAILLET
2023-10-13 9:34 ` Xingyu Wu
2023-10-13 11:16 ` Emil Renner Berthing
2023-10-16 7:10 ` Xingyu Wu
2023-10-13 18:02 ` Christophe JAILLET
2023-10-16 9:27 ` Xingyu Wu
2023-10-13 11:34 ` Emil Renner Berthing
2023-10-16 9:07 ` Xingyu Wu
2023-10-16 9:23 ` Emil Renner Berthing
2023-10-16 10:07 ` Xingyu Wu
2023-10-16 10:20 ` Emil Renner Berthing
2023-10-12 8:10 ` [PATCH v6 3/3] riscv: dts: jh7110: starfive: Add timer node Xingyu Wu
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