[PATCH v2 0/4] MT8195 Acer Tomato - devicetrees Part 3

[PATCH v2 0/4] MT8195 Acer Tomato - devicetrees Part 3

[AngeloGioacchino Del Regno]

Changes in v2:
 - Dropped tomato-r1 PCIe0 enablement
 - dp-intf aliases addition transferred to mt8195.dtsi
 - Changed thermal zones names and critical trip point temperatures
   for Linux to initiate thermal shutdown before HW protection kick-in.

This series adds support for the WiFi card on PCI-Express,
eDP (internal) and DP (external) displays and adds thermal
configuration for the "extra" thermistors present on Cherry boards.

All Cherry Chromebooks now have working display and wireless
connectivity!

At this point, the only missing component is vcodec decoders, but
that's to be done in mt8195.dtsi, globally, not machine specific.
Please note that in this series the eDP panel was put on aux-bus,
hence this depends on the series introducing support for it [1]
in the mtk-dp driver.

[1]: https://lore.kernel.org/lkml/20230404104800.301150-1-angelogioacchino.delregno@collabora.com/

AngeloGioacchino Del Regno (4):
  arm64: dts: mediatek: cherry: Add platform thermal configuration
  arm64: dts: mediatek: mt8195: Assign dp-intf aliases
  arm64: dts: mediatek: cherry: Configure eDP and internal display
  arm64: dts: mediatek: cherry: Enable PCI-Express ports for WiFi

 .../boot/dts/mediatek/mt8195-cherry.dtsi      | 162 ++++++++++++++++++
 arch/arm64/boot/dts/mediatek/mt8195.dtsi      |   2 +
 2 files changed, 164 insertions(+)

-- 
2.40.0

[PATCH v2 1/4] arm64: dts: mediatek: cherry: Add platform thermal configuration

[AngeloGioacchino Del Regno]

This platform has three auxiliary NTC thermistors, connected to the
SoC's ADC pins. Enable the auxadc in order to be able to read the
ADC values, add a generic-adc-thermal LUT for each and finally assign
them to the SoC's thermal zones.

Signed-off-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
Tested-by: Chen-Yu Tsai <wenst@chromium.org>
Reviewed-by: Chen-Yu Tsai <wenst@chromium.org>
---
 .../boot/dts/mediatek/mt8195-cherry.dtsi      | 105 ++++++++++++++++++
 1 file changed, 105 insertions(+)

diff --git a/arch/arm64/boot/dts/mediatek/mt8195-cherry.dtsi b/arch/arm64/boot/dts/mediatek/mt8195-cherry.dtsi
index 8ac80a136c37..4229f4f7dc2f 100644
--- a/arch/arm64/boot/dts/mediatek/mt8195-cherry.dtsi
+++ b/arch/arm64/boot/dts/mediatek/mt8195-cherry.dtsi
@@ -114,6 +114,77 @@ ppvar_sys: regulator-ppvar-sys {
 		regulator-boot-on;
 	};
 
+	/* Murata NCP03WF104F05RL */
+	tboard_thermistor1: thermal-sensor-t1 {
+		compatible = "generic-adc-thermal";
+		#thermal-sensor-cells = <0>;
+		io-channels = <&auxadc 0>;
+		io-channel-names = "sensor-channel";
+		temperature-lookup-table = <	(-10000) 1553
+						(-5000) 1485
+						0 1406
+						5000 1317
+						10000 1219
+						15000 1115
+						20000 1007
+						25000 900
+						30000 796
+						35000 697
+						40000 605
+						45000 523
+						50000 449
+						55000 384
+						60000 327
+						65000 279
+						70000 237
+						75000 202
+						80000 172
+						85000 147
+						90000 125
+						95000 107
+						100000 92
+						105000 79
+						110000 68
+						115000 59
+						120000 51
+						125000 44>;
+	};
+
+	tboard_thermistor2: thermal-sensor-t2 {
+		compatible = "generic-adc-thermal";
+		#thermal-sensor-cells = <0>;
+		io-channels = <&auxadc 1>;
+		io-channel-names = "sensor-channel";
+		temperature-lookup-table = <	(-10000) 1553
+						(-5000) 1485
+						0 1406
+						5000 1317
+						10000 1219
+						15000 1115
+						20000 1007
+						25000 900
+						30000 796
+						35000 697
+						40000 605
+						45000 523
+						50000 449
+						55000 384
+						60000 327
+						65000 279
+						70000 237
+						75000 202
+						80000 172
+						85000 147
+						90000 125
+						95000 107
+						100000 92
+						105000 79
+						110000 68
+						115000 59
+						120000 51
+						125000 44>;
+	};
+
 	usb_vbus: regulator-5v0-usb-vbus {
 		compatible = "regulator-fixed";
 		regulator-name = "usb-vbus";
@@ -260,6 +331,10 @@ &gpu {
 	mali-supply = <&mt6315_7_vbuck1>;
 };
 
+&auxadc {
+	status = "okay";
+};
+
 &i2c0 {
 	status = "okay";
 
@@ -1098,6 +1173,36 @@ mt6315_7_vbuck1: vbuck1 {
 	};
 };
 
+&thermal_zones {
+	soc-area-thermal {
+		polling-delay = <1000>;
+		polling-delay-passive = <250>;
+		thermal-sensors = <&tboard_thermistor1>;
+
+		trips {
+			trip-crit {
+				temperature = <84000>;
+				hysteresis = <1000>;
+				type = "critical";
+			};
+		};
+	};
+
+	pmic-area-thermal {
+		polling-delay = <1000>;
+		polling-delay-passive = <0>;
+		thermal-sensors = <&tboard_thermistor2>;
+
+		trips {
+			trip-crit {
+				temperature = <84000>;
+				hysteresis = <1000>;
+				type = "critical";
+			};
+		};
+	};
+};
+
 &u3phy0 {
 	status = "okay";
 };
-- 
2.40.0

[PATCH v2 2/4] arm64: dts: mediatek: mt8195: Assign dp-intf aliases

[AngeloGioacchino Del Regno]

Assign aliases for the primary and secondary dp-intf IP to properly
and reliably enable DisplayPort functionality.

Signed-off-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
---
 arch/arm64/boot/dts/mediatek/mt8195.dtsi | 2 ++
 1 file changed, 2 insertions(+)

diff --git a/arch/arm64/boot/dts/mediatek/mt8195.dtsi b/arch/arm64/boot/dts/mediatek/mt8195.dtsi
index a44aae4ab953..b03a42fe27a6 100644
--- a/arch/arm64/boot/dts/mediatek/mt8195.dtsi
+++ b/arch/arm64/boot/dts/mediatek/mt8195.dtsi
@@ -24,6 +24,8 @@ / {
 	#size-cells = <2>;
 
 	aliases {
+		dp-intf0 = &dp_intf0;
+		dp-intf1 = &dp_intf1;
 		gce0 = &gce0;
 		gce1 = &gce1;
 		ethdr0 = &ethdr0;
-- 
2.40.0

[PATCH v2 3/4] arm64: dts: mediatek: cherry: Configure eDP and internal display

[AngeloGioacchino Del Regno]

Add the required nodes to enable the DisplayPort interface, connected
to the Embedded DisplayPort port, where we have an internal display.

Signed-off-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
---
 .../boot/dts/mediatek/mt8195-cherry.dtsi      | 32 +++++++++++++++++++
 1 file changed, 32 insertions(+)

diff --git a/arch/arm64/boot/dts/mediatek/mt8195-cherry.dtsi b/arch/arm64/boot/dts/mediatek/mt8195-cherry.dtsi
index 4229f4f7dc2f..adbda4dccdd5 100644
--- a/arch/arm64/boot/dts/mediatek/mt8195-cherry.dtsi
+++ b/arch/arm64/boot/dts/mediatek/mt8195-cherry.dtsi
@@ -47,6 +47,18 @@ memory@40000000 {
 		reg = <0 0x40000000 0 0x80000000>;
 	};
 
+	pp3300_disp_x: regulator-pp3300-disp-x {
+		compatible = "regulator-fixed";
+		regulator-name = "pp3300_disp_x";
+		regulator-min-microvolt = <3300000>;
+		regulator-max-microvolt = <3300000>;
+		enable-active-high;
+		gpio = <&pio 55 GPIO_ACTIVE_HIGH>;
+		pinctrl-names = "default";
+		pinctrl-0 = <&panel_fixed_pins>;
+		regulator-always-on;
+	};
+
 	/* system wide LDO 3.3V power rail */
 	pp3300_z5: regulator-pp3300-ldo-z5 {
 		compatible = "regulator-fixed";
@@ -288,6 +300,20 @@ port@1 {
 			reg = <1>;
 			edp_out: endpoint {
 				data-lanes = <0 1 2 3>;
+				remote-endpoint = <&panel_in>;
+			};
+		};
+	};
+
+	aux-bus {
+		panel {
+			compatible = "edp-panel";
+			power-supply = <&pp3300_disp_x>;
+			backlight = <&backlight_lcd0>;
+			port {
+				panel_in: endpoint {
+					remote-endpoint = <&edp_out>;
+				};
 			};
 		};
 	};
@@ -927,6 +953,12 @@ pins-cs {
 		};
 	};
 
+	panel_fixed_pins: panel-pwr-default-pins {
+		pins-vreg-en {
+			pinmux = <PINMUX_GPIO55__FUNC_GPIO55>;
+		};
+	};
+
 	pio_default: pio-default-pins {
 		pins-wifi-enable {
 			pinmux = <PINMUX_GPIO58__FUNC_GPIO58>;
-- 
2.40.0

[PATCH v2 4/4] arm64: dts: mediatek: cherry: Enable PCI-Express ports for WiFi

[AngeloGioacchino Del Regno]

On the Cherry platform, a MT7621 WiFi+Bluetooth combo is connected
over PCI-Express (for WiFi) and USB (for BT): enable the PCIe ports
to enable enumerating this chip.

Signed-off-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
Tested-by: Chen-Yu Tsai <wenst@chromium.org>
---
 .../boot/dts/mediatek/mt8195-cherry.dtsi      | 25 +++++++++++++++++++
 1 file changed, 25 insertions(+)

diff --git a/arch/arm64/boot/dts/mediatek/mt8195-cherry.dtsi b/arch/arm64/boot/dts/mediatek/mt8195-cherry.dtsi
index adbda4dccdd5..eca5df85fe33 100644
--- a/arch/arm64/boot/dts/mediatek/mt8195-cherry.dtsi
+++ b/arch/arm64/boot/dts/mediatek/mt8195-cherry.dtsi
@@ -565,6 +565,13 @@ flash@0 {
 	};
 };
 
+&pcie1 {
+	status = "okay";
+
+	pinctrl-names = "default";
+	pinctrl-0 = <&pcie1_pins_default>;
+};
+
 &pio {
 	mediatek,rsel-resistance-in-si-unit;
 	pinctrl-names = "default";
@@ -959,6 +966,24 @@ pins-vreg-en {
 		};
 	};
 
+	pcie0_pins_default: pcie0-default-pins {
+		pins-bus {
+			pinmux = <PINMUX_GPIO19__FUNC_WAKEN>,
+				 <PINMUX_GPIO20__FUNC_PERSTN>,
+				 <PINMUX_GPIO21__FUNC_CLKREQN>;
+				 bias-pull-up;
+		};
+	};
+
+	pcie1_pins_default: pcie1-default-pins {
+		pins-bus {
+			pinmux = <PINMUX_GPIO22__FUNC_PERSTN_1>,
+				 <PINMUX_GPIO23__FUNC_CLKREQN_1>,
+				 <PINMUX_GPIO24__FUNC_WAKEN_1>;
+				 bias-pull-up;
+		};
+	};
+
 	pio_default: pio-default-pins {
 		pins-wifi-enable {
 			pinmux = <PINMUX_GPIO58__FUNC_GPIO58>;
-- 
2.40.0

Re: [PATCH v2 2/4] arm64: dts: mediatek: mt8195: Assign dp-intf aliases

[Chen-Yu Tsai]

On Mon, Apr 24, 2023 at 7:25 PM AngeloGioacchino Del Regno
<angelogioacchino.delregno@collabora.com> wrote:
>
> Assign aliases for the primary and secondary dp-intf IP to properly
> and reliably enable DisplayPort functionality.
>
> Signed-off-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>

Tested-by: Chen-Yu Tsai <wenst@chromium.org>
Reviewed-by: Chen-Yu Tsai <wenst@chromium.org>

> ---
>  arch/arm64/boot/dts/mediatek/mt8195.dtsi | 2 ++
>  1 file changed, 2 insertions(+)
>
> diff --git a/arch/arm64/boot/dts/mediatek/mt8195.dtsi b/arch/arm64/boot/dts/mediatek/mt8195.dtsi
> index a44aae4ab953..b03a42fe27a6 100644
> --- a/arch/arm64/boot/dts/mediatek/mt8195.dtsi
> +++ b/arch/arm64/boot/dts/mediatek/mt8195.dtsi
> @@ -24,6 +24,8 @@ / {
>         #size-cells = <2>;
>
>         aliases {
> +               dp-intf0 = &dp_intf0;
> +               dp-intf1 = &dp_intf1;
>                 gce0 = &gce0;
>                 gce1 = &gce1;
>                 ethdr0 = &ethdr0;
> --
> 2.40.0
>
>

Re: [PATCH v2 3/4] arm64: dts: mediatek: cherry: Configure eDP and internal display

[Chen-Yu Tsai]

On Mon, Apr 24, 2023 at 7:25 PM AngeloGioacchino Del Regno
<angelogioacchino.delregno@collabora.com> wrote:
>
> Add the required nodes to enable the DisplayPort interface, connected
> to the Embedded DisplayPort port, where we have an internal display.
>
> Signed-off-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
> ---
>  .../boot/dts/mediatek/mt8195-cherry.dtsi      | 32 +++++++++++++++++++
>  1 file changed, 32 insertions(+)
>
> diff --git a/arch/arm64/boot/dts/mediatek/mt8195-cherry.dtsi b/arch/arm64/boot/dts/mediatek/mt8195-cherry.dtsi
> index 4229f4f7dc2f..adbda4dccdd5 100644
> --- a/arch/arm64/boot/dts/mediatek/mt8195-cherry.dtsi
> +++ b/arch/arm64/boot/dts/mediatek/mt8195-cherry.dtsi
> @@ -47,6 +47,18 @@ memory@40000000 {
>                 reg = <0 0x40000000 0 0x80000000>;
>         };
>
> +       pp3300_disp_x: regulator-pp3300-disp-x {
> +               compatible = "regulator-fixed";
> +               regulator-name = "pp3300_disp_x";
> +               regulator-min-microvolt = <3300000>;
> +               regulator-max-microvolt = <3300000>;
> +               enable-active-high;
> +               gpio = <&pio 55 GPIO_ACTIVE_HIGH>;
> +               pinctrl-names = "default";
> +               pinctrl-0 = <&panel_fixed_pins>;
> +               regulator-always-on;

I think you missed my comment on v1 about this regulator's supplier and
enable delay.

ChenYu

> +       };
> +
>         /* system wide LDO 3.3V power rail */
>         pp3300_z5: regulator-pp3300-ldo-z5 {
>                 compatible = "regulator-fixed";
> @@ -288,6 +300,20 @@ port@1 {
>                         reg = <1>;
>                         edp_out: endpoint {
>                                 data-lanes = <0 1 2 3>;
> +                               remote-endpoint = <&panel_in>;
> +                       };
> +               };
> +       };
> +
> +       aux-bus {
> +               panel {
> +                       compatible = "edp-panel";
> +                       power-supply = <&pp3300_disp_x>;
> +                       backlight = <&backlight_lcd0>;
> +                       port {
> +                               panel_in: endpoint {
> +                                       remote-endpoint = <&edp_out>;
> +                               };
>                         };
>                 };
>         };
> @@ -927,6 +953,12 @@ pins-cs {
>                 };
>         };
>
> +       panel_fixed_pins: panel-pwr-default-pins {
> +               pins-vreg-en {
> +                       pinmux = <PINMUX_GPIO55__FUNC_GPIO55>;
> +               };
> +       };
> +
>         pio_default: pio-default-pins {
>                 pins-wifi-enable {
>                         pinmux = <PINMUX_GPIO58__FUNC_GPIO58>;
> --
> 2.40.0
>
>

Re: [PATCH v2 4/4] arm64: dts: mediatek: cherry: Enable PCI-Express ports for WiFi

[Chen-Yu Tsai]

On Mon, Apr 24, 2023 at 7:25 PM AngeloGioacchino Del Regno
<angelogioacchino.delregno@collabora.com> wrote:
>
> On the Cherry platform, a MT7621 WiFi+Bluetooth combo is connected
> over PCI-Express (for WiFi) and USB (for BT): enable the PCIe ports
> to enable enumerating this chip.
>
> Signed-off-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
> Tested-by: Chen-Yu Tsai <wenst@chromium.org>
> ---
>  .../boot/dts/mediatek/mt8195-cherry.dtsi      | 25 +++++++++++++++++++
>  1 file changed, 25 insertions(+)
>
> diff --git a/arch/arm64/boot/dts/mediatek/mt8195-cherry.dtsi b/arch/arm64/boot/dts/mediatek/mt8195-cherry.dtsi
> index adbda4dccdd5..eca5df85fe33 100644
> --- a/arch/arm64/boot/dts/mediatek/mt8195-cherry.dtsi
> +++ b/arch/arm64/boot/dts/mediatek/mt8195-cherry.dtsi
> @@ -565,6 +565,13 @@ flash@0 {
>         };
>  };
>
> +&pcie1 {
> +       status = "okay";
> +
> +       pinctrl-names = "default";
> +       pinctrl-0 = <&pcie1_pins_default>;
> +};
> +
>  &pio {
>         mediatek,rsel-resistance-in-si-unit;
>         pinctrl-names = "default";
> @@ -959,6 +966,24 @@ pins-vreg-en {
>                 };
>         };
>
> +       pcie0_pins_default: pcie0-default-pins {
> +               pins-bus {
> +                       pinmux = <PINMUX_GPIO19__FUNC_WAKEN>,
> +                                <PINMUX_GPIO20__FUNC_PERSTN>,
> +                                <PINMUX_GPIO21__FUNC_CLKREQN>;
> +                                bias-pull-up;
> +               };
> +       };

I think we should remove this. We can add it later with the actual device
that has NVMe.

Otherwise,

Reviewed-by: Chen-Yu Tsai <wenst@chromium.org>

> +       pcie1_pins_default: pcie1-default-pins {
> +               pins-bus {
> +                       pinmux = <PINMUX_GPIO22__FUNC_PERSTN_1>,
> +                                <PINMUX_GPIO23__FUNC_CLKREQN_1>,
> +                                <PINMUX_GPIO24__FUNC_WAKEN_1>;
> +                                bias-pull-up;
> +               };
> +       };
> +
>         pio_default: pio-default-pins {
>                 pins-wifi-enable {
>                         pinmux = <PINMUX_GPIO58__FUNC_GPIO58>;
> --
> 2.40.0
>

Re: [PATCH v2 1/4] arm64: dts: mediatek: cherry: Add platform thermal configuration

[Alexandre Mergnat]

On 24/04/2023 13:25, AngeloGioacchino Del Regno wrote:
> This platform has three auxiliary NTC thermistors, connected to the
> SoC's ADC pins. Enable the auxadc in order to be able to read the
> ADC values, add a generic-adc-thermal LUT for each and finally assign
> them to the SoC's thermal zones.
> 
> Signed-off-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
> Tested-by: Chen-Yu Tsai <wenst@chromium.org>
> Reviewed-by: Chen-Yu Tsai <wenst@chromium.org>
> ---
>   .../boot/dts/mediatek/mt8195-cherry.dtsi      | 105 ++++++++++++++++++
>   1 file changed, 105 insertions(+)
> 
> diff --git a/arch/arm64/boot/dts/mediatek/mt8195-cherry.dtsi b/arch/arm64/boot/dts/mediatek/mt8195-cherry.dtsi
> index 8ac80a136c37..4229f4f7dc2f 100644
> --- a/arch/arm64/boot/dts/mediatek/mt8195-cherry.dtsi
> +++ b/arch/arm64/boot/dts/mediatek/mt8195-cherry.dtsi
> @@ -114,6 +114,77 @@ ppvar_sys: regulator-ppvar-sys {
>   		regulator-boot-on;
>   	};
>   
> +	/* Murata NCP03WF104F05RL */
> +	tboard_thermistor1: thermal-sensor-t1 {
> +		compatible = "generic-adc-thermal";
> +		#thermal-sensor-cells = <0>;
> +		io-channels = <&auxadc 0>;
> +		io-channel-names = "sensor-channel";
> +		temperature-lookup-table = <	(-10000) 1553
> +						(-5000) 1485
> +						0 1406
> +						5000 1317
> +						10000 1219
> +						15000 1115
> +						20000 1007
> +						25000 900
> +						30000 796
> +						35000 697
> +						40000 605
> +						45000 523
> +						50000 449
> +						55000 384
> +						60000 327
> +						65000 279
> +						70000 237
> +						75000 202
> +						80000 172
> +						85000 147
> +						90000 125
> +						95000 107
> +						100000 92
> +						105000 79
> +						110000 68
> +						115000 59
> +						120000 51
> +						125000 44>;
> +	};
> +
> +	tboard_thermistor2: thermal-sensor-t2 {
> +		compatible = "generic-adc-thermal";
> +		#thermal-sensor-cells = <0>;
> +		io-channels = <&auxadc 1>;
> +		io-channel-names = "sensor-channel";
> +		temperature-lookup-table = <	(-10000) 1553
> +						(-5000) 1485
> +						0 1406
> +						5000 1317
> +						10000 1219
> +						15000 1115
> +						20000 1007
> +						25000 900
> +						30000 796
> +						35000 697
> +						40000 605
> +						45000 523
> +						50000 449
> +						55000 384
> +						60000 327
> +						65000 279
> +						70000 237
> +						75000 202
> +						80000 172
> +						85000 147
> +						90000 125
> +						95000 107
> +						100000 92
> +						105000 79
> +						110000 68
> +						115000 59
> +						120000 51
> +						125000 44>;
> +	};
> +
>   	usb_vbus: regulator-5v0-usb-vbus {
>   		compatible = "regulator-fixed";
>   		regulator-name = "usb-vbus";
> @@ -260,6 +331,10 @@ &gpu {
>   	mali-supply = <&mt6315_7_vbuck1>;
>   };
>   
> +&auxadc {

Can you put it in alphabetical order please. ?

> +	status = "okay";
> +};
> +
>   &i2c0 {
>   	status = "okay";
>   
> @@ -1098,6 +1173,36 @@ mt6315_7_vbuck1: vbuck1 {
>   	};
>   };
>   
> +&thermal_zones {
> +	soc-area-thermal {
> +		polling-delay = <1000>;
> +		polling-delay-passive = <250>;
> +		thermal-sensors = <&tboard_thermistor1>;
> +
> +		trips {
> +			trip-crit {
> +				temperature = <84000>;
> +				hysteresis = <1000>;
> +				type = "critical";
> +			};
> +		};
> +	};
> +
> +	pmic-area-thermal {
> +		polling-delay = <1000>;
> +		polling-delay-passive = <0>;
> +		thermal-sensors = <&tboard_thermistor2>;
> +
> +		trips {
> +			trip-crit {
> +				temperature = <84000>;
> +				hysteresis = <1000>;
> +				type = "critical";
> +			};
> +		};
> +	};
> +};
> +
>   &u3phy0 {
>   	status = "okay";
>   };

After that:
Reviewed-by: Alexandre Mergnat <amergnat@baylibre.com>

Regards,
Alexandre

Re: [PATCH v2 2/4] arm64: dts: mediatek: mt8195: Assign dp-intf aliases

[Alexandre Mergnat]

On 24/04/2023 13:25, AngeloGioacchino Del Regno wrote:
> Assign aliases for the primary and secondary dp-intf IP to properly
> and reliably enable DisplayPort functionality.
> 
> Signed-off-by: AngeloGioacchino Del Regno<angelogioacchino.delregno@collabora.com>

Reviewed-by: Alexandre Mergnat <amergnat@baylibre.com>

Regards,
Alexandre

Re: [PATCH v2 4/4] arm64: dts: mediatek: cherry: Enable PCI-Express ports for WiFi

[Alexandre Mergnat]

On 24/04/2023 13:25, AngeloGioacchino Del Regno wrote:
> On the Cherry platform, a MT7621 WiFi+Bluetooth combo is connected
> over PCI-Express (for WiFi) and USB (for BT): enable the PCIe ports
> to enable enumerating this chip.
> 
> Signed-off-by: AngeloGioacchino Del Regno<angelogioacchino.delregno@collabora.com>
> Tested-by: Chen-Yu Tsai<wenst@chromium.org>

Reviewed-by: Alexandre Mergnat <amergnat@baylibre.com>

Regards,
Alexandre

Re: [PATCH v2 3/4] arm64: dts: mediatek: cherry: Configure eDP and internal display

[AngeloGioacchino Del Regno]

Il 25/04/23 10:24, Chen-Yu Tsai ha scritto:
> On Mon, Apr 24, 2023 at 7:25 PM AngeloGioacchino Del Regno
> <angelogioacchino.delregno@collabora.com> wrote:
>>
>> Add the required nodes to enable the DisplayPort interface, connected
>> to the Embedded DisplayPort port, where we have an internal display.
>>
>> Signed-off-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
>> ---
>>   .../boot/dts/mediatek/mt8195-cherry.dtsi      | 32 +++++++++++++++++++
>>   1 file changed, 32 insertions(+)
>>
>> diff --git a/arch/arm64/boot/dts/mediatek/mt8195-cherry.dtsi b/arch/arm64/boot/dts/mediatek/mt8195-cherry.dtsi
>> index 4229f4f7dc2f..adbda4dccdd5 100644
>> --- a/arch/arm64/boot/dts/mediatek/mt8195-cherry.dtsi
>> +++ b/arch/arm64/boot/dts/mediatek/mt8195-cherry.dtsi
>> @@ -47,6 +47,18 @@ memory@40000000 {
>>                  reg = <0 0x40000000 0 0x80000000>;
>>          };
>>
>> +       pp3300_disp_x: regulator-pp3300-disp-x {
>> +               compatible = "regulator-fixed";
>> +               regulator-name = "pp3300_disp_x";
>> +               regulator-min-microvolt = <3300000>;
>> +               regulator-max-microvolt = <3300000>;
>> +               enable-active-high;
>> +               gpio = <&pio 55 GPIO_ACTIVE_HIGH>;
>> +               pinctrl-names = "default";
>> +               pinctrl-0 = <&panel_fixed_pins>;
>> +               regulator-always-on;
> 
> I think you missed my comment on v1 about this regulator's supplier and
> enable delay.
> 

Sorry, it wasn't my intention to ignore that. Will check that out and
push a v3 asap.

> ChenYu
> 
>> +       };
>> +
>>          /* system wide LDO 3.3V power rail */
>>          pp3300_z5: regulator-pp3300-ldo-z5 {
>>                  compatible = "regulator-fixed";
>> @@ -288,6 +300,20 @@ port@1 {
>>                          reg = <1>;
>>                          edp_out: endpoint {
>>                                  data-lanes = <0 1 2 3>;
>> +                               remote-endpoint = <&panel_in>;
>> +                       };
>> +               };
>> +       };
>> +
>> +       aux-bus {
>> +               panel {
>> +                       compatible = "edp-panel";
>> +                       power-supply = <&pp3300_disp_x>;
>> +                       backlight = <&backlight_lcd0>;
>> +                       port {
>> +                               panel_in: endpoint {
>> +                                       remote-endpoint = <&edp_out>;
>> +                               };
>>                          };
>>                  };
>>          };
>> @@ -927,6 +953,12 @@ pins-cs {
>>                  };
>>          };
>>
>> +       panel_fixed_pins: panel-pwr-default-pins {
>> +               pins-vreg-en {
>> +                       pinmux = <PINMUX_GPIO55__FUNC_GPIO55>;
>> +               };
>> +       };
>> +
>>          pio_default: pio-default-pins {
>>                  pins-wifi-enable {
>>                          pinmux = <PINMUX_GPIO58__FUNC_GPIO58>;
>> --
>> 2.40.0
>>
>>

Re: [PATCH v2 2/4] arm64: dts: mediatek: mt8195: Assign dp-intf aliases

[Matthias Brugger]

On 24/04/2023 13:25, AngeloGioacchino Del Regno wrote:
> Assign aliases for the primary and secondary dp-intf IP to properly
> and reliably enable DisplayPort functionality.
> 
> Signed-off-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>

Applied, thanks

> ---
>   arch/arm64/boot/dts/mediatek/mt8195.dtsi | 2 ++
>   1 file changed, 2 insertions(+)
> 
> diff --git a/arch/arm64/boot/dts/mediatek/mt8195.dtsi b/arch/arm64/boot/dts/mediatek/mt8195.dtsi
> index a44aae4ab953..b03a42fe27a6 100644
> --- a/arch/arm64/boot/dts/mediatek/mt8195.dtsi
> +++ b/arch/arm64/boot/dts/mediatek/mt8195.dtsi
> @@ -24,6 +24,8 @@ / {
>   	#size-cells = <2>;
>   
>   	aliases {
> +		dp-intf0 = &dp_intf0;
> +		dp-intf1 = &dp_intf1;
>   		gce0 = &gce0;
>   		gce1 = &gce1;
>   		ethdr0 = &ethdr0;

Re: [PATCH v2 4/4] arm64: dts: mediatek: cherry: Enable PCI-Express ports for WiFi

[Matthias Brugger]

On 24/04/2023 13:25, AngeloGioacchino Del Regno wrote:
> On the Cherry platform, a MT7621 WiFi+Bluetooth combo is connected
> over PCI-Express (for WiFi) and USB (for BT): enable the PCIe ports
> to enable enumerating this chip.
> 
> Signed-off-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
> Tested-by: Chen-Yu Tsai <wenst@chromium.org>

Applied, thanks

> ---
>   .../boot/dts/mediatek/mt8195-cherry.dtsi      | 25 +++++++++++++++++++
>   1 file changed, 25 insertions(+)
> 
> diff --git a/arch/arm64/boot/dts/mediatek/mt8195-cherry.dtsi b/arch/arm64/boot/dts/mediatek/mt8195-cherry.dtsi
> index adbda4dccdd5..eca5df85fe33 100644
> --- a/arch/arm64/boot/dts/mediatek/mt8195-cherry.dtsi
> +++ b/arch/arm64/boot/dts/mediatek/mt8195-cherry.dtsi
> @@ -565,6 +565,13 @@ flash@0 {
>   	};
>   };
>   
> +&pcie1 {
> +	status = "okay";
> +
> +	pinctrl-names = "default";
> +	pinctrl-0 = <&pcie1_pins_default>;
> +};
> +
>   &pio {
>   	mediatek,rsel-resistance-in-si-unit;
>   	pinctrl-names = "default";
> @@ -959,6 +966,24 @@ pins-vreg-en {
>   		};
>   	};
>   
> +	pcie0_pins_default: pcie0-default-pins {
> +		pins-bus {
> +			pinmux = <PINMUX_GPIO19__FUNC_WAKEN>,
> +				 <PINMUX_GPIO20__FUNC_PERSTN>,
> +				 <PINMUX_GPIO21__FUNC_CLKREQN>;
> +				 bias-pull-up;
> +		};
> +	};
> +
> +	pcie1_pins_default: pcie1-default-pins {
> +		pins-bus {
> +			pinmux = <PINMUX_GPIO22__FUNC_PERSTN_1>,
> +				 <PINMUX_GPIO23__FUNC_CLKREQN_1>,
> +				 <PINMUX_GPIO24__FUNC_WAKEN_1>;
> +				 bias-pull-up;
> +		};
> +	};
> +
>   	pio_default: pio-default-pins {
>   		pins-wifi-enable {
>   			pinmux = <PINMUX_GPIO58__FUNC_GPIO58>;

Re: [PATCH v2 1/4] arm64: dts: mediatek: cherry: Add platform thermal configuration

[Chen-Yu Tsai]

Hi Angelo

On Tue, Apr 25, 2023 at 01:46:42PM +0200, Alexandre Mergnat wrote:
> On 24/04/2023 13:25, AngeloGioacchino Del Regno wrote:
> > This platform has three auxiliary NTC thermistors, connected to the
> > SoC's ADC pins. Enable the auxadc in order to be able to read the
> > ADC values, add a generic-adc-thermal LUT for each and finally assign
> > them to the SoC's thermal zones.
> > 
> > Signed-off-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
> > Tested-by: Chen-Yu Tsai <wenst@chromium.org>
> > Reviewed-by: Chen-Yu Tsai <wenst@chromium.org>
> > ---
> >   .../boot/dts/mediatek/mt8195-cherry.dtsi      | 105 ++++++++++++++++++
> >   1 file changed, 105 insertions(+)
> > 
> > diff --git a/arch/arm64/boot/dts/mediatek/mt8195-cherry.dtsi b/arch/arm64/boot/dts/mediatek/mt8195-cherry.dtsi
> > index 8ac80a136c37..4229f4f7dc2f 100644
> > --- a/arch/arm64/boot/dts/mediatek/mt8195-cherry.dtsi
> > +++ b/arch/arm64/boot/dts/mediatek/mt8195-cherry.dtsi
> > @@ -114,6 +114,77 @@ ppvar_sys: regulator-ppvar-sys {
> >   		regulator-boot-on;
> >   	};
> > +	/* Murata NCP03WF104F05RL */
> > +	tboard_thermistor1: thermal-sensor-t1 {
> > +		compatible = "generic-adc-thermal";
> > +		#thermal-sensor-cells = <0>;
> > +		io-channels = <&auxadc 0>;
> > +		io-channel-names = "sensor-channel";
> > +		temperature-lookup-table = <	(-10000) 1553
> > +						(-5000) 1485
> > +						0 1406
> > +						5000 1317
> > +						10000 1219
> > +						15000 1115
> > +						20000 1007
> > +						25000 900
> > +						30000 796
> > +						35000 697
> > +						40000 605
> > +						45000 523
> > +						50000 449
> > +						55000 384
> > +						60000 327
> > +						65000 279
> > +						70000 237
> > +						75000 202
> > +						80000 172
> > +						85000 147
> > +						90000 125
> > +						95000 107
> > +						100000 92
> > +						105000 79
> > +						110000 68
> > +						115000 59
> > +						120000 51
> > +						125000 44>;
> > +	};
> > +
> > +	tboard_thermistor2: thermal-sensor-t2 {
> > +		compatible = "generic-adc-thermal";
> > +		#thermal-sensor-cells = <0>;
> > +		io-channels = <&auxadc 1>;
> > +		io-channel-names = "sensor-channel";
> > +		temperature-lookup-table = <	(-10000) 1553
> > +						(-5000) 1485
> > +						0 1406
> > +						5000 1317
> > +						10000 1219
> > +						15000 1115
> > +						20000 1007
> > +						25000 900
> > +						30000 796
> > +						35000 697
> > +						40000 605
> > +						45000 523
> > +						50000 449
> > +						55000 384
> > +						60000 327
> > +						65000 279
> > +						70000 237
> > +						75000 202
> > +						80000 172
> > +						85000 147
> > +						90000 125
> > +						95000 107
> > +						100000 92
> > +						105000 79
> > +						110000 68
> > +						115000 59
> > +						120000 51
> > +						125000 44>;
> > +	};
> > +
> >   	usb_vbus: regulator-5v0-usb-vbus {
> >   		compatible = "regulator-fixed";
> >   		regulator-name = "usb-vbus";
> > @@ -260,6 +331,10 @@ &gpu {
> >   	mali-supply = <&mt6315_7_vbuck1>;
> >   };
> > +&auxadc {
> 
> Can you put it in alphabetical order please. ?

I believe this patch needs to be respun?

> > +	status = "okay";
> > +};
> > +
> >   &i2c0 {
> >   	status = "okay";
> > @@ -1098,6 +1173,36 @@ mt6315_7_vbuck1: vbuck1 {
> >   	};
> >   };
> > +&thermal_zones {
> > +	soc-area-thermal {
> > +		polling-delay = <1000>;
> > +		polling-delay-passive = <250>;
> > +		thermal-sensors = <&tboard_thermistor1>;
> > +
> > +		trips {
> > +			trip-crit {
> > +				temperature = <84000>;
> > +				hysteresis = <1000>;
> > +				type = "critical";
> > +			};
> > +		};
> > +	};
> > +
> > +	pmic-area-thermal {
> > +		polling-delay = <1000>;
> > +		polling-delay-passive = <0>;
> > +		thermal-sensors = <&tboard_thermistor2>;
> > +
> > +		trips {
> > +			trip-crit {
> > +				temperature = <84000>;
> > +				hysteresis = <1000>;
> > +				type = "critical";
> > +			};
> > +		};
> > +	};
> > +};
> > +
> >   &u3phy0 {
> >   	status = "okay";
> >   };
> 
> After that:
> Reviewed-by: Alexandre Mergnat <amergnat@baylibre.com>
> 
> Regards,
> Alexandre
>