* [PATCH] arm64: dts: imx8mp: Describe M24C32-D write-lockable page in DH i.MX8MP DHCOM DT
@ 2023-10-15 20:01 Marek Vasut
2023-11-27 2:05 ` Shawn Guo
0 siblings, 1 reply; 2+ messages in thread
From: Marek Vasut @ 2023-10-15 20:01 UTC (permalink / raw)
To: linux-arm-kernel
Cc: Marek Vasut, Conor Dooley, Fabio Estevam, Frieder Schrempf,
Krzysztof Kozlowski, Marco Felsch, NXP Linux Team,
Pengutronix Kernel Team, Rob Herring, Sascha Hauer, Shawn Guo,
devicetree
The i.MX8MP DHCOM SoM production rev.200 is populated with M24C32-D
EEPROMs which have Additional Write lockable page at separate I2C
address. Describe the page in DT to make it available.
Signed-off-by: Marek Vasut <marex@denx.de>
---
NOTE: The labels are there so they can be used by U-Boot and DTOs
NOTE: Depends on currently linux-next next-20231013
c761068f484c ("dt-bindings: at24: add ST M24C32-D Additional Write lockable page")
4791146e9055 ("eeprom: at24: add ST M24C32-D Additional Write lockable page support")
---
Cc: Conor Dooley <conor+dt@kernel.org>
Cc: Fabio Estevam <festevam@gmail.com>
Cc: Frieder Schrempf <frieder.schrempf@kontron.de>
Cc: Krzysztof Kozlowski <krzysztof.kozlowski+dt@linaro.org>
Cc: Marco Felsch <m.felsch@pengutronix.de>
Cc: NXP Linux Team <linux-imx@nxp.com>
Cc: Pengutronix Kernel Team <kernel@pengutronix.de>
Cc: Rob Herring <robh+dt@kernel.org>
Cc: Sascha Hauer <s.hauer@pengutronix.de>
Cc: Shawn Guo <shawnguo@kernel.org>
Cc: devicetree@vger.kernel.org
Cc: linux-arm-kernel@lists.infradead.org
---
arch/arm64/boot/dts/freescale/imx8mp-dhcom-som.dtsi | 12 ++++++++++++
1 file changed, 12 insertions(+)
diff --git a/arch/arm64/boot/dts/freescale/imx8mp-dhcom-som.dtsi b/arch/arm64/boot/dts/freescale/imx8mp-dhcom-som.dtsi
index d8963f32ec84c..4ae4fdab461e0 100644
--- a/arch/arm64/boot/dts/freescale/imx8mp-dhcom-som.dtsi
+++ b/arch/arm64/boot/dts/freescale/imx8mp-dhcom-som.dtsi
@@ -420,6 +420,18 @@ eeprom1: eeprom@53 { /* EEPROM with FEC MAC address */
reg = <0x53>;
};
+ eeprom0wl: eeprom@58 {
+ compatible = "atmel,24c32d-wl"; /* M24C32-D WL page of 0x50 */
+ pagesize = <32>;
+ reg = <0x58>;
+ };
+
+ eeprom1wl: eeprom@5b {
+ compatible = "atmel,24c32d-wl"; /* M24C32-D WL page of 0x53 */
+ pagesize = <32>;
+ reg = <0x5b>;
+ };
+
ioexp: gpio@74 {
compatible = "nxp,pca9539";
reg = <0x74>;
--
2.42.0
^ permalink raw reply related [flat|nested] 2+ messages in thread
* Re: [PATCH] arm64: dts: imx8mp: Describe M24C32-D write-lockable page in DH i.MX8MP DHCOM DT
2023-10-15 20:01 [PATCH] arm64: dts: imx8mp: Describe M24C32-D write-lockable page in DH i.MX8MP DHCOM DT Marek Vasut
@ 2023-11-27 2:05 ` Shawn Guo
0 siblings, 0 replies; 2+ messages in thread
From: Shawn Guo @ 2023-11-27 2:05 UTC (permalink / raw)
To: Marek Vasut
Cc: linux-arm-kernel, Conor Dooley, Fabio Estevam, Frieder Schrempf,
Krzysztof Kozlowski, Marco Felsch, NXP Linux Team,
Pengutronix Kernel Team, Rob Herring, Sascha Hauer, devicetree
On Sun, Oct 15, 2023 at 10:01:24PM +0200, Marek Vasut wrote:
> The i.MX8MP DHCOM SoM production rev.200 is populated with M24C32-D
> EEPROMs which have Additional Write lockable page at separate I2C
> address. Describe the page in DT to make it available.
>
> Signed-off-by: Marek Vasut <marex@denx.de>
Applied, thanks!
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