From: Conor Dooley <conor@kernel.org>
To: Minda Chen <minda.chen@starfivetech.com>
Cc: "Krzysztof Wilczyński" <kw@linux.com>,
"Rob Herring" <robh+dt@kernel.org>,
"Bjorn Helgaas" <bhelgaas@google.com>,
"Lorenzo Pieralisi" <lpieralisi@kernel.org>,
"Daire McNamara" <daire.mcnamara@microchip.com>,
"Emil Renner Berthing" <emil.renner.berthing@canonical.com>,
"Krzysztof Kozlowski" <krzysztof.kozlowski+dt@linaro.org>,
devicetree@vger.kernel.org, linux-kernel@vger.kernel.org,
linux-riscv@lists.infradead.org, linux-pci@vger.kernel.org,
"Paul Walmsley" <paul.walmsley@sifive.com>,
"Palmer Dabbelt" <palmer@dabbelt.com>,
"Albert Ou" <aou@eecs.berkeley.edu>,
"Philipp Zabel" <p.zabel@pengutronix.de>,
"Mason Huo" <mason.huo@starfivetech.com>,
"Leyfoon Tan" <leyfoon.tan@starfivetech.com>,
"Kevin Xie" <kevin.xie@starfivetech.com>
Subject: Re: [PATCH v8 04/22] PCI: microchip: Add bridge_addr field to struct mc_pcie
Date: Wed, 18 Oct 2023 11:39:49 +0100 [thread overview]
Message-ID: <20231018-prefix-algebra-972f3e33b165@spud> (raw)
In-Reply-To: <20231011110514.107528-5-minda.chen@starfivetech.com>
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On Wed, Oct 11, 2023 at 07:04:56PM +0800, Minda Chen wrote:
> For bridge address base is common PLDA field, Add this
> to struct mc_pcie first.
>
> INTx and MSI codes interrupts codes will get the bridge base
> address from port->bridge_addr. For these codes will be
> changed to common codes. axi_base_addr is Microchip its own
> data.
>
> Signed-off-by: Minda Chen <minda.chen@starfivetech.com>
Reviewed-by: Conor Dooley <conor.dooley@microchip.com>
Thanks,
Conor.
> ---
> .../pci/controller/plda/pcie-microchip-host.c | 23 ++++++++-----------
> 1 file changed, 9 insertions(+), 14 deletions(-)
>
> diff --git a/drivers/pci/controller/plda/pcie-microchip-host.c b/drivers/pci/controller/plda/pcie-microchip-host.c
> index a34ec6aad4be..60870ee1f1c9 100644
> --- a/drivers/pci/controller/plda/pcie-microchip-host.c
> +++ b/drivers/pci/controller/plda/pcie-microchip-host.c
> @@ -195,6 +195,7 @@ struct mc_pcie {
> struct irq_domain *event_domain;
> raw_spinlock_t lock;
> struct mc_msi msi;
> + void __iomem *bridge_addr;
> };
>
> struct cause {
> @@ -339,8 +340,7 @@ static void mc_handle_msi(struct irq_desc *desc)
> struct irq_chip *chip = irq_desc_get_chip(desc);
> struct device *dev = port->dev;
> struct mc_msi *msi = &port->msi;
> - void __iomem *bridge_base_addr =
> - port->axi_base_addr + MC_PCIE_BRIDGE_ADDR;
> + void __iomem *bridge_base_addr = port->bridge_addr;
> unsigned long status;
> u32 bit;
> int ret;
> @@ -365,8 +365,7 @@ static void mc_handle_msi(struct irq_desc *desc)
> static void mc_msi_bottom_irq_ack(struct irq_data *data)
> {
> struct mc_pcie *port = irq_data_get_irq_chip_data(data);
> - void __iomem *bridge_base_addr =
> - port->axi_base_addr + MC_PCIE_BRIDGE_ADDR;
> + void __iomem *bridge_base_addr = port->bridge_addr;
> u32 bitpos = data->hwirq;
>
> writel_relaxed(BIT(bitpos), bridge_base_addr + ISTATUS_MSI);
> @@ -488,8 +487,7 @@ static void mc_handle_intx(struct irq_desc *desc)
> struct mc_pcie *port = irq_desc_get_handler_data(desc);
> struct irq_chip *chip = irq_desc_get_chip(desc);
> struct device *dev = port->dev;
> - void __iomem *bridge_base_addr =
> - port->axi_base_addr + MC_PCIE_BRIDGE_ADDR;
> + void __iomem *bridge_base_addr = port->bridge_addr;
> unsigned long status;
> u32 bit;
> int ret;
> @@ -514,8 +512,7 @@ static void mc_handle_intx(struct irq_desc *desc)
> static void mc_ack_intx_irq(struct irq_data *data)
> {
> struct mc_pcie *port = irq_data_get_irq_chip_data(data);
> - void __iomem *bridge_base_addr =
> - port->axi_base_addr + MC_PCIE_BRIDGE_ADDR;
> + void __iomem *bridge_base_addr = port->bridge_addr;
> u32 mask = BIT(data->hwirq + PM_MSI_INT_INTX_SHIFT);
>
> writel_relaxed(mask, bridge_base_addr + ISTATUS_LOCAL);
> @@ -524,8 +521,7 @@ static void mc_ack_intx_irq(struct irq_data *data)
> static void mc_mask_intx_irq(struct irq_data *data)
> {
> struct mc_pcie *port = irq_data_get_irq_chip_data(data);
> - void __iomem *bridge_base_addr =
> - port->axi_base_addr + MC_PCIE_BRIDGE_ADDR;
> + void __iomem *bridge_base_addr = port->bridge_addr;
> unsigned long flags;
> u32 mask = BIT(data->hwirq + PM_MSI_INT_INTX_SHIFT);
> u32 val;
> @@ -540,8 +536,7 @@ static void mc_mask_intx_irq(struct irq_data *data)
> static void mc_unmask_intx_irq(struct irq_data *data)
> {
> struct mc_pcie *port = irq_data_get_irq_chip_data(data);
> - void __iomem *bridge_base_addr =
> - port->axi_base_addr + MC_PCIE_BRIDGE_ADDR;
> + void __iomem *bridge_base_addr = port->bridge_addr;
> unsigned long flags;
> u32 mask = BIT(data->hwirq + PM_MSI_INT_INTX_SHIFT);
> u32 val;
> @@ -896,8 +891,7 @@ static void mc_pcie_setup_window(void __iomem *bridge_base_addr, u32 index,
> static int mc_pcie_setup_windows(struct platform_device *pdev,
> struct mc_pcie *port)
> {
> - void __iomem *bridge_base_addr =
> - port->axi_base_addr + MC_PCIE_BRIDGE_ADDR;
> + void __iomem *bridge_base_addr = port->bridge_addr;
> struct pci_host_bridge *bridge = platform_get_drvdata(pdev);
> struct resource_entry *entry;
> u64 pci_addr;
> @@ -1081,6 +1075,7 @@ static int mc_host_probe(struct platform_device *pdev)
> mc_disable_interrupts(port);
>
> bridge_base_addr = port->axi_base_addr + MC_PCIE_BRIDGE_ADDR;
> + port->bridge_addr = bridge_base_addr;
>
> /* Allow enabling MSI by disabling MSI-X */
> val = readl(bridge_base_addr + PCIE_PCI_IRQ_DW0);
> --
> 2.17.1
>
>
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next prev parent reply other threads:[~2023-10-18 10:39 UTC|newest]
Thread overview: 33+ messages / expand[flat|nested] mbox.gz Atom feed top
2023-10-11 11:04 [PATCH v8 0/22] Refactoring Microchip PCIe driver and add StarFive PCIe Minda Chen
2023-10-11 11:04 ` [PATCH v8 01/22] dt-bindings: PCI: Add PLDA XpressRICH PCIe host common properties Minda Chen
2023-10-11 11:04 ` [PATCH v8 02/22] PCI: microchip: Move pcie-microchip-host.c to plda directory Minda Chen
2023-10-11 11:04 ` [PATCH v8 03/22] PCI: microchip: Move PLDA IP register macros to pcie-plda.h Minda Chen
2023-10-11 11:04 ` [PATCH v8 04/22] PCI: microchip: Add bridge_addr field to struct mc_pcie Minda Chen
2023-10-18 10:39 ` Conor Dooley [this message]
2023-10-11 11:04 ` [PATCH v8 05/22] PCI: microchip: Rename two PCIe data structures Minda Chen
2023-10-18 10:40 ` Conor Dooley
2023-10-11 11:04 ` [PATCH v8 06/22] PCI: microchip: Move PCIe host data structure to plda-pcie.h Minda Chen
2023-10-18 10:41 ` Conor Dooley
2023-10-11 11:04 ` [PATCH v8 07/22] PCI: microchip: Rename two setup functions Minda Chen
2023-10-11 11:05 ` [PATCH v8 08/22] PCI: microchip: Change the argument of plda_pcie_setup_iomems() Minda Chen
2023-10-11 11:05 ` [PATCH v8 09/22] PCI: microchip: Move the setup functions to pcie-plda-host.c Minda Chen
2023-10-11 11:05 ` [PATCH v8 10/22] PCI: plda: Add PLDA default event IRQ handler Minda Chen
2023-10-18 10:44 ` Conor Dooley
2023-10-18 10:50 ` Minda Chen
2023-10-11 11:05 ` [PATCH v8 11/22] PCI: microchip: Rename interrupt related functions Minda Chen
2023-10-11 11:05 ` [PATCH v8 12/22] PCI: microchip: Add num_events field to struct plda_pcie_rp Minda Chen
2023-10-11 11:05 ` [PATCH v8 13/22] PCI: microchip: Add request_event_irq() callback function Minda Chen
2023-10-18 10:53 ` Conor Dooley
2023-10-11 11:05 ` [PATCH v8 14/22] PCI: microchip: Add INTx and MSI event num to struct plda_event Minda Chen
2023-10-11 11:05 ` [PATCH v8 15/22] PCI: microchip: Add get_events() callback function Minda Chen
2023-10-18 11:27 ` Conor Dooley
2023-10-11 11:05 ` [PATCH v8 16/22] PCI: microchip: Add event IRQ domain ops to struct plda_event Minda Chen
2023-10-18 11:30 ` Conor Dooley
2023-10-19 7:39 ` Minda Chen
2023-10-11 11:05 ` [PATCH v8 17/22] PCI: microchip: Move IRQ functions to pcie-plda-host.c Minda Chen
2023-10-11 11:05 ` [PATCH v8 18/22] PCI: plda: Set plda_event_handler() to static Minda Chen
2023-10-11 11:05 ` [PATCH v8 19/22] PCI: plda: Add event interrupt codes and IRQ domain ops Minda Chen
2023-10-11 11:05 ` [PATCH v8 20/22] dt-bindings: PCI: Add StarFive JH7110 PCIe controller Minda Chen
2023-10-11 11:05 ` [PATCH v8 21/22] PCI: starfive: Add " Minda Chen
2023-10-11 11:05 ` [PATCH v8 22/22] riscv: dts: starfive: add PCIe dts configuration for JH7110 Minda Chen
2023-10-17 5:43 ` [PATCH v8 0/22] Refactoring Microchip PCIe driver and add StarFive PCIe Minda Chen
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