From: Conor Dooley <conor@kernel.org>
To: "Clément Léger" <cleger@rivosinc.com>
Cc: Evan Green <evan@rivosinc.com>,
linux-riscv@lists.infradead.org, devicetree@vger.kernel.org,
linux-kernel@vger.kernel.org, linux-doc@vger.kernel.org,
Palmer Dabbelt <palmer@rivosinc.com>,
Paul Walmsley <paul.walmsley@sifive.com>,
Rob Herring <robh+dt@kernel.org>,
Krzysztof Kozlowski <krzysztof.kozlowski+dt@linaro.org>,
Albert Ou <aou@eecs.berkeley.edu>,
Jonathan Corbet <corbet@lwn.net>,
Andrew Jones <ajones@ventanamicro.com>,
Samuel Ortiz <sameo@rivosinc.com>
Subject: Re: [PATCH v2 01/19] riscv: hwprobe: factorize hwprobe ISA extension reporting
Date: Thu, 19 Oct 2023 11:22:26 +0100 [thread overview]
Message-ID: <20231019-flatten-showbiz-127b2e917a7a@spud> (raw)
In-Reply-To: <844f6f35-3125-4014-852c-9ad7aee19ddc@rivosinc.com>
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On Thu, Oct 19, 2023 at 09:26:31AM +0200, Clément Léger wrote:
>
>
> On 18/10/2023 19:36, Conor Dooley wrote:
> > On Wed, Oct 18, 2023 at 06:33:34PM +0100, Conor Dooley wrote:
> >> On Wed, Oct 18, 2023 at 10:24:15AM -0700, Evan Green wrote:
> >>> On Tue, Oct 17, 2023 at 6:15 AM Clément Léger <cleger@rivosinc.com> wrote:
> >>>>
> >>>> Factorize ISA extension reporting by using a macro rather than
> >>>> copy/pasting extension names. This will allow adding new extensions more
> >>>> easily.
> >>>>
> >>>> Signed-off-by: Clément Léger <cleger@rivosinc.com>
> >>>> ---
> >>>> arch/riscv/kernel/sys_riscv.c | 32 ++++++++++++++++++--------------
> >>>> 1 file changed, 18 insertions(+), 14 deletions(-)
> >>>>
> >>>> diff --git a/arch/riscv/kernel/sys_riscv.c b/arch/riscv/kernel/sys_riscv.c
> >>>> index 473159b5f303..e207874e686e 100644
> >>>> --- a/arch/riscv/kernel/sys_riscv.c
> >>>> +++ b/arch/riscv/kernel/sys_riscv.c
> >>>> @@ -145,20 +145,24 @@ static void hwprobe_isa_ext0(struct riscv_hwprobe *pair,
> >>>> for_each_cpu(cpu, cpus) {
> >>>> struct riscv_isainfo *isainfo = &hart_isa[cpu];
> >>>>
> >>>> - if (riscv_isa_extension_available(isainfo->isa, ZBA))
> >>>> - pair->value |= RISCV_HWPROBE_EXT_ZBA;
> >>>> - else
> >>>> - missing |= RISCV_HWPROBE_EXT_ZBA;
> >>>> -
> >>>> - if (riscv_isa_extension_available(isainfo->isa, ZBB))
> >>>> - pair->value |= RISCV_HWPROBE_EXT_ZBB;
> >>>> - else
> >>>> - missing |= RISCV_HWPROBE_EXT_ZBB;
> >>>> -
> >>>> - if (riscv_isa_extension_available(isainfo->isa, ZBS))
> >>>> - pair->value |= RISCV_HWPROBE_EXT_ZBS;
> >>>> - else
> >>>> - missing |= RISCV_HWPROBE_EXT_ZBS;
> >>>> +#define CHECK_ISA_EXT(__ext) \
> >>>> + do { \
> >>>> + if (riscv_isa_extension_available(isainfo->isa, __ext)) \
> >>>> + pair->value |= RISCV_HWPROBE_EXT_##__ext; \
> >>>> + else \
> >>>> + missing |= RISCV_HWPROBE_EXT_##__ext; \
> >>>> + } while (false)
> >>>> +
> >>>> + /*
> >>>> + * Only use CHECK_ISA_EXT() for extensions which can be exposed
> >>>> + * to userspace, regardless of the kernel's configuration, as no
> >>>> + * other checks, besides presence in the hart_isa bitmap, are
> >>>> + * made.
> >>>
> >>> This comment alludes to a dangerous trap, but I'm having trouble
> >>> understanding what it is.
> >>
> >> You cannot, for example, use this for communicating the presence of F or
> >> D, since they require a config option to be set before their use is
> >> safe.
> >
> > Funnily enough, this comment is immediately contradicted by the vector
> > subset extensions, where these CHECK_ISA_EXT() macros are used wrapped
> > in has_vector(). The code looks valid to me, since has_vector() contains
> > the Kconfig check, but does fly in the face of this comment.
> Yes, the KConfig checks are already done by the headers, adding #ifdef
> would be redundant even if more coherent with the comment
I don't really understand what the first part of this means, or why using
avoidable ifdeffery here would be desirable.
> BTW, wouldn't
> it make more sense to get rid out of the unsupported extensions directly
> at ISA string parsing ? ie, if kernel is compiled without V support,
> then do not set the bits corresponding to these in the riscv_isa_ext[]
> array ? But the initial intent was probably to be able to report the
> full string through cpuinfo.
Yeah, hysterical raisins I guess, it's always been that way. I don't
think anyone originally thought about such configurations and that is
how the cpuinfo stuff behaves. I strongly dislike the
riscv_isa_extension_available() interface, but one of Drew's patches
does at least improve things a bit. Kinda waiting for some of the
patches in flight to settle down before deciding if I want to refactor
stuff to be less of a potential for shooting oneself in the foot.
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next prev parent reply other threads:[~2023-10-19 10:22 UTC|newest]
Thread overview: 57+ messages / expand[flat|nested] mbox.gz Atom feed top
2023-10-17 13:14 [PATCH v2 00/19] riscv: report more ISA extensions through hwprobe Clément Léger
2023-10-17 13:14 ` [PATCH v2 01/19] riscv: hwprobe: factorize hwprobe ISA extension reporting Clément Léger
2023-10-18 17:24 ` Evan Green
2023-10-18 17:33 ` Conor Dooley
2023-10-18 17:36 ` Conor Dooley
2023-10-18 17:45 ` Evan Green
2023-10-19 9:46 ` Clément Léger
2023-10-19 10:24 ` Conor Dooley
2023-10-19 15:58 ` Evan Green
2023-10-19 7:26 ` Clément Léger
2023-10-19 10:22 ` Conor Dooley [this message]
2023-10-19 12:29 ` Clément Léger
2023-10-20 10:27 ` Andrew Jones
2023-10-17 13:14 ` [PATCH v2 02/19] riscv: add ISA extension parsing for scalar crypto Clément Léger
2023-10-23 16:21 ` Evan Green
2023-10-24 7:18 ` Clément Léger
2023-10-24 9:30 ` Clément Léger
2023-10-24 16:37 ` Evan Green
2023-10-24 18:11 ` Clément Léger
2023-10-17 13:14 ` [PATCH v2 03/19] riscv: hwprobe: add support for scalar crypto ISA extensions Clément Léger
2023-10-18 17:24 ` Evan Green
2023-10-19 7:21 ` Clément Léger
2023-10-17 13:14 ` [PATCH v2 04/19] dt-bindings: riscv: add scalar crypto ISA extensions description Clément Léger
2023-10-17 13:14 ` [PATCH v2 05/19] riscv: add ISA extension parsing for vector crypto extensions Clément Léger
2023-10-18 1:45 ` Jerry Shih
2023-10-18 12:52 ` Clément Léger
2023-10-18 17:26 ` Evan Green
2023-10-19 9:35 ` Clément Léger
2023-10-19 15:33 ` Conor Dooley
2023-10-19 16:19 ` Evan Green
2023-10-23 7:24 ` Clément Léger
2023-10-23 16:18 ` Evan Green
2023-10-20 2:43 ` Jerry Shih
2023-10-23 7:14 ` Clément Léger
2023-10-17 13:14 ` [PATCH v2 06/19] riscv: hwprobe: export vector crypto ISA extensions Clément Léger
2023-10-18 17:27 ` Evan Green
2023-10-17 13:14 ` [PATCH v2 07/19] dt-bindings: riscv: add vector crypto ISA extensions description Clément Léger
2023-10-17 13:14 ` [PATCH v2 08/19] riscv: add ISA extension parsing for Zfh/Zfhmin Clément Léger
2023-10-18 17:28 ` Evan Green
2023-10-17 13:14 ` [PATCH v2 09/19] riscv: hwprobe: export Zfh/Zfhmin ISA extensions Clément Léger
2023-10-18 17:28 ` Evan Green
2023-10-17 13:14 ` [PATCH v2 10/19] dt-bindings: riscv: add Zfh[min] ISA extensions description Clément Léger
2023-10-17 13:14 ` [PATCH v2 11/19] riscv: add ISA extension parsing for Zihintntl Clément Léger
2023-10-18 17:28 ` Evan Green
2023-10-17 13:14 ` [PATCH v2 12/19] riscv: hwprobe: export Zhintntl ISA extension Clément Léger
2023-10-18 17:28 ` Evan Green
2023-10-17 13:14 ` [PATCH v2 13/19] dt-bindings: riscv: add Zihintntl ISA extension description Clément Léger
2023-10-17 13:14 ` [PATCH v2 14/19] riscv: add ISA extension parsing for Zvfh[min] Clément Léger
2023-10-18 17:28 ` Evan Green
2023-10-17 13:14 ` [PATCH v2 15/19] riscv: hwprobe: export Zvfh[min] ISA extensions Clément Léger
2023-10-18 17:28 ` Evan Green
2023-10-17 13:14 ` [PATCH v2 16/19] dt-bindings: riscv: add Zvfh[min] ISA extension description Clément Léger
2023-10-17 13:14 ` [PATCH v2 17/19] riscv: add ISA extension parsing for Zfa Clément Léger
2023-10-18 17:28 ` Evan Green
2023-10-17 13:14 ` [PATCH v2 18/19] riscv: hwprobe: export Zfa ISA extension Clément Léger
2023-10-18 17:28 ` Evan Green
2023-10-17 13:14 ` [PATCH v2 19/19] dt-bindings: riscv: add Zfa ISA extension description Clément Léger
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