From: Conor Dooley <conor@kernel.org>
To: Anup Patel <apatel@ventanamicro.com>
Cc: "Palmer Dabbelt" <palmer@dabbelt.com>,
"Paul Walmsley" <paul.walmsley@sifive.com>,
"Thomas Gleixner" <tglx@linutronix.de>,
"Rob Herring" <robh+dt@kernel.org>,
"Krzysztof Kozlowski" <krzysztof.kozlowski+dt@linaro.org>,
"Frank Rowand" <frowand.list@gmail.com>,
"Conor Dooley" <conor+dt@kernel.org>,
"Marc Zyngier" <maz@kernel.org>, "Björn Töpel" <bjorn@kernel.org>,
"Atish Patra" <atishp@atishpatra.org>,
"Andrew Jones" <ajones@ventanamicro.com>,
"Sunil V L" <sunilvl@ventanamicro.com>,
"Saravana Kannan" <saravanak@google.com>,
"Anup Patel" <anup@brainfault.org>,
linux-riscv@lists.infradead.org, linux-kernel@vger.kernel.org,
devicetree@vger.kernel.org
Subject: Re: [PATCH v11 07/14] irqchip: Add RISC-V incoming MSI controller early driver
Date: Tue, 24 Oct 2023 10:25:03 +0100 [thread overview]
Message-ID: <20231024-arbitrate-glitter-2053d17d7260@spud> (raw)
In-Reply-To: <20231023172800.315343-8-apatel@ventanamicro.com>
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On Mon, Oct 23, 2023 at 10:57:53PM +0530, Anup Patel wrote:
> +#ifdef CONFIG_GENERIC_IRQ_DEBUGFS
> +void imsic_vector_debug_show(struct seq_file *m,
> + struct imsic_vector *vec, int ind)
> +{
> + unsigned int mcpu = 0, mlocal_id = 0;
> + struct imsic_local_priv *lpriv;
> + bool move_in_progress = false;
> + struct imsic_vector *mvec;
> + bool is_enabled = false;
> + unsigned long flags;
> +
> + lpriv = per_cpu_ptr(imsic->lpriv, vec->cpu);
> + if (WARN_ON(&lpriv->vectors[vec->local_id] != vec))
> + return;
> +
> + raw_spin_lock_irqsave(&lpriv->ids_lock, flags);
> + if (test_bit(vec->local_id, lpriv->ids_enabled_bitmap))
> + is_enabled = true;
> + mvec = lpriv->ids_move[vec->local_id];
> + if (mvec) {
> + move_in_progress = true;
> + mcpu = mvec->cpu;
> + mlocal_id = mvec->local_id;
> + }
> + raw_spin_unlock_irqrestore(&lpriv->ids_lock, flags);
> +
> + seq_printf(m, "%*starget_cpu : %5u\n", ind, "", vec->cpu);
> + seq_printf(m, "%*starget_local_id : %5u\n", ind, "", vec->local_id);
> + seq_printf(m, "%*sis_reserved : %5u\n", ind, "",
> + (vec->local_id <= IMSIC_IPI_ID) ? 1 : 0);
> + seq_printf(m, "%*sis_enabled : %5u\n", ind, "",
> + (move_in_progress) ? 1 : 0);
gcc & clang report:
drivers/irqchip/irq-riscv-imsic-state.c:288:14: warning: variable 'is_enabled' set but not used [-Wunused-but-set-variable]
This looks to be a copy-pasta issue, and the move_in_progress here
should be is_enabled?
> + seq_printf(m, "%*sis_move_pending : %5u\n", ind, "",
> + (move_in_progress) ? 1 : 0);
> + if (move_in_progress) {
> + seq_printf(m, "%*smove_cpu : %5u\n", ind, "", mcpu);
> + seq_printf(m, "%*smove_local_id : %5u\n", ind, "", mlocal_id);
> + }
> +}
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next prev parent reply other threads:[~2023-10-24 9:25 UTC|newest]
Thread overview: 47+ messages / expand[flat|nested] mbox.gz Atom feed top
2023-10-23 17:27 [PATCH v11 00/14] Linux RISC-V AIA Support Anup Patel
2023-10-23 17:27 ` [PATCH v11 01/14] RISC-V: Don't fail in riscv_of_parent_hartid() for disabled HARTs Anup Patel
2023-10-24 11:55 ` Björn Töpel
2023-10-24 12:07 ` Anup Patel
2023-10-23 17:27 ` [PATCH v11 02/14] of: property: Add fw_devlink support for msi-parent Anup Patel
2023-10-23 17:27 ` [PATCH v11 03/14] irqchip/sifive-plic: Fix syscore registration for multi-socket systems Anup Patel
2023-10-23 17:27 ` [PATCH v11 04/14] irqchip/sifive-plic: Convert PLIC driver into a platform driver Anup Patel
2023-10-23 17:27 ` [PATCH v11 05/14] irqchip/riscv-intc: Add support for RISC-V AIA Anup Patel
2023-10-24 12:17 ` Andrew Jones
2023-10-23 17:27 ` [PATCH v11 06/14] dt-bindings: interrupt-controller: Add RISC-V incoming MSI controller Anup Patel
2023-10-24 12:30 ` Andrew Jones
2023-10-23 17:27 ` [PATCH v11 07/14] irqchip: Add RISC-V incoming MSI controller early driver Anup Patel
2023-10-24 9:25 ` Conor Dooley [this message]
2023-10-24 12:08 ` Anup Patel
2023-10-24 13:05 ` Björn Töpel
2023-10-25 5:08 ` Anup Patel
2023-10-25 16:05 ` Björn Töpel
2023-10-25 17:25 ` Anup Patel
2023-10-26 8:51 ` Björn Töpel
2023-10-28 18:18 ` Thomas Gleixner
2023-10-28 18:34 ` Thomas Gleixner
2023-10-23 17:27 ` [PATCH v11 08/14] irqchip/riscv-imsic: Add support for platform MSI irqdomain Anup Patel
2023-10-25 19:56 ` Thomas Gleixner
2023-10-23 17:27 ` [PATCH v11 09/14] irqchip/riscv-imsic: Add support for PCI " Anup Patel
2023-10-24 13:09 ` Björn Töpel
2023-10-25 5:08 ` Anup Patel
2023-10-25 8:55 ` Björn Töpel
2023-10-28 18:36 ` Thomas Gleixner
2023-10-29 19:53 ` Björn Töpel
2023-10-25 19:59 ` Thomas Gleixner
2023-10-23 17:27 ` [PATCH v11 10/14] dt-bindings: interrupt-controller: Add RISC-V advanced PLIC Anup Patel
2023-10-23 17:27 ` [PATCH v11 11/14] irqchip: Add RISC-V advanced PLIC driver for direct-mode Anup Patel
2023-10-23 17:27 ` [PATCH v11 12/14] irqchip/riscv-aplic: Add support for MSI-mode Anup Patel
2023-10-24 5:31 ` Sunil V L
2023-11-02 6:38 ` Ben
[not found] ` <210e2757.3169.18b8eb4495c.Coremail.figure1802@126.com>
2023-11-02 12:37 ` [PATCH " Anup Patel
2023-11-03 9:39 ` Ben
2023-11-03 11:04 ` Anup Patel
2023-11-04 0:58 ` Ben
2023-11-08 14:20 ` Ben
2023-11-08 14:43 ` [PATCH " Anup Patel
2023-11-08 14:51 ` Ben
2023-11-08 14:56 ` Anup Patel
2023-11-08 15:32 ` Ben
2023-11-14 9:21 ` Anup Patel
2023-10-23 17:27 ` [PATCH v11 13/14] RISC-V: Select APLIC and IMSIC drivers Anup Patel
2023-10-23 17:28 ` [PATCH v11 14/14] MAINTAINERS: Add entry for RISC-V AIA drivers Anup Patel
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