From: Dominic Rath <dominic.rath@ibv-augsburg.net>
To: Marc Zyngier <maz@kernel.org>
Cc: Lorenzo Pieralisi <lpieralisi@kernel.org>,
linux-kernel@vger.kernel.org,
linux-arm-kernel@lists.infradead.org, devicetree@vger.kernel.org,
linux-acpi@vger.kernel.org, Mark Rutland <mark.rutland@arm.com>,
Robin Murphy <robin.murphy@arm.com>,
"Rafael J. Wysocki" <rafael@kernel.org>,
Rob Herring <robh+dt@kernel.org>,
Fang Xiang <fangxiang3@xiaomi.com>,
bahle@ibv-augsburg.de, rath@ibv-augsburg.de
Subject: Re: [PATCH v3 3/5] irqchip/gic-v3-its: Split allocation from initialisation of its_node
Date: Tue, 24 Oct 2023 15:13:31 +0200 [thread overview]
Message-ID: <20231024131331.GA4554@JADEVM-DRA> (raw)
In-Reply-To: <86lebs493m.wl-maz@kernel.org>
On Tue, Oct 24, 2023 at 11:18:21AM +0100, Marc Zyngier wrote:
> Yeah, that's clearly a regression, and I've confirmed it on my
> Synquacer (which means the TI folks have accurately copied a dumb
> idea). Can you please give the patch below a go on your system and
> confirm asap whether it works for you?
>
Thanks a lot, with that patch applied on top of 6.6-rc6 MSI-X interrupts
work again for the AM64x.
Best Regards,
Dominic
> > I have no idea whether TI's use of this quirk was "correct", but it did
> > work, and since 6.6-rc6 MSI-X has been broken for us.
>
> Just as for bad SW, the worse HW ideas get replicated. Then I write
> bad SW for it.
>
> Thanks,
>
> M.
>
> From b5571a69f09733ecfa0c944cc48baced6590d024 Mon Sep 17 00:00:00 2001
> From: Marc Zyngier <maz@kernel.org>
> Date: Tue, 24 Oct 2023 11:07:34 +0100
> Subject: [PATCH] irqchip/gic-v3-its: Don't override quirk settings with
> default values
>
> When splitting the allocation of the ITS node from its configuration,
> some of the default settings were kept in the latter instead of
> being moved to the former.
>
> This has the side effect of negating some of the quirk detection that
> have happened in between, amongst which the dreaded Synquacer hack
> (that also affect Dominic's TI platform).
>
> Move the initialisation of these fields early, so that they can
> again be overriden by the Synquacer quirk.
>
> Fixes: 9585a495ac93 ("irqchip/gic-v3-its: Split allocation from initialisation of its_node")
> Reported by: Dominic Rath <dominic.rath@ibv-augsburg.net>
> Signed-off-by: Marc Zyngier <maz@kernel.org>
Tested-by: Dominic Rath <dominic.rath@ibv-augsburg.net>
> Link: https://lore.kernel.org/r/20231024084831.GA3788@JADEVM-DRA
> ---
> drivers/irqchip/irq-gic-v3-its.c | 4 ++--
> 1 file changed, 2 insertions(+), 2 deletions(-)
>
> diff --git a/drivers/irqchip/irq-gic-v3-its.c b/drivers/irqchip/irq-gic-v3-its.c
> index 75a2dd550625..a8c89df1a997 100644
> --- a/drivers/irqchip/irq-gic-v3-its.c
> +++ b/drivers/irqchip/irq-gic-v3-its.c
> @@ -5112,8 +5112,6 @@ static int __init its_probe_one(struct its_node *its)
> }
> its->cmd_base = (void *)page_address(page);
> its->cmd_write = its->cmd_base;
> - its->get_msi_base = its_irq_get_msi_base;
> - its->msi_domain_flags = IRQ_DOMAIN_FLAG_ISOLATED_MSI;
>
> err = its_alloc_tables(its);
> if (err)
> @@ -5362,6 +5360,8 @@ static struct its_node __init *its_node_init(struct resource *res,
> its->typer = gic_read_typer(its_base + GITS_TYPER);
> its->base = its_base;
> its->phys_base = res->start;
> + its->get_msi_base = its_irq_get_msi_base;
> + its->msi_domain_flags = IRQ_DOMAIN_FLAG_ISOLATED_MSI;
>
> its->numa_node = numa_node;
> its->fwnode_handle = handle;
> --
> 2.39.2
>
>
> --
> Without deviation from the norm, progress is not possible.
next prev parent reply other threads:[~2023-10-24 13:13 UTC|newest]
Thread overview: 40+ messages / expand[flat|nested] mbox.gz Atom feed top
2023-09-05 10:47 [PATCH 0/2] irqchip/gic-v3: Enable non-coherent GIC designs probing Lorenzo Pieralisi
2023-09-05 10:47 ` [PATCH 1/2] dt-bindings: interrupt-controller: arm,gic-v3: Add dma-noncoherent property Lorenzo Pieralisi
2023-09-05 11:17 ` Robin Murphy
2023-09-05 12:22 ` Lorenzo Pieralisi
2023-09-05 12:57 ` Robin Murphy
2023-09-05 18:23 ` Rob Herring
2023-09-05 10:47 ` [PATCH 2/2] irqchip/gic-v3: Enable non-coherent redistributors/ITSes probing Lorenzo Pieralisi
2023-09-05 11:34 ` Marc Zyngier
2023-09-05 12:14 ` Robin Murphy
2023-09-05 12:30 ` Lorenzo Pieralisi
2023-09-05 12:41 ` Marc Zyngier
2023-09-05 14:24 ` Lorenzo Pieralisi
2023-09-05 14:34 ` Marc Zyngier
2023-09-06 11:01 ` Fang Xiang
2023-10-03 14:43 ` Lorenzo Pieralisi
2023-10-03 16:18 ` Robin Murphy
2023-10-03 16:44 ` Marc Zyngier
2023-10-04 7:13 ` Lorenzo Pieralisi
2023-10-05 13:59 ` Lorenzo Pieralisi
2023-09-06 9:41 ` [PATCH v2 0/2] irqchip/gic-v3: Enable non-coherent GIC designs probing Lorenzo Pieralisi
2023-09-06 9:41 ` [PATCH v2 1/2] dt-bindings: interrupt-controller: arm,gic-v3: Add dma-noncoherent property Lorenzo Pieralisi
2023-09-06 11:23 ` Rob Herring
2023-09-06 11:27 ` Lorenzo Pieralisi
2023-09-06 9:41 ` [PATCH v2 2/2] irqchip/gic-v3: Enable non-coherent redistributors/ITSes probing Lorenzo Pieralisi
2023-09-06 9:52 ` [PATCH v2 0/2] irqchip/gic-v3: Enable non-coherent GIC designs probing Marc Zyngier
2023-09-06 11:23 ` Lorenzo Pieralisi
2023-09-21 10:11 ` Lorenzo Pieralisi
2023-10-06 12:59 ` [PATCH v3 0/5] " Lorenzo Pieralisi
2023-10-06 12:59 ` [PATCH v3 1/5] dt-bindings: interrupt-controller: arm,gic-v3: Add dma-noncoherent property Lorenzo Pieralisi
2023-10-06 12:59 ` [PATCH v3 2/5] irqchip/gic-v3: Enable non-coherent redistributors/ITSes DT probing Lorenzo Pieralisi
2023-10-06 12:59 ` [PATCH v3 3/5] irqchip/gic-v3-its: Split allocation from initialisation of its_node Lorenzo Pieralisi
2023-10-24 8:48 ` Dominic Rath
2023-10-24 10:18 ` Marc Zyngier
2023-10-24 13:13 ` Dominic Rath [this message]
2023-10-06 12:59 ` [PATCH v3 4/5] ACPICA: Add new MADT GICC/GICR/ITS flags handling [code first] Lorenzo Pieralisi
2023-10-06 12:59 ` [PATCH v3 5/5] irqchip/gic-v3: Enable non-coherent redistributors/ITSes ACPI probing Lorenzo Pieralisi
2023-10-17 14:19 ` Lorenzo Pieralisi
2023-10-17 16:44 ` Marc Zyngier
2023-10-18 8:42 ` Lorenzo Pieralisi
2023-10-19 11:12 ` Marc Zyngier
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